2007-09-17 01:08:06 +04:00
|
|
|
/*
|
2007-06-03 15:13:39 +04:00
|
|
|
* Motorola ColdFire MCF5208 SoC emulation.
|
|
|
|
*
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|
|
* Copyright (c) 2007 CodeSourcery.
|
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|
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*
|
2011-06-26 06:21:35 +04:00
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* This code is licensed under the GPL
|
2007-06-03 15:13:39 +04:00
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|
*/
|
2016-01-26 21:17:23 +03:00
|
|
|
#include "qemu/osdep.h"
|
include/qemu/osdep.h: Don't include qapi/error.h
Commit 57cb38b included qapi/error.h into qemu/osdep.h to get the
Error typedef. Since then, we've moved to include qemu/osdep.h
everywhere. Its file comment explains: "To avoid getting into
possible circular include dependencies, this file should not include
any other QEMU headers, with the exceptions of config-host.h,
compiler.h, os-posix.h and os-win32.h, all of which are doing a
similar job to this file and are under similar constraints."
qapi/error.h doesn't do a similar job, and it doesn't adhere to
similar constraints: it includes qapi-types.h. That's in excess of
100KiB of crap most .c files don't actually need.
Add the typedef to qemu/typedefs.h, and include that instead of
qapi/error.h. Include qapi/error.h in .c files that need it and don't
get it now. Include qapi-types.h in qom/object.h for uint16List.
Update scripts/clean-includes accordingly. Update it further to match
reality: replace config.h by config-target.h, add sysemu/os-posix.h,
sysemu/os-win32.h. Update the list of includes in the qemu/osdep.h
comment quoted above similarly.
This reduces the number of objects depending on qapi/error.h from "all
of them" to less than a third. Unfortunately, the number depending on
qapi-types.h shrinks only a little. More work is needed for that one.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
[Fix compilation without the spice devel packages. - Paolo]
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-03-14 11:01:28 +03:00
|
|
|
#include "qapi/error.h"
|
2016-01-19 23:51:44 +03:00
|
|
|
#include "qemu-common.h"
|
|
|
|
#include "cpu.h"
|
2013-02-04 18:40:22 +04:00
|
|
|
#include "hw/hw.h"
|
2013-02-05 20:06:20 +04:00
|
|
|
#include "hw/m68k/mcf.h"
|
2012-12-17 21:20:00 +04:00
|
|
|
#include "qemu/timer.h"
|
2013-02-04 18:40:22 +04:00
|
|
|
#include "hw/ptimer.h"
|
2012-12-17 21:20:04 +04:00
|
|
|
#include "sysemu/sysemu.h"
|
2013-07-29 20:47:21 +04:00
|
|
|
#include "sysemu/qtest.h"
|
2012-10-24 10:43:34 +04:00
|
|
|
#include "net/net.h"
|
2013-02-04 18:40:22 +04:00
|
|
|
#include "hw/boards.h"
|
|
|
|
#include "hw/loader.h"
|
2009-09-20 18:58:02 +04:00
|
|
|
#include "elf.h"
|
2012-12-17 21:19:49 +04:00
|
|
|
#include "exec/address-spaces.h"
|
2007-06-03 15:13:39 +04:00
|
|
|
|
2016-09-28 03:06:39 +03:00
|
|
|
#define SYS_FREQ 166666666
|
2007-06-03 15:13:39 +04:00
|
|
|
|
|
|
|
#define PCSR_EN 0x0001
|
|
|
|
#define PCSR_RLD 0x0002
|
|
|
|
#define PCSR_PIF 0x0004
|
|
|
|
#define PCSR_PIE 0x0008
|
|
|
|
#define PCSR_OVW 0x0010
|
|
|
|
#define PCSR_DBG 0x0020
|
|
|
|
#define PCSR_DOZE 0x0040
|
|
|
|
#define PCSR_PRE_SHIFT 8
|
|
|
|
#define PCSR_PRE_MASK 0x0f00
|
|
|
|
|
|
|
|
typedef struct {
|
2011-08-08 22:21:47 +04:00
|
|
|
MemoryRegion iomem;
|
2007-06-03 15:13:39 +04:00
|
|
|
qemu_irq irq;
|
|
|
|
ptimer_state *timer;
|
|
|
|
uint16_t pcsr;
|
|
|
|
uint16_t pmr;
|
|
|
|
uint16_t pcntr;
|
|
|
|
} m5208_timer_state;
|
|
|
|
|
|
|
|
static void m5208_timer_update(m5208_timer_state *s)
|
|
|
|
{
|
|
|
|
if ((s->pcsr & (PCSR_PIE | PCSR_PIF)) == (PCSR_PIE | PCSR_PIF))
|
|
|
|
qemu_irq_raise(s->irq);
|
|
|
|
else
|
|
|
|
qemu_irq_lower(s->irq);
|
|
|
|
}
|
|
|
|
|
2012-10-23 14:30:10 +04:00
|
|
|
static void m5208_timer_write(void *opaque, hwaddr offset,
|
2011-08-08 22:21:47 +04:00
|
|
|
uint64_t value, unsigned size)
|
2007-06-03 15:13:39 +04:00
|
|
|
{
|
2008-12-01 21:59:50 +03:00
|
|
|
m5208_timer_state *s = (m5208_timer_state *)opaque;
|
2007-06-03 15:13:39 +04:00
|
|
|
int prescale;
|
|
|
|
int limit;
|
|
|
|
switch (offset) {
|
|
|
|
case 0:
|
|
|
|
/* The PIF bit is set-to-clear. */
|
|
|
|
if (value & PCSR_PIF) {
|
|
|
|
s->pcsr &= ~PCSR_PIF;
|
|
|
|
value &= ~PCSR_PIF;
|
|
|
|
}
|
|
|
|
/* Avoid frobbing the timer if we're just twiddling IRQ bits. */
|
|
|
|
if (((s->pcsr ^ value) & ~PCSR_PIE) == 0) {
|
|
|
|
s->pcsr = value;
|
|
|
|
m5208_timer_update(s);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (s->pcsr & PCSR_EN)
|
|
|
|
ptimer_stop(s->timer);
|
|
|
|
|
|
|
|
s->pcsr = value;
|
|
|
|
|
|
|
|
prescale = 1 << ((s->pcsr & PCSR_PRE_MASK) >> PCSR_PRE_SHIFT);
|
|
|
|
ptimer_set_freq(s->timer, (SYS_FREQ / 2) / prescale);
|
|
|
|
if (s->pcsr & PCSR_RLD)
|
|
|
|
limit = s->pmr;
|
2007-06-03 16:54:38 +04:00
|
|
|
else
|
|
|
|
limit = 0xffff;
|
2007-06-03 15:13:39 +04:00
|
|
|
ptimer_set_limit(s->timer, limit, 0);
|
|
|
|
|
|
|
|
if (s->pcsr & PCSR_EN)
|
|
|
|
ptimer_run(s->timer, 0);
|
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
s->pmr = value;
|
|
|
|
s->pcsr &= ~PCSR_PIF;
|
2007-06-03 16:54:38 +04:00
|
|
|
if ((s->pcsr & PCSR_RLD) == 0) {
|
|
|
|
if (s->pcsr & PCSR_OVW)
|
|
|
|
ptimer_set_count(s->timer, value);
|
|
|
|
} else {
|
|
|
|
ptimer_set_limit(s->timer, value, s->pcsr & PCSR_OVW);
|
|
|
|
}
|
2007-06-03 15:13:39 +04:00
|
|
|
break;
|
|
|
|
case 4:
|
|
|
|
break;
|
|
|
|
default:
|
2009-05-08 05:35:15 +04:00
|
|
|
hw_error("m5208_timer_write: Bad offset 0x%x\n", (int)offset);
|
2008-12-01 21:59:50 +03:00
|
|
|
break;
|
2007-06-03 15:13:39 +04:00
|
|
|
}
|
|
|
|
m5208_timer_update(s);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void m5208_timer_trigger(void *opaque)
|
|
|
|
{
|
|
|
|
m5208_timer_state *s = (m5208_timer_state *)opaque;
|
|
|
|
s->pcsr |= PCSR_PIF;
|
|
|
|
m5208_timer_update(s);
|
|
|
|
}
|
|
|
|
|
2012-10-23 14:30:10 +04:00
|
|
|
static uint64_t m5208_timer_read(void *opaque, hwaddr addr,
|
2011-08-08 22:21:47 +04:00
|
|
|
unsigned size)
|
2008-12-01 21:59:50 +03:00
|
|
|
{
|
|
|
|
m5208_timer_state *s = (m5208_timer_state *)opaque;
|
|
|
|
switch (addr) {
|
|
|
|
case 0:
|
|
|
|
return s->pcsr;
|
|
|
|
case 2:
|
|
|
|
return s->pmr;
|
|
|
|
case 4:
|
|
|
|
return ptimer_get_count(s->timer);
|
|
|
|
default:
|
2009-05-08 05:35:15 +04:00
|
|
|
hw_error("m5208_timer_read: Bad offset 0x%x\n", (int)addr);
|
2008-12-01 21:59:50 +03:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2011-08-08 22:21:47 +04:00
|
|
|
static const MemoryRegionOps m5208_timer_ops = {
|
|
|
|
.read = m5208_timer_read,
|
|
|
|
.write = m5208_timer_write,
|
|
|
|
.endianness = DEVICE_NATIVE_ENDIAN,
|
2008-12-01 21:59:50 +03:00
|
|
|
};
|
|
|
|
|
2012-10-23 14:30:10 +04:00
|
|
|
static uint64_t m5208_sys_read(void *opaque, hwaddr addr,
|
2011-08-08 22:21:47 +04:00
|
|
|
unsigned size)
|
2007-06-03 15:13:39 +04:00
|
|
|
{
|
|
|
|
switch (addr) {
|
2008-12-01 21:59:50 +03:00
|
|
|
case 0x110: /* SDCS0 */
|
2007-06-03 15:13:39 +04:00
|
|
|
{
|
|
|
|
int n;
|
|
|
|
for (n = 0; n < 32; n++) {
|
|
|
|
if (ram_size < (2u << n))
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
return (n - 1) | 0x40000000;
|
|
|
|
}
|
2008-12-01 21:59:50 +03:00
|
|
|
case 0x114: /* SDCS1 */
|
2007-06-03 15:13:39 +04:00
|
|
|
return 0;
|
|
|
|
|
|
|
|
default:
|
2009-05-08 05:35:15 +04:00
|
|
|
hw_error("m5208_sys_read: Bad offset 0x%x\n", (int)addr);
|
2007-06-03 15:13:39 +04:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2012-10-23 14:30:10 +04:00
|
|
|
static void m5208_sys_write(void *opaque, hwaddr addr,
|
2011-08-08 22:21:47 +04:00
|
|
|
uint64_t value, unsigned size)
|
2007-06-03 15:13:39 +04:00
|
|
|
{
|
2009-05-08 05:35:15 +04:00
|
|
|
hw_error("m5208_sys_write: Bad offset 0x%x\n", (int)addr);
|
2007-06-03 15:13:39 +04:00
|
|
|
}
|
|
|
|
|
2011-08-08 22:21:47 +04:00
|
|
|
static const MemoryRegionOps m5208_sys_ops = {
|
|
|
|
.read = m5208_sys_read,
|
|
|
|
.write = m5208_sys_write,
|
|
|
|
.endianness = DEVICE_NATIVE_ENDIAN,
|
2007-06-03 15:13:39 +04:00
|
|
|
};
|
|
|
|
|
2011-08-08 22:21:47 +04:00
|
|
|
static void mcf5208_sys_init(MemoryRegion *address_space, qemu_irq *pic)
|
2007-06-03 15:13:39 +04:00
|
|
|
{
|
2011-08-08 22:21:47 +04:00
|
|
|
MemoryRegion *iomem = g_new(MemoryRegion, 1);
|
2008-12-01 21:59:50 +03:00
|
|
|
m5208_timer_state *s;
|
2007-06-03 15:13:39 +04:00
|
|
|
QEMUBH *bh;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
/* SDRAMC. */
|
2013-06-06 13:41:28 +04:00
|
|
|
memory_region_init_io(iomem, NULL, &m5208_sys_ops, NULL, "m5208-sys", 0x00004000);
|
2011-08-08 22:21:47 +04:00
|
|
|
memory_region_add_subregion(address_space, 0xfc0a8000, iomem);
|
2007-06-03 15:13:39 +04:00
|
|
|
/* Timers. */
|
|
|
|
for (i = 0; i < 2; i++) {
|
2011-08-21 07:09:37 +04:00
|
|
|
s = (m5208_timer_state *)g_malloc0(sizeof(m5208_timer_state));
|
2008-12-01 21:59:50 +03:00
|
|
|
bh = qemu_bh_new(m5208_timer_trigger, s);
|
2016-09-22 20:13:06 +03:00
|
|
|
s->timer = ptimer_init(bh, PTIMER_POLICY_DEFAULT);
|
2013-06-06 13:41:28 +04:00
|
|
|
memory_region_init_io(&s->iomem, NULL, &m5208_timer_ops, s,
|
2011-08-08 22:21:47 +04:00
|
|
|
"m5208-timer", 0x00004000);
|
|
|
|
memory_region_add_subregion(address_space, 0xfc080000 + 0x4000 * i,
|
|
|
|
&s->iomem);
|
2008-12-01 21:59:50 +03:00
|
|
|
s->irq = pic[4 + i];
|
2007-06-03 15:13:39 +04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2014-05-07 18:42:57 +04:00
|
|
|
static void mcf5208evb_init(MachineState *machine)
|
2007-06-03 15:13:39 +04:00
|
|
|
{
|
2014-05-07 18:42:57 +04:00
|
|
|
ram_addr_t ram_size = machine->ram_size;
|
|
|
|
const char *cpu_model = machine->cpu_model;
|
|
|
|
const char *kernel_filename = machine->kernel_filename;
|
2013-01-18 17:15:09 +04:00
|
|
|
M68kCPU *cpu;
|
2012-03-14 04:38:23 +04:00
|
|
|
CPUM68KState *env;
|
2007-06-03 15:13:39 +04:00
|
|
|
int kernel_size;
|
|
|
|
uint64_t elf_entry;
|
2012-10-23 14:30:10 +04:00
|
|
|
hwaddr entry;
|
2007-06-03 15:13:39 +04:00
|
|
|
qemu_irq *pic;
|
2011-08-08 22:21:47 +04:00
|
|
|
MemoryRegion *address_space_mem = get_system_memory();
|
|
|
|
MemoryRegion *ram = g_new(MemoryRegion, 1);
|
|
|
|
MemoryRegion *sram = g_new(MemoryRegion, 1);
|
2007-06-03 15:13:39 +04:00
|
|
|
|
2013-01-18 17:15:09 +04:00
|
|
|
if (!cpu_model) {
|
2007-06-03 15:13:39 +04:00
|
|
|
cpu_model = "m5208";
|
2013-01-18 17:15:09 +04:00
|
|
|
}
|
|
|
|
cpu = cpu_m68k_init(cpu_model);
|
|
|
|
if (!cpu) {
|
2007-11-10 18:15:54 +03:00
|
|
|
fprintf(stderr, "Unable to find m68k CPU definition\n");
|
|
|
|
exit(1);
|
2007-06-03 15:13:39 +04:00
|
|
|
}
|
2013-01-18 17:15:09 +04:00
|
|
|
env = &cpu->env;
|
2007-06-03 15:13:39 +04:00
|
|
|
|
|
|
|
/* Initialize CPU registers. */
|
|
|
|
env->vbr = 0;
|
|
|
|
/* TODO: Configure BARs. */
|
|
|
|
|
2009-04-10 00:05:49 +04:00
|
|
|
/* DRAM at 0x40000000 */
|
2015-03-25 01:11:03 +03:00
|
|
|
memory_region_allocate_system_memory(ram, NULL, "mcf5208.ram", ram_size);
|
2011-08-08 22:21:47 +04:00
|
|
|
memory_region_add_subregion(address_space_mem, 0x40000000, ram);
|
2007-06-03 15:13:39 +04:00
|
|
|
|
|
|
|
/* Internal SRAM. */
|
Fix bad error handling after memory_region_init_ram()
Symptom:
$ qemu-system-x86_64 -m 10000000
Unexpected error in ram_block_add() at /work/armbru/qemu/exec.c:1456:
upstream-qemu: cannot set up guest memory 'pc.ram': Cannot allocate memory
Aborted (core dumped)
Root cause: commit ef701d7 screwed up handling of out-of-memory
conditions. Before the commit, we report the error and exit(1), in
one place, ram_block_add(). The commit lifts the error handling up
the call chain some, to three places. Fine. Except it uses
&error_abort in these places, changing the behavior from exit(1) to
abort(), and thus undoing the work of commit 3922825 "exec: Don't
abort when we can't allocate guest memory".
The three places are:
* memory_region_init_ram()
Commit 4994653 (right after commit ef701d7) lifted the error
handling further, through memory_region_init_ram(), multiplying the
incorrect use of &error_abort. Later on, imitation of existing
(bad) code may have created more.
* memory_region_init_ram_ptr()
The &error_abort is still there.
* memory_region_init_rom_device()
Doesn't need fixing, because commit 33e0eb5 (soon after commit
ef701d7) lifted the error handling further, and in the process
changed it from &error_abort to passing it up the call chain.
Correct, because the callers are realize() methods.
Fix the error handling after memory_region_init_ram() with a
Coccinelle semantic patch:
@r@
expression mr, owner, name, size, err;
position p;
@@
memory_region_init_ram(mr, owner, name, size,
(
- &error_abort
+ &error_fatal
|
err@p
)
);
@script:python@
p << r.p;
@@
print "%s:%s:%s" % (p[0].file, p[0].line, p[0].column)
When the last argument is &error_abort, it gets replaced by
&error_fatal. This is the fix.
If the last argument is anything else, its position is reported. This
lets us check the fix is complete. Four positions get reported:
* ram_backend_memory_alloc()
Error is passed up the call chain, ultimately through
user_creatable_complete(). As far as I can tell, it's callers all
handle the error sanely.
* fsl_imx25_realize(), fsl_imx31_realize(), dp8393x_realize()
DeviceClass.realize() methods, errors handled sanely further up the
call chain.
We're good. Test case again behaves:
$ qemu-system-x86_64 -m 10000000
qemu-system-x86_64: cannot set up guest memory 'pc.ram': Cannot allocate memory
[Exit 1 ]
The next commits will repair the rest of commit ef701d7's damage.
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <1441983105-26376-3-git-send-email-armbru@redhat.com>
Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
2015-09-11 17:51:43 +03:00
|
|
|
memory_region_init_ram(sram, NULL, "mcf5208.sram", 16384, &error_fatal);
|
2011-12-20 17:59:12 +04:00
|
|
|
vmstate_register_ram_global(sram);
|
2011-08-08 22:21:47 +04:00
|
|
|
memory_region_add_subregion(address_space_mem, 0x80000000, sram);
|
2007-06-03 15:13:39 +04:00
|
|
|
|
|
|
|
/* Internal peripherals. */
|
2013-01-18 17:15:09 +04:00
|
|
|
pic = mcf_intc_init(address_space_mem, 0xfc048000, cpu);
|
2007-06-03 15:13:39 +04:00
|
|
|
|
2011-11-24 17:31:13 +04:00
|
|
|
mcf_uart_mm_init(address_space_mem, 0xfc060000, pic[26], serial_hds[0]);
|
|
|
|
mcf_uart_mm_init(address_space_mem, 0xfc064000, pic[27], serial_hds[1]);
|
|
|
|
mcf_uart_mm_init(address_space_mem, 0xfc068000, pic[28], serial_hds[2]);
|
2007-06-03 15:13:39 +04:00
|
|
|
|
2011-08-08 22:21:47 +04:00
|
|
|
mcf5208_sys_init(address_space_mem, pic);
|
2007-06-03 15:13:39 +04:00
|
|
|
|
2007-06-04 04:31:01 +04:00
|
|
|
if (nb_nics > 1) {
|
|
|
|
fprintf(stderr, "Too many NICs\n");
|
|
|
|
exit(1);
|
|
|
|
}
|
2012-07-24 19:35:11 +04:00
|
|
|
if (nd_table[0].used)
|
2011-11-24 17:31:14 +04:00
|
|
|
mcf_fec_init(address_space_mem, &nd_table[0],
|
|
|
|
0xfc030000, pic + 36);
|
2007-06-04 04:31:01 +04:00
|
|
|
|
2007-06-03 15:13:39 +04:00
|
|
|
/* 0xfc000000 SCM. */
|
|
|
|
/* 0xfc004000 XBS. */
|
|
|
|
/* 0xfc008000 FlexBus CS. */
|
2007-06-04 04:31:01 +04:00
|
|
|
/* 0xfc030000 FEC. */
|
2007-06-03 15:13:39 +04:00
|
|
|
/* 0xfc040000 SCM + Power management. */
|
|
|
|
/* 0xfc044000 eDMA. */
|
|
|
|
/* 0xfc048000 INTC. */
|
|
|
|
/* 0xfc058000 I2C. */
|
|
|
|
/* 0xfc05c000 QSPI. */
|
|
|
|
/* 0xfc060000 UART0. */
|
|
|
|
/* 0xfc064000 UART0. */
|
|
|
|
/* 0xfc068000 UART0. */
|
|
|
|
/* 0xfc070000 DMA timers. */
|
|
|
|
/* 0xfc080000 PIT0. */
|
|
|
|
/* 0xfc084000 PIT1. */
|
|
|
|
/* 0xfc088000 EPORT. */
|
|
|
|
/* 0xfc08c000 Watchdog. */
|
|
|
|
/* 0xfc090000 clock module. */
|
|
|
|
/* 0xfc0a0000 CCM + reset. */
|
|
|
|
/* 0xfc0a4000 GPIO. */
|
|
|
|
/* 0xfc0a8000 SDRAM controller. */
|
|
|
|
|
|
|
|
/* Load kernel. */
|
|
|
|
if (!kernel_filename) {
|
2013-07-29 20:47:21 +04:00
|
|
|
if (qtest_enabled()) {
|
|
|
|
return;
|
|
|
|
}
|
2007-06-03 15:13:39 +04:00
|
|
|
fprintf(stderr, "Kernel image must be specified\n");
|
|
|
|
exit(1);
|
|
|
|
}
|
|
|
|
|
2010-03-14 23:20:59 +03:00
|
|
|
kernel_size = load_elf(kernel_filename, NULL, NULL, &elf_entry,
|
2016-03-04 14:30:21 +03:00
|
|
|
NULL, NULL, 1, EM_68K, 0, 0);
|
2007-06-03 15:13:39 +04:00
|
|
|
entry = elf_entry;
|
|
|
|
if (kernel_size < 0) {
|
2014-10-19 07:42:22 +04:00
|
|
|
kernel_size = load_uimage(kernel_filename, &entry, NULL, NULL,
|
|
|
|
NULL, NULL);
|
2007-06-03 15:13:39 +04:00
|
|
|
}
|
|
|
|
if (kernel_size < 0) {
|
2009-04-10 00:05:49 +04:00
|
|
|
kernel_size = load_image_targphys(kernel_filename, 0x40000000,
|
|
|
|
ram_size);
|
|
|
|
entry = 0x40000000;
|
2007-06-03 15:13:39 +04:00
|
|
|
}
|
|
|
|
if (kernel_size < 0) {
|
|
|
|
fprintf(stderr, "qemu: could not load kernel '%s'\n", kernel_filename);
|
|
|
|
exit(1);
|
|
|
|
}
|
|
|
|
|
|
|
|
env->pc = entry;
|
|
|
|
}
|
|
|
|
|
2015-09-04 21:37:08 +03:00
|
|
|
static void mcf5208evb_machine_init(MachineClass *mc)
|
2009-05-21 03:38:09 +04:00
|
|
|
{
|
2015-09-04 21:37:08 +03:00
|
|
|
mc->desc = "MCF5206EVB";
|
|
|
|
mc->init = mcf5208evb_init;
|
|
|
|
mc->is_default = 1;
|
2009-05-21 03:38:09 +04:00
|
|
|
}
|
|
|
|
|
2015-09-04 21:37:08 +03:00
|
|
|
DEFINE_MACHINE("mcf5208evb", mcf5208evb_machine_init)
|