2012-06-27 08:50:44 +04:00
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/*
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* QEMU sPAPR IOMMU (TCE) code
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*
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* Copyright (c) 2010 David Gibson, IBM Corporation <dwg@au1.ibm.com>
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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2013-02-04 18:40:22 +04:00
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#include "hw/hw.h"
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2012-12-17 21:20:04 +04:00
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#include "sysemu/kvm.h"
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2013-02-04 18:40:22 +04:00
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#include "hw/qdev.h"
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2012-06-27 08:50:44 +04:00
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#include "kvm_ppc.h"
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2012-12-17 21:20:04 +04:00
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#include "sysemu/dma.h"
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2012-12-17 21:19:49 +04:00
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#include "exec/address-spaces.h"
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2013-08-29 12:05:00 +04:00
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#include "trace.h"
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2012-06-27 08:50:44 +04:00
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2013-02-05 20:06:20 +04:00
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#include "hw/ppc/spapr.h"
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2012-06-27 08:50:44 +04:00
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#include <libfdt.h>
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enum sPAPRTCEAccess {
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SPAPR_TCE_FAULT = 0,
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SPAPR_TCE_RO = 1,
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SPAPR_TCE_WO = 2,
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SPAPR_TCE_RW = 3,
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};
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2014-05-27 09:36:36 +04:00
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#define IOMMU_PAGE_SIZE(shift) (1ULL << (shift))
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#define IOMMU_PAGE_MASK(shift) (~(IOMMU_PAGE_SIZE(shift) - 1))
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2014-05-03 00:34:40 +04:00
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static QLIST_HEAD(spapr_tce_tables, sPAPRTCETable) spapr_tce_tables;
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2012-06-27 08:50:44 +04:00
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static sPAPRTCETable *spapr_tce_find_by_liobn(uint32_t liobn)
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{
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sPAPRTCETable *tcet;
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2013-04-29 22:33:51 +04:00
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if (liobn & 0xFFFFFFFF00000000ULL) {
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hcall_dprintf("Request for out-of-bounds LIOBN 0x" TARGET_FMT_lx "\n",
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liobn);
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return NULL;
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}
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2012-06-27 08:50:44 +04:00
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QLIST_FOREACH(tcet, &spapr_tce_tables, list) {
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if (tcet->liobn == liobn) {
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return tcet;
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}
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}
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return NULL;
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}
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2014-08-16 09:55:37 +04:00
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static IOMMUTLBEntry spapr_tce_translate_iommu(MemoryRegion *iommu, hwaddr addr,
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bool is_write)
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2012-06-27 08:50:44 +04:00
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{
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2013-04-11 14:35:33 +04:00
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sPAPRTCETable *tcet = container_of(iommu, sPAPRTCETable, iommu);
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2012-06-27 08:50:44 +04:00
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uint64_t tce;
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2013-08-29 12:05:00 +04:00
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IOMMUTLBEntry ret = {
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.target_as = &address_space_memory,
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.iova = 0,
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.translated_addr = 0,
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.addr_mask = ~(hwaddr)0,
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.perm = IOMMU_NONE,
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};
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2012-06-27 08:50:44 +04:00
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2012-09-12 20:57:20 +04:00
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if (tcet->bypass) {
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2013-08-29 12:05:00 +04:00
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ret.perm = IOMMU_RW;
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2014-05-27 09:36:36 +04:00
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} else if ((addr >> tcet->page_shift) < tcet->nb_table) {
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2013-08-29 12:05:00 +04:00
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/* Check if we are in bound */
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2014-05-27 09:36:36 +04:00
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hwaddr page_mask = IOMMU_PAGE_MASK(tcet->page_shift);
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tce = tcet->table[addr >> tcet->page_shift];
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ret.iova = addr & page_mask;
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ret.translated_addr = tce & page_mask;
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ret.addr_mask = ~page_mask;
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2014-07-14 16:09:43 +04:00
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ret.perm = tce & IOMMU_RW;
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2012-06-27 08:50:44 +04:00
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}
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2013-08-29 12:05:00 +04:00
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trace_spapr_iommu_xlate(tcet->liobn, addr, ret.iova, ret.perm,
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ret.addr_mask);
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2012-06-27 08:50:44 +04:00
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2013-08-29 12:05:00 +04:00
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return ret;
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2013-04-16 17:05:06 +04:00
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}
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2013-07-18 23:32:58 +04:00
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static const VMStateDescription vmstate_spapr_tce_table = {
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.name = "spapr_iommu",
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2014-05-27 09:36:35 +04:00
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.version_id = 2,
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.minimum_version_id = 2,
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.fields = (VMStateField []) {
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2013-07-18 23:32:58 +04:00
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/* Sanity check */
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VMSTATE_UINT32_EQUAL(liobn, sPAPRTCETable),
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2014-05-27 09:36:35 +04:00
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VMSTATE_UINT32_EQUAL(nb_table, sPAPRTCETable),
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2013-07-18 23:32:58 +04:00
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/* IOMMU state */
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VMSTATE_BOOL(bypass, sPAPRTCETable),
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VMSTATE_VARRAY_UINT32(table, sPAPRTCETable, nb_table, 0, vmstate_info_uint64, uint64_t),
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VMSTATE_END_OF_LIST()
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},
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};
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2013-04-11 14:35:33 +04:00
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static MemoryRegionIOMMUOps spapr_iommu_ops = {
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.translate = spapr_tce_translate_iommu,
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};
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2012-06-27 08:50:44 +04:00
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2013-07-18 23:32:58 +04:00
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static int spapr_tce_table_realize(DeviceState *dev)
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2012-06-27 08:50:44 +04:00
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{
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2013-07-18 23:32:58 +04:00
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sPAPRTCETable *tcet = SPAPR_TCE_TABLE(dev);
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2012-06-27 08:50:44 +04:00
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if (kvm_enabled()) {
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2013-07-18 23:32:58 +04:00
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tcet->table = kvmppc_create_spapr_tce(tcet->liobn,
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2014-05-27 09:36:35 +04:00
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tcet->nb_table <<
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2014-05-27 09:36:36 +04:00
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tcet->page_shift,
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2014-06-10 09:39:21 +04:00
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&tcet->fd,
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tcet->vfio_accel);
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2012-06-27 08:50:44 +04:00
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}
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if (!tcet->table) {
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2014-05-27 09:36:35 +04:00
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size_t table_size = tcet->nb_table * sizeof(uint64_t);
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2012-06-27 08:50:44 +04:00
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tcet->table = g_malloc0(table_size);
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}
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2013-08-29 12:05:00 +04:00
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trace_spapr_iommu_new_table(tcet->liobn, tcet, tcet->table, tcet->fd);
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2012-06-27 08:50:44 +04:00
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2013-07-18 23:32:58 +04:00
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memory_region_init_iommu(&tcet->iommu, OBJECT(dev), &spapr_iommu_ops,
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2014-05-27 09:36:32 +04:00
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"iommu-spapr", ram_size);
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2013-04-11 14:35:33 +04:00
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2012-06-27 08:50:44 +04:00
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QLIST_INSERT_HEAD(&spapr_tce_tables, tcet, list);
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2014-05-12 12:46:32 +04:00
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vmstate_register(DEVICE(tcet), tcet->liobn, &vmstate_spapr_tce_table,
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tcet);
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2013-07-18 23:32:58 +04:00
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return 0;
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}
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2014-05-27 09:36:35 +04:00
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sPAPRTCETable *spapr_tce_new_table(DeviceState *owner, uint32_t liobn,
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2014-05-27 09:36:37 +04:00
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uint64_t bus_offset,
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2014-05-27 09:36:36 +04:00
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uint32_t page_shift,
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2014-06-10 09:39:21 +04:00
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uint32_t nb_table,
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bool vfio_accel)
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2013-07-18 23:32:58 +04:00
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{
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sPAPRTCETable *tcet;
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if (spapr_tce_find_by_liobn(liobn)) {
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fprintf(stderr, "Attempted to create TCE table with duplicate"
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" LIOBN 0x%x\n", liobn);
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return NULL;
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}
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2014-05-27 09:36:35 +04:00
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if (!nb_table) {
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2013-07-18 23:32:58 +04:00
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return NULL;
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}
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tcet = SPAPR_TCE_TABLE(object_new(TYPE_SPAPR_TCE_TABLE));
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tcet->liobn = liobn;
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2014-05-27 09:36:37 +04:00
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tcet->bus_offset = bus_offset;
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2014-05-27 09:36:36 +04:00
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tcet->page_shift = page_shift;
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2014-05-27 09:36:35 +04:00
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tcet->nb_table = nb_table;
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2014-06-10 09:39:21 +04:00
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tcet->vfio_accel = vfio_accel;
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2013-07-18 23:32:58 +04:00
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object_property_add_child(OBJECT(owner), "tce-table", OBJECT(tcet), NULL);
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2014-05-27 09:36:34 +04:00
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object_property_set_bool(OBJECT(tcet), true, "realized", NULL);
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2013-07-18 23:32:58 +04:00
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2013-04-10 19:30:48 +04:00
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return tcet;
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2012-06-27 08:50:44 +04:00
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}
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2013-07-18 23:32:58 +04:00
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static void spapr_tce_table_finalize(Object *obj)
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2012-06-27 08:50:44 +04:00
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{
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2013-07-18 23:32:58 +04:00
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sPAPRTCETable *tcet = SPAPR_TCE_TABLE(obj);
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2013-04-10 19:30:48 +04:00
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QLIST_REMOVE(tcet, list);
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2012-06-27 08:50:44 +04:00
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2013-04-10 19:30:48 +04:00
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if (!kvm_enabled() ||
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(kvmppc_remove_spapr_tce(tcet->table, tcet->fd,
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2014-05-27 09:36:35 +04:00
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tcet->nb_table) != 0)) {
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2013-04-10 19:30:48 +04:00
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g_free(tcet->table);
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2012-06-27 08:50:44 +04:00
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}
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}
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2013-04-11 14:35:33 +04:00
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MemoryRegion *spapr_tce_get_iommu(sPAPRTCETable *tcet)
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{
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return &tcet->iommu;
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}
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2013-04-10 19:30:48 +04:00
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void spapr_tce_set_bypass(sPAPRTCETable *tcet, bool bypass)
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{
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2012-09-12 20:57:20 +04:00
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tcet->bypass = bypass;
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}
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2013-07-18 23:32:58 +04:00
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static void spapr_tce_reset(DeviceState *dev)
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2012-09-12 20:57:14 +04:00
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{
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2013-07-18 23:32:58 +04:00
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sPAPRTCETable *tcet = SPAPR_TCE_TABLE(dev);
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2014-05-27 09:36:35 +04:00
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size_t table_size = tcet->nb_table * sizeof(uint64_t);
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2012-09-12 20:57:14 +04:00
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2012-09-12 20:57:20 +04:00
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tcet->bypass = false;
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memset(tcet->table, 0, table_size);
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2012-09-12 20:57:14 +04:00
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}
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2012-06-27 08:50:46 +04:00
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static target_ulong put_tce_emu(sPAPRTCETable *tcet, target_ulong ioba,
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target_ulong tce)
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{
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2013-04-11 14:35:33 +04:00
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IOMMUTLBEntry entry;
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2014-05-27 09:36:36 +04:00
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hwaddr page_mask = IOMMU_PAGE_MASK(tcet->page_shift);
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2014-05-27 09:36:37 +04:00
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unsigned long index = (ioba - tcet->bus_offset) >> tcet->page_shift;
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2012-06-27 08:50:46 +04:00
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2014-05-27 09:36:37 +04:00
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if (index >= tcet->nb_table) {
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2013-04-29 22:33:52 +04:00
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hcall_dprintf("spapr_vio_put_tce on out-of-bounds IOBA 0x"
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2012-06-27 08:50:46 +04:00
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TARGET_FMT_lx "\n", ioba);
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return H_PARAMETER;
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}
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2014-05-27 09:36:37 +04:00
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tcet->table[index] = tce;
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2012-06-27 08:50:46 +04:00
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2013-04-11 14:35:33 +04:00
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entry.target_as = &address_space_memory,
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2014-05-27 09:36:36 +04:00
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entry.iova = ioba & page_mask;
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entry.translated_addr = tce & page_mask;
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entry.addr_mask = ~page_mask;
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2014-07-14 16:09:43 +04:00
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entry.perm = tce & IOMMU_RW;
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2013-04-11 14:35:33 +04:00
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memory_region_notify_iommu(&tcet->iommu, entry);
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2012-06-27 08:50:46 +04:00
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return H_SUCCESS;
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}
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2012-06-27 08:50:44 +04:00
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2014-05-27 09:36:30 +04:00
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static target_ulong h_put_tce_indirect(PowerPCCPU *cpu,
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sPAPREnvironment *spapr,
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target_ulong opcode, target_ulong *args)
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{
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int i;
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target_ulong liobn = args[0];
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target_ulong ioba = args[1];
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target_ulong ioba1 = ioba;
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target_ulong tce_list = args[2];
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target_ulong npages = args[3];
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target_ulong ret = H_PARAMETER;
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sPAPRTCETable *tcet = spapr_tce_find_by_liobn(liobn);
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CPUState *cs = CPU(cpu);
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2014-05-27 09:36:36 +04:00
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hwaddr page_mask, page_size;
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2014-05-27 09:36:30 +04:00
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if (!tcet) {
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return H_PARAMETER;
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}
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2014-05-27 09:36:36 +04:00
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if ((npages > 512) || (tce_list & SPAPR_TCE_PAGE_MASK)) {
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2014-05-27 09:36:30 +04:00
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return H_PARAMETER;
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}
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2014-05-27 09:36:36 +04:00
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page_mask = IOMMU_PAGE_MASK(tcet->page_shift);
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page_size = IOMMU_PAGE_SIZE(tcet->page_shift);
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ioba &= page_mask;
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for (i = 0; i < npages; ++i, ioba += page_size) {
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target_ulong off = (tce_list & ~SPAPR_TCE_RW) +
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i * sizeof(target_ulong);
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target_ulong tce = ldq_phys(cs->as, off);
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2014-05-27 09:36:30 +04:00
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ret = put_tce_emu(tcet, ioba, tce);
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if (ret) {
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break;
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}
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}
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/* Trace last successful or the first problematic entry */
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i = i ? (i - 1) : 0;
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trace_spapr_iommu_indirect(liobn, ioba1, tce_list, i,
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ldq_phys(cs->as,
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tce_list + i * sizeof(target_ulong)),
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|
|
|
ret);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static target_ulong h_stuff_tce(PowerPCCPU *cpu, sPAPREnvironment *spapr,
|
|
|
|
target_ulong opcode, target_ulong *args)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
target_ulong liobn = args[0];
|
|
|
|
target_ulong ioba = args[1];
|
|
|
|
target_ulong tce_value = args[2];
|
|
|
|
target_ulong npages = args[3];
|
|
|
|
target_ulong ret = H_PARAMETER;
|
|
|
|
sPAPRTCETable *tcet = spapr_tce_find_by_liobn(liobn);
|
2014-05-27 09:36:36 +04:00
|
|
|
hwaddr page_mask, page_size;
|
2014-05-27 09:36:30 +04:00
|
|
|
|
|
|
|
if (!tcet) {
|
|
|
|
return H_PARAMETER;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (npages > tcet->nb_table) {
|
|
|
|
return H_PARAMETER;
|
|
|
|
}
|
|
|
|
|
2014-05-27 09:36:36 +04:00
|
|
|
page_mask = IOMMU_PAGE_MASK(tcet->page_shift);
|
|
|
|
page_size = IOMMU_PAGE_SIZE(tcet->page_shift);
|
|
|
|
ioba &= page_mask;
|
2014-05-27 09:36:30 +04:00
|
|
|
|
2014-05-27 09:36:36 +04:00
|
|
|
for (i = 0; i < npages; ++i, ioba += page_size) {
|
2014-05-27 09:36:30 +04:00
|
|
|
ret = put_tce_emu(tcet, ioba, tce_value);
|
|
|
|
if (ret) {
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
trace_spapr_iommu_stuff(liobn, ioba, tce_value, npages, ret);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2012-05-03 08:23:01 +04:00
|
|
|
static target_ulong h_put_tce(PowerPCCPU *cpu, sPAPREnvironment *spapr,
|
2012-06-27 08:50:44 +04:00
|
|
|
target_ulong opcode, target_ulong *args)
|
|
|
|
{
|
|
|
|
target_ulong liobn = args[0];
|
|
|
|
target_ulong ioba = args[1];
|
|
|
|
target_ulong tce = args[2];
|
2013-08-29 12:05:00 +04:00
|
|
|
target_ulong ret = H_PARAMETER;
|
2012-06-27 08:50:44 +04:00
|
|
|
sPAPRTCETable *tcet = spapr_tce_find_by_liobn(liobn);
|
|
|
|
|
2012-06-27 08:50:46 +04:00
|
|
|
if (tcet) {
|
2014-05-27 09:36:36 +04:00
|
|
|
hwaddr page_mask = IOMMU_PAGE_MASK(tcet->page_shift);
|
|
|
|
|
|
|
|
ioba &= page_mask;
|
|
|
|
|
2013-08-29 12:05:00 +04:00
|
|
|
ret = put_tce_emu(tcet, ioba, tce);
|
2012-06-27 08:50:46 +04:00
|
|
|
}
|
2013-08-29 12:05:00 +04:00
|
|
|
trace_spapr_iommu_put(liobn, ioba, tce, ret);
|
2012-06-27 08:50:44 +04:00
|
|
|
|
2013-08-29 12:05:00 +04:00
|
|
|
return ret;
|
2012-06-27 08:50:44 +04:00
|
|
|
}
|
|
|
|
|
2014-02-21 13:29:06 +04:00
|
|
|
static target_ulong get_tce_emu(sPAPRTCETable *tcet, target_ulong ioba,
|
|
|
|
target_ulong *tce)
|
|
|
|
{
|
2014-05-27 09:36:37 +04:00
|
|
|
unsigned long index = (ioba - tcet->bus_offset) >> tcet->page_shift;
|
|
|
|
|
|
|
|
if (index >= tcet->nb_table) {
|
2014-02-21 13:29:06 +04:00
|
|
|
hcall_dprintf("spapr_iommu_get_tce on out-of-bounds IOBA 0x"
|
|
|
|
TARGET_FMT_lx "\n", ioba);
|
|
|
|
return H_PARAMETER;
|
|
|
|
}
|
|
|
|
|
2014-05-27 09:36:37 +04:00
|
|
|
*tce = tcet->table[index];
|
2014-02-21 13:29:06 +04:00
|
|
|
|
|
|
|
return H_SUCCESS;
|
|
|
|
}
|
|
|
|
|
|
|
|
static target_ulong h_get_tce(PowerPCCPU *cpu, sPAPREnvironment *spapr,
|
|
|
|
target_ulong opcode, target_ulong *args)
|
|
|
|
{
|
|
|
|
target_ulong liobn = args[0];
|
|
|
|
target_ulong ioba = args[1];
|
|
|
|
target_ulong tce = 0;
|
|
|
|
target_ulong ret = H_PARAMETER;
|
|
|
|
sPAPRTCETable *tcet = spapr_tce_find_by_liobn(liobn);
|
|
|
|
|
|
|
|
if (tcet) {
|
2014-05-27 09:36:36 +04:00
|
|
|
hwaddr page_mask = IOMMU_PAGE_MASK(tcet->page_shift);
|
|
|
|
|
|
|
|
ioba &= page_mask;
|
|
|
|
|
2014-02-21 13:29:06 +04:00
|
|
|
ret = get_tce_emu(tcet, ioba, &tce);
|
|
|
|
if (!ret) {
|
|
|
|
args[0] = tce;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
trace_spapr_iommu_get(liobn, ioba, ret, tce);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2012-06-27 08:50:44 +04:00
|
|
|
int spapr_dma_dt(void *fdt, int node_off, const char *propname,
|
2012-08-07 20:10:38 +04:00
|
|
|
uint32_t liobn, uint64_t window, uint32_t size)
|
2012-06-27 08:50:44 +04:00
|
|
|
{
|
2012-08-07 20:10:38 +04:00
|
|
|
uint32_t dma_prop[5];
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
dma_prop[0] = cpu_to_be32(liobn);
|
|
|
|
dma_prop[1] = cpu_to_be32(window >> 32);
|
|
|
|
dma_prop[2] = cpu_to_be32(window & 0xFFFFFFFF);
|
|
|
|
dma_prop[3] = 0; /* window size is 32 bits */
|
|
|
|
dma_prop[4] = cpu_to_be32(size);
|
|
|
|
|
|
|
|
ret = fdt_setprop_cell(fdt, node_off, "ibm,#dma-address-cells", 2);
|
|
|
|
if (ret < 0) {
|
|
|
|
return ret;
|
|
|
|
}
|
2012-06-27 08:50:44 +04:00
|
|
|
|
2012-08-07 20:10:38 +04:00
|
|
|
ret = fdt_setprop_cell(fdt, node_off, "ibm,#dma-size-cells", 2);
|
|
|
|
if (ret < 0) {
|
|
|
|
return ret;
|
|
|
|
}
|
2012-06-27 08:50:44 +04:00
|
|
|
|
2012-08-07 20:10:38 +04:00
|
|
|
ret = fdt_setprop(fdt, node_off, propname, dma_prop, sizeof(dma_prop));
|
|
|
|
if (ret < 0) {
|
|
|
|
return ret;
|
2012-06-27 08:50:44 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
2012-08-07 20:10:38 +04:00
|
|
|
|
|
|
|
int spapr_tcet_dma_dt(void *fdt, int node_off, const char *propname,
|
2013-04-10 19:30:48 +04:00
|
|
|
sPAPRTCETable *tcet)
|
2012-08-07 20:10:38 +04:00
|
|
|
{
|
2013-04-10 19:30:48 +04:00
|
|
|
if (!tcet) {
|
2012-08-07 20:10:38 +04:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2013-04-10 19:30:48 +04:00
|
|
|
return spapr_dma_dt(fdt, node_off, propname,
|
2014-05-27 09:36:36 +04:00
|
|
|
tcet->liobn, 0, tcet->nb_table << tcet->page_shift);
|
2012-08-07 20:10:38 +04:00
|
|
|
}
|
2013-07-18 23:32:58 +04:00
|
|
|
|
|
|
|
static void spapr_tce_table_class_init(ObjectClass *klass, void *data)
|
|
|
|
{
|
|
|
|
DeviceClass *dc = DEVICE_CLASS(klass);
|
|
|
|
dc->init = spapr_tce_table_realize;
|
|
|
|
dc->reset = spapr_tce_reset;
|
|
|
|
|
|
|
|
QLIST_INIT(&spapr_tce_tables);
|
|
|
|
|
|
|
|
/* hcall-tce */
|
|
|
|
spapr_register_hypercall(H_PUT_TCE, h_put_tce);
|
2014-02-21 13:29:06 +04:00
|
|
|
spapr_register_hypercall(H_GET_TCE, h_get_tce);
|
2014-05-27 09:36:30 +04:00
|
|
|
spapr_register_hypercall(H_PUT_TCE_INDIRECT, h_put_tce_indirect);
|
|
|
|
spapr_register_hypercall(H_STUFF_TCE, h_stuff_tce);
|
2013-07-18 23:32:58 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
static TypeInfo spapr_tce_table_info = {
|
|
|
|
.name = TYPE_SPAPR_TCE_TABLE,
|
|
|
|
.parent = TYPE_DEVICE,
|
|
|
|
.instance_size = sizeof(sPAPRTCETable),
|
|
|
|
.class_init = spapr_tce_table_class_init,
|
|
|
|
.instance_finalize = spapr_tce_table_finalize,
|
|
|
|
};
|
|
|
|
|
|
|
|
static void register_types(void)
|
|
|
|
{
|
|
|
|
type_register_static(&spapr_tce_table_info);
|
|
|
|
}
|
|
|
|
|
|
|
|
type_init(register_types);
|