2018-04-05 17:35:11 +03:00
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# i386 cross compile notes
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I386_SRC=$(SRC_PATH)/tests/tcg/i386
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# Set search path for all sources
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VPATH += $(I386_SRC)
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2022-09-29 14:42:04 +03:00
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config-cc.mak: Makefile
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$(quiet-@)( \
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$(call cc-option,-fno-pie, CROSS_CC_HAS_I386_NOPIE)) 3> config-cc.mak
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-include config-cc.mak
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2018-04-05 17:35:11 +03:00
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I386_SRCS=$(notdir $(wildcard $(I386_SRC)/*.c))
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2019-08-07 17:35:22 +03:00
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ALL_X86_TESTS=$(I386_SRCS:.c=)
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2022-09-02 02:38:07 +03:00
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SKIP_I386_TESTS=test-i386-ssse3 test-avx test-3dnow test-mmx
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target/i386: fix ADOX followed by ADCX
When ADCX is followed by ADOX or vice versa, the second instruction's
carry comes from EFLAGS and the condition codes use the CC_OP_ADCOX
operation. Retrieving the carry from EFLAGS is handled by this bit
of gen_ADCOX:
tcg_gen_extract_tl(carry_in, cpu_cc_src,
ctz32(cc_op == CC_OP_ADCX ? CC_C : CC_O), 1);
Unfortunately, in this case cc_op has been overwritten by the previous
"if" statement to CC_OP_ADCOX. This works by chance when the first
instruction is ADCX; however, if the first instruction is ADOX,
ADCX will incorrectly take its carry from OF instead of CF.
Fix by moving the computation of the new cc_op at the end of the function.
The included exhaustive test case fails without this patch and passes
afterwards.
Because ADCX/ADOX need not be invoked through the VEX prefix, this
regression bisects to commit 16fc5726a6e2 ("target/i386: reimplement
0x0f 0x38, add AVX", 2022-10-18). However, the mistake happened a
little earlier, when BMI instructions were rewritten using the new
decoder framework.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1471
Reported-by: Paul Jolly <https://gitlab.com/myitcv>
Fixes: 1d0b926150e5 ("target/i386: move scalar 0F 38 and 0F 3A instruction to new decoder", 2022-10-18)
Cc: qemu-stable@nongnu.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-01-31 11:48:03 +03:00
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X86_64_TESTS:=$(filter test-i386-adcox test-i386-bmi2 $(SKIP_I386_TESTS), $(ALL_X86_TESTS))
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2018-04-05 17:35:11 +03:00
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2020-06-26 02:58:31 +03:00
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test-i386-sse-exceptions: CFLAGS += -msse4.1 -mfpmath=sse
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run-test-i386-sse-exceptions: QEMU_OPTS += -cpu max
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target/i386: correct fix for pcmpxstrx substring search
This corrects a bug introduced in my previous fix for SSE4.2 pcmpestri
/ pcmpestrm / pcmpistri / pcmpistrm substring search, commit
ae35eea7e4a9f21dd147406dfbcd0c4c6aaf2a60.
That commit fixed a bug that showed up in four GCC tests with one libc
implementation. The tests in question generate random inputs to the
intrinsics and compare results to a C implementation, but they only
test 1024 possible random inputs, and when the tests use the cases of
those instructions that work with word rather than byte inputs, it's
easy to have problematic cases that show up much less frequently than
that. Thus, testing with a different libc implementation, and so a
different random number generator, showed up a problem with the
previous patch.
When investigating the previous test failures, I found the description
of these instructions in the Intel manuals (starting from computing a
16x16 or 8x8 set of comparison results) confusing and hard to match up
with the more optimized implementation in QEMU, and referred to AMD
manuals which described the instructions in a different way. Those
AMD descriptions are very explicit that the whole of the string being
searched for must be found in the other operand, not running off the
end of that operand; they say "If the prototype and the SUT are equal
in length, the two strings must be identical for the comparison to be
TRUE.". However, that statement is incorrect.
In my previous commit message, I noted:
The operation in this case is a search for a string (argument d to
the helper) in another string (argument s to the helper); if a copy
of d at a particular position would run off the end of s, the
resulting output bit should be 0 whether or not the strings match in
the region where they overlap, but the QEMU implementation was
wrongly comparing only up to the point where s ends and counting it
as a match if an initial segment of d matched a terminal segment of
s. Here, "run off the end of s" means that some byte of d would
overlap some byte outside of s; thus, if d has zero length, it is
considered to match everywhere, including after the end of s.
The description "some byte of d would overlap some byte outside of s"
is accurate only when understood to refer to overlapping some byte
*within the 16-byte operand* but at or after the zero terminator; it
is valid to run over the end of s if the end of s is the end of the
16-byte operand. So the fix in the previous patch for the case of d
being empty was correct, but the other part of that patch was not
correct (as it never allowed partial matches even at the end of the
16-byte operand). Nor was the code before the previous patch correct
for the case of d nonempty, as it would always have allowed partial
matches at the end of s.
Fix with a partial revert of my previous change, combined with
inserting a check for the special case of s having maximum length to
determine where it is necessary to check for matches.
In the added test, test 1 is for the case of empty strings, which
failed before my 2017 patch, test 2 is for the bug introduced by my
2017 patch and test 3 deals with the case where a match of an initial
segment at the end of the string is not valid when the string ends
before the end of the 16-byte operand (that is, the case that would be
broken by a simple revert of the non-empty-string part of my 2017
patch).
Signed-off-by: Joseph Myers <joseph@codesourcery.com>
Message-Id: <alpine.DEB.2.21.2006121344290.9881@digraph.polyomino.org.uk>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-06-12 16:45:23 +03:00
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test-i386-pcmpistri: CFLAGS += -msse4.2
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run-test-i386-pcmpistri: QEMU_OPTS += -cpu max
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2022-08-25 13:58:18 +03:00
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test-i386-bmi2: CFLAGS=-O2
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2020-11-23 15:17:47 +03:00
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run-test-i386-bmi2: QEMU_OPTS += -cpu max
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target/i386: fix ADOX followed by ADCX
When ADCX is followed by ADOX or vice versa, the second instruction's
carry comes from EFLAGS and the condition codes use the CC_OP_ADCOX
operation. Retrieving the carry from EFLAGS is handled by this bit
of gen_ADCOX:
tcg_gen_extract_tl(carry_in, cpu_cc_src,
ctz32(cc_op == CC_OP_ADCX ? CC_C : CC_O), 1);
Unfortunately, in this case cc_op has been overwritten by the previous
"if" statement to CC_OP_ADCOX. This works by chance when the first
instruction is ADCX; however, if the first instruction is ADOX,
ADCX will incorrectly take its carry from OF instead of CF.
Fix by moving the computation of the new cc_op at the end of the function.
The included exhaustive test case fails without this patch and passes
afterwards.
Because ADCX/ADOX need not be invoked through the VEX prefix, this
regression bisects to commit 16fc5726a6e2 ("target/i386: reimplement
0x0f 0x38, add AVX", 2022-10-18). However, the mistake happened a
little earlier, when BMI instructions were rewritten using the new
decoder framework.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1471
Reported-by: Paul Jolly <https://gitlab.com/myitcv>
Fixes: 1d0b926150e5 ("target/i386: move scalar 0F 38 and 0F 3A instruction to new decoder", 2022-10-18)
Cc: qemu-stable@nongnu.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-01-31 11:48:03 +03:00
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test-i386-adcox: CFLAGS=-O2
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run-test-i386-adcox: QEMU_OPTS += -cpu max
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2023-06-01 21:28:17 +03:00
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test-aes: CFLAGS += -O -msse2 -maes
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test-aes: test-aes-main.c.inc
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run-test-aes: QEMU_OPTS += -cpu max
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2018-04-05 17:35:11 +03:00
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#
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# hello-i386 is a barebones app
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#
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hello-i386: CFLAGS+=-ffreestanding
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hello-i386: LDFLAGS+=-nostdlib
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2021-04-01 13:25:25 +03:00
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# test-386 includes a couple of additional objects that need to be
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# linked together, we also need a no-pie capable compiler due to the
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# non-pic calls into 16-bit mode
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2022-04-19 12:10:07 +03:00
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ifneq ($(CROSS_CC_HAS_I386_NOPIE),)
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2021-04-01 13:25:25 +03:00
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test-i386: CFLAGS += -fno-pie
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2018-04-05 17:35:11 +03:00
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test-i386: test-i386.c test-i386-code16.S test-i386-vm86.S test-i386.h test-i386-shift.h test-i386-muldiv.h
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2019-08-07 17:35:22 +03:00
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$(CC) $(CFLAGS) $(LDFLAGS) $(EXTRA_CFLAGS) -o $@ \
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2018-04-05 17:35:11 +03:00
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$(<D)/test-i386.c $(<D)/test-i386-code16.S $(<D)/test-i386-vm86.S -lm
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2021-04-01 13:25:25 +03:00
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else
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test-i386:
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$(call skip-test, "BUILD of $@", "missing -no-pie compiler support")
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run-test-i386:
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$(call skip-test, "RUN of test-i386", "not built")
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endif
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2018-04-17 16:56:39 +03:00
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2018-04-10 17:23:29 +03:00
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ifeq ($(SPEED), slow)
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test-i386-fprem.ref: test-i386-fprem
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$(call quiet-command, ./$< > $@,"GENREF","generating $@")
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run-test-i386-fprem: TIMEOUT=60
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2019-07-05 13:48:02 +03:00
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run-test-i386-fprem: test-i386-fprem test-i386-fprem.ref
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2022-09-29 14:42:03 +03:00
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$(call run-test,test-i386-fprem, $(QEMU) $<)
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2019-07-05 13:48:02 +03:00
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$(call diff-out,test-i386-fprem, test-i386-fprem.ref)
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2018-04-10 17:23:29 +03:00
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else
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2019-10-11 15:07:22 +03:00
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SKIP_I386_TESTS+=test-i386-fprem
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2018-04-10 17:23:29 +03:00
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endif
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2019-10-11 15:07:22 +03:00
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# Update TESTS
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I386_TESTS:=$(filter-out $(SKIP_I386_TESTS), $(ALL_X86_TESTS))
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TESTS=$(MULTIARCH_TESTS) $(I386_TESTS)
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2018-04-17 16:56:39 +03:00
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# On i386 and x86_64 Linux only supports 4k pages (large pages are a different hack)
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EXTRA_RUNS+=run-test-mmap-4096
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2022-02-25 20:20:16 +03:00
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sha512-sse: CFLAGS=-msse4.1 -O3
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sha512-sse: sha512.c
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$(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS)
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run-sha512-sse: QEMU_OPTS+=-cpu max
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TESTS+=sha512-sse
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2022-04-25 01:02:03 +03:00
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2022-09-02 02:38:07 +03:00
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CLEANFILES += test-avx.h test-mmx.h test-3dnow.h
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test-3dnow.h: test-mmx.py x86.csv
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$(PYTHON) $(I386_SRC)/test-mmx.py $(I386_SRC)/x86.csv $@ 3DNOW
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test-mmx.h: test-mmx.py x86.csv
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$(PYTHON) $(I386_SRC)/test-mmx.py $(I386_SRC)/x86.csv $@ MMX SSE SSE2 SSE3 SSSE3
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2022-04-25 01:02:03 +03:00
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test-avx.h: test-avx.py x86.csv
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$(PYTHON) $(I386_SRC)/test-avx.py $(I386_SRC)/x86.csv $@
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2022-09-02 02:38:07 +03:00
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test-3dnow: CFLAGS += -masm=intel -O -I.
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run-test-3dnow: QEMU_OPTS += -cpu max
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test-3dnow: test-3dnow.h
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test-mmx: CFLAGS += -masm=intel -O -I.
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run-test-mmx: QEMU_OPTS += -cpu max
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test-mmx: test-mmx.h
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2022-09-20 19:00:03 +03:00
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test-avx: CFLAGS += -mavx -masm=intel -O -I.
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2022-09-02 02:38:07 +03:00
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run-test-avx: QEMU_OPTS += -cpu max
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2022-04-25 01:02:03 +03:00
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test-avx: test-avx.h
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