2016-06-06 18:59:31 +03:00
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/*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2 or later, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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2016-06-29 11:12:57 +03:00
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#ifndef HW_PL011_H
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#define HW_PL011_H
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2016-06-06 18:59:31 +03:00
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2019-02-21 21:17:46 +03:00
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#include "hw/sysbus.h"
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#include "chardev/char-fe.h"
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2020-09-03 23:43:22 +03:00
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#include "qom/object.h"
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2019-02-21 21:17:46 +03:00
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#define TYPE_PL011 "pl011"
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2020-09-16 21:25:19 +03:00
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OBJECT_DECLARE_SIMPLE_TYPE(PL011State, PL011)
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2019-02-21 21:17:46 +03:00
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/* This shares the same struct (and cast macro) as the base pl011 device */
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#define TYPE_PL011_LUMINARY "pl011_luminary"
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2023-01-23 19:23:00 +03:00
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/* Depth of UART FIFO in bytes, when FIFO mode is enabled (else depth == 1) */
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#define PL011_FIFO_DEPTH 16
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2020-09-03 23:43:22 +03:00
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struct PL011State {
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2019-02-21 21:17:46 +03:00
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SysBusDevice parent_obj;
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MemoryRegion iomem;
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uint32_t readbuff;
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uint32_t flags;
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uint32_t lcr;
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uint32_t rsr;
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uint32_t cr;
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uint32_t dmacr;
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uint32_t int_enabled;
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uint32_t int_level;
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2023-01-23 19:23:00 +03:00
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uint32_t read_fifo[PL011_FIFO_DEPTH];
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2019-02-21 21:17:46 +03:00
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uint32_t ilpr;
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uint32_t ibrd;
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uint32_t fbrd;
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uint32_t ifl;
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int read_pos;
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int read_count;
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int read_trigger;
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CharBackend chr;
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2019-02-21 21:17:46 +03:00
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qemu_irq irq[6];
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2020-10-10 16:57:58 +03:00
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Clock *clk;
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2021-03-18 05:38:01 +03:00
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bool migrate_clk;
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2019-02-21 21:17:46 +03:00
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const unsigned char *id;
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2020-09-03 23:43:22 +03:00
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};
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2019-02-21 21:17:46 +03:00
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2023-02-20 14:51:08 +03:00
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DeviceState *pl011_create(hwaddr addr, qemu_irq irq, Chardev *chr);
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2016-06-06 18:59:31 +03:00
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#endif
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