2020-05-20 16:19:47 +03:00
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/* Support for generating ACPI tables and passing them to Guests
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*
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* Copyright (C) 2008-2010 Kevin O'Connor <kevin@koconnor.net>
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* Copyright (C) 2006 Fabrice Bellard
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* Copyright (C) 2013 Red Hat Inc
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*
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* Author: Michael S. Tsirkin <mst@redhat.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "exec/memory.h"
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#include "hw/acpi/acpi.h"
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#include "hw/acpi/aml-build.h"
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#include "hw/acpi/utils.h"
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#include "hw/i386/pc.h"
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#include "target/i386/cpu.h"
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#include "acpi-build.h"
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#include "acpi-common.h"
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void pc_madt_cpu_entry(AcpiDeviceIf *adev, int uid,
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const CPUArchIdList *apic_ids, GArray *entry)
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{
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uint32_t apic_id = apic_ids->cpus[uid].arch_id;
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/* ACPI spec says that LAPIC entry for non present
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* CPU may be omitted from MADT or it must be marked
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* as disabled. However omitting non present CPU from
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* MADT breaks hotplug on linux. So possible CPUs
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* should be put in MADT but kept disabled.
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*/
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if (apic_id < 255) {
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AcpiMadtProcessorApic *apic = acpi_data_push(entry, sizeof *apic);
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apic->type = ACPI_APIC_PROCESSOR;
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apic->length = sizeof(*apic);
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apic->processor_id = uid;
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apic->local_apic_id = apic_id;
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if (apic_ids->cpus[uid].cpu != NULL) {
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apic->flags = cpu_to_le32(1);
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} else {
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apic->flags = cpu_to_le32(0);
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}
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} else {
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AcpiMadtProcessorX2Apic *apic = acpi_data_push(entry, sizeof *apic);
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apic->type = ACPI_APIC_LOCAL_X2APIC;
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apic->length = sizeof(*apic);
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apic->uid = cpu_to_le32(uid);
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apic->x2apic_id = cpu_to_le32(apic_id);
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if (apic_ids->cpus[uid].cpu != NULL) {
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apic->flags = cpu_to_le32(1);
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} else {
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apic->flags = cpu_to_le32(0);
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}
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}
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}
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void acpi_build_madt(GArray *table_data, BIOSLinker *linker,
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2021-01-19 03:32:13 +03:00
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X86MachineState *x86ms, AcpiDeviceIf *adev,
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const char *oem_id, const char *oem_table_id)
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2020-05-20 16:19:47 +03:00
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{
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MachineClass *mc = MACHINE_GET_CLASS(x86ms);
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const CPUArchIdList *apic_ids = mc->possible_cpu_arch_ids(MACHINE(x86ms));
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int madt_start = table_data->len;
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AcpiDeviceIfClass *adevc = ACPI_DEVICE_IF_GET_CLASS(adev);
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bool x2apic_mode = false;
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AcpiMultipleApicTable *madt;
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AcpiMadtIoApic *io_apic;
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AcpiMadtIntsrcovr *intsrcovr;
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int i;
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madt = acpi_data_push(table_data, sizeof *madt);
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madt->local_apic_address = cpu_to_le32(APIC_DEFAULT_ADDRESS);
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madt->flags = cpu_to_le32(1);
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for (i = 0; i < apic_ids->len; i++) {
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adevc->madt_cpu(adev, i, apic_ids, table_data);
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if (apic_ids->cpus[i].arch_id > 254) {
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x2apic_mode = true;
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}
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}
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io_apic = acpi_data_push(table_data, sizeof *io_apic);
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io_apic->type = ACPI_APIC_IO;
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io_apic->length = sizeof(*io_apic);
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io_apic->io_apic_id = ACPI_BUILD_IOAPIC_ID;
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io_apic->address = cpu_to_le32(IO_APIC_DEFAULT_ADDRESS);
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io_apic->interrupt = cpu_to_le32(0);
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2020-12-03 13:54:14 +03:00
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if (x86ms->ioapic2) {
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AcpiMadtIoApic *io_apic2;
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io_apic2 = acpi_data_push(table_data, sizeof *io_apic);
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io_apic2->type = ACPI_APIC_IO;
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io_apic2->length = sizeof(*io_apic);
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io_apic2->io_apic_id = ACPI_BUILD_IOAPIC_ID + 1;
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io_apic2->address = cpu_to_le32(IO_APIC_SECONDARY_ADDRESS);
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io_apic2->interrupt = cpu_to_le32(IO_APIC_SECONDARY_IRQBASE);
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}
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2020-05-20 16:19:47 +03:00
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if (x86ms->apic_xrupt_override) {
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intsrcovr = acpi_data_push(table_data, sizeof *intsrcovr);
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intsrcovr->type = ACPI_APIC_XRUPT_OVERRIDE;
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intsrcovr->length = sizeof(*intsrcovr);
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intsrcovr->source = 0;
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intsrcovr->gsi = cpu_to_le32(2);
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intsrcovr->flags = cpu_to_le16(0); /* conforms to bus specifications */
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}
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2020-05-20 16:19:48 +03:00
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2020-10-16 14:38:33 +03:00
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for (i = 1; i < 16; i++) {
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if (!(x86ms->pci_irq_mask & (1 << i))) {
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/* No need for a INT source override structure. */
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continue;
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2020-05-20 16:19:47 +03:00
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}
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2020-10-16 14:38:33 +03:00
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intsrcovr = acpi_data_push(table_data, sizeof *intsrcovr);
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intsrcovr->type = ACPI_APIC_XRUPT_OVERRIDE;
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intsrcovr->length = sizeof(*intsrcovr);
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intsrcovr->source = i;
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intsrcovr->gsi = cpu_to_le32(i);
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intsrcovr->flags = cpu_to_le16(0xd); /* active high, level triggered */
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2020-05-20 16:19:47 +03:00
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}
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if (x2apic_mode) {
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AcpiMadtLocalX2ApicNmi *local_nmi;
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local_nmi = acpi_data_push(table_data, sizeof *local_nmi);
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local_nmi->type = ACPI_APIC_LOCAL_X2APIC_NMI;
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local_nmi->length = sizeof(*local_nmi);
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local_nmi->uid = 0xFFFFFFFF; /* all processors */
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local_nmi->flags = cpu_to_le16(0);
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local_nmi->lint = 1; /* ACPI_LINT1 */
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} else {
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AcpiMadtLocalNmi *local_nmi;
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local_nmi = acpi_data_push(table_data, sizeof *local_nmi);
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local_nmi->type = ACPI_APIC_LOCAL_NMI;
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local_nmi->length = sizeof(*local_nmi);
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local_nmi->processor_id = 0xff; /* all processors */
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local_nmi->flags = cpu_to_le16(0);
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local_nmi->lint = 1; /* ACPI_LINT1 */
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}
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build_header(linker, table_data,
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(void *)(table_data->data + madt_start), "APIC",
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2021-01-19 03:32:13 +03:00
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table_data->len - madt_start, 1, oem_id, oem_table_id);
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2020-05-20 16:19:47 +03:00
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}
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