From e5592c61adb0766eaee53ec07d2f05783d1c6548 Mon Sep 17 00:00:00 2001 From: Heikki Linnakangas Date: Tue, 9 Jul 2013 11:31:26 +0300 Subject: [PATCH] Fix memory barrier support on icc on ia64, 2nd attempt. Itanium doesn't have the mfence instruction - that's a 386 thing. Use the "mf" instruction instead. This reverts the previous commit to add "#include "; the problem was not with a missing #include. --- src/include/storage/barrier.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/src/include/storage/barrier.h b/src/include/storage/barrier.h index a54a74c1a3..5df3ab1a84 100644 --- a/src/include/storage/barrier.h +++ b/src/include/storage/barrier.h @@ -53,8 +53,12 @@ extern slock_t dummy_spinlock; /* * icc defines __GNUC__, but doesn't support gcc's inline asm syntax */ -#include +#if defined(__ia64__) || defined(__ia64) +#define pg_memory_barrier() __mf() +#else if defined(__i386__) || defined(__x86_64__) #define pg_memory_barrier() _mm_mfence() +#endif + #define pg_compiler_barrier() __memory_barrier() #elif defined(__GNUC__)