108 lines
4.2 KiB
C
108 lines
4.2 KiB
C
/*******************************************************************************
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Copyright (c) 2016-2023 NVIDIA Corporation
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to
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deal in the Software without restriction, including without limitation the
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rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
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sell copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be
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included in all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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DEALINGS IN THE SOFTWARE.
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*******************************************************************************/
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#include "uvm_hal.h"
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#include "uvm_gpu.h"
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#include "uvm_mem.h"
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#include "uvm_pascal_fault_buffer.h"
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static unsigned uvm_force_prefetch_fault_support = 0;
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module_param(uvm_force_prefetch_fault_support, uint, S_IRUGO);
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void uvm_hal_pascal_arch_init_properties(uvm_parent_gpu_t *parent_gpu)
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{
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parent_gpu->tlb_batch.va_invalidate_supported = true;
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parent_gpu->tlb_batch.va_range_invalidate_supported = false;
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// TODO: Bug 1767241: Run benchmarks to figure out a good number
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parent_gpu->tlb_batch.max_pages = 32;
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parent_gpu->utlb_per_gpc_count = uvm_pascal_get_utlbs_per_gpc(parent_gpu);
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parent_gpu->fault_buffer_info.replayable.utlb_count = parent_gpu->rm_info.gpcCount * parent_gpu->utlb_per_gpc_count;
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{
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uvm_fault_buffer_entry_t *dummy;
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UVM_ASSERT(parent_gpu->fault_buffer_info.replayable.utlb_count <= (1 << (sizeof(dummy->fault_source.utlb_id) * 8)));
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}
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// A single top level PDE on Pascal covers 128 TB and that's the minimum
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// size that can be used.
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parent_gpu->rm_va_base = 0;
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parent_gpu->rm_va_size = 128 * UVM_SIZE_1TB;
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parent_gpu->uvm_mem_va_base = 384 * UVM_SIZE_1TB;
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parent_gpu->uvm_mem_va_size = UVM_MEM_VA_SIZE;
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parent_gpu->ce_phys_vidmem_write_supported = true;
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parent_gpu->peer_copy_mode = UVM_GPU_PEER_COPY_MODE_VIRTUAL;
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// Not all units on Pascal support 49-bit addressing, including those which
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// access channel buffers.
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parent_gpu->max_channel_va = 1ULL << 40;
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parent_gpu->max_host_va = 1ULL << 40;
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// Pascal can map sysmem with any page size
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parent_gpu->can_map_sysmem_with_large_pages = true;
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// Prefetch faults are disabled by default in Pascal
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parent_gpu->prefetch_fault_supported = uvm_force_prefetch_fault_support != 0;
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// Pascal and Volta require post-invalidate membars to flush out HSHUB. See
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// bug 1975028. GP10x chips do not have HSHUB, so they don't need any.
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UVM_ASSERT(parent_gpu->rm_info.gpuArch == NV2080_CTRL_MC_ARCH_INFO_ARCHITECTURE_GP100);
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if (parent_gpu->rm_info.gpuImplementation == NV2080_CTRL_MC_ARCH_INFO_IMPLEMENTATION_GP100 ||
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parent_gpu->rm_info.gpuImplementation == NV2080_CTRL_MC_ARCH_INFO_IMPLEMENTATION_GP000) {
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parent_gpu->num_hshub_tlb_invalidate_membars = 2;
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}
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else
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parent_gpu->num_hshub_tlb_invalidate_membars = 0;
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// Pascal cannot place GPFIFO in vidmem
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parent_gpu->gpfifo_in_vidmem_supported = false;
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parent_gpu->replayable_faults_supported = true;
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parent_gpu->non_replayable_faults_supported = false;
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parent_gpu->access_counters_supported = false;
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parent_gpu->access_counters_can_use_physical_addresses = false;
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parent_gpu->fault_cancel_va_supported = false;
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parent_gpu->scoped_atomics_supported = false;
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parent_gpu->sparse_mappings_supported = true;
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parent_gpu->map_remap_larger_page_promotion = false;
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parent_gpu->smc.supported = false;
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parent_gpu->plc_supported = false;
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parent_gpu->no_ats_range_required = false;
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}
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