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200d15479c
With the exception of a fenv implementation, the port is fully featured. The port has been tested in or1ksim, the golden reference functional simulator for OpenRISC 1000. It passes all libc-test tests (except the math tests that requires a fenv implementation). The port assumes an or1k implementation that has support for atomic instructions (l.lwa/l.swa). Although it passes all the libc-test tests, the port is still in an experimental state, and has yet experienced very little 'real-world' use.
18 lines
465 B
C
18 lines
465 B
C
/* or1k use variant I, but with the twist that tp points to the end of TCB */
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static inline struct pthread *__pthread_self()
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{
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#ifdef __clang__
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char *tp;
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__asm__ __volatile__ ("l.ori %0, r10, 0" : "=r" (tp) );
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#else
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register char *tp __asm__("r10");
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#endif
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return (struct pthread *) (tp - sizeof(struct pthread));
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}
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#define TLS_ABOVE_TP
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#define TP_ADJ(p) ((char *)(p) + sizeof(struct pthread))
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/* word-offset to 'pc' in mcontext_t */
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#define CANCEL_REG_IP 32
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