Rich Felker bcad484394 fix missing barrier instructions in mips atomic asm
previously I had wrongly assumed the ll/sc instructions also provided
memory synchronization; apparently they do not. this commit adds sync
instructions before and after each atomic operation and changes the
atomic store to simply use sync before and after a plain store, rather
than a useless compare-and-swap.
2014-07-19 15:51:12 -04:00
..
2014-06-19 02:50:45 -04:00
2014-06-19 15:26:04 -04:00