d4190815a3
This will apply to bare-arm and minimal, as well as the minimal unix variant. Change the default to MICROPY_QSTR_BYTES_IN_HASH=1 for the CORE,BASIC levels, 2 for >=EXTRA. Removes explicit setting of MICROPY_QSTR_BYTES_IN_HASH==1 in ports that don't set the feature level (because 1 is implied by the default level, CORE). Applies to cc3200, pic16bt, powerpc. Removes explicit setting for nRF (which sets feature level). Also for samd, which sets CORE for d21 and FULL for d51. This means that d21 is unchanged with MICROPY_QSTR_BYTES_IN_HASH==1, but d51 now moves from 1 to 2 (roughly adds 1kiB). The only remaining port which explicitly set bytes-in-hash is rp2 because it's high-flash (hence CORE level) but lowish-SRAM, so it's worthwhile saving the RAM for runtime qstrs. This work was funded through GitHub Sponsors. Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
The PowerPC port that runs on microwatt and qemu
This port is intended to be a minimal MicroPython port that runs in QEMU, microwatt simulator with ghdl or microwatt on Xilinx FPGA with potato UART.
Building
By default the port will be built with the potato uart for microwatt:
$ make
To instead build for a machine with LPC serial, such as QEMU powernv:
$ make UART=lpc_serial
Cross compilation for POWERPC
If you need to cross compilers you'll want to grab a powerpc64le compiler (not powerpc or powerpc64).
On Ubuntu (18.04) you'll want:
$ apt install gcc-powerpc64le-linux-gnu
(Use CROSS_COMPILE=powerpc64le-linux-gnu-)
If your distro doesn't have cross compilers, you can get cross compilers here:
- https://toolchains.bootlin.com/ (use CROSS_COMPILE=powerpc64le-buildroot-linux-gnu-)
(Avoid musl libc as it defines __assert_fail() differently to glibc which breaks the micropython powerpc code)
Then do:
$ make CROSS_COMPILE=<compiler prefix>
Building will produce the build/firmware.bin file which can be used QEMU or microwatt.
To run in QEMU use:
$ ./qemu-system-ppc64 -M powernv -cpu POWER9 -nographic -bios build/firmware.bin