Damien George 480a7ce58f stmhal: Change SPI phase spec to 0,1 to match standard conventions. ...

Was 1 or 2, now 0 or 1 (respectively).  0 means sample MISO on first
edge, 1 means sample on second edge.

Addresses issue #936.

2014-10-26 13:54:31 +00:00

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accel.py

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accel.py.exp

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adc.py

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adc.py.exp

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can.py

tests: Add simple CAN test.

2014-10-02 17:32:02 +01:00

can.py.exp

tests: Add simple CAN test.

2014-10-02 17:32:02 +01:00

dac.py

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dac.py.exp

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extint.py

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extint.py.exp

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i2c.py

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i2c.py.exp

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irq.py

tests: Add test for pyb.disable_irq and pyb.enable_irq.

2014-08-25 18:44:10 +01:00

irq.py.exp

tests: Add test for pyb.disable_irq and pyb.enable_irq.

2014-08-25 18:44:10 +01:00

led.py

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led.py.exp

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modtime.py

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modtime.py.exp

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pin.py

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pin.py.exp

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pyb1.py

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pyb1.py.exp

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rtc.py

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rtc.py.exp

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servo.py

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servo.py.exp

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spi.py

stmhal: Change SPI phase spec to 0,1 to match standard conventions.

2014-10-26 13:54:31 +00:00

spi.py.exp

stmhal: Change SPI phase spec to 0,1 to match standard conventions.

2014-10-26 13:54:31 +00:00

switch.py

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switch.py.exp

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timer.py

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timer.py.exp

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uart.py

stmhal: Overhaul UART class to use read/write, and improve it.

2014-10-21 22:15:20 +01:00

uart.py.exp

stmhal: Overhaul UART class to use read/write, and improve it.

2014-10-21 22:15:20 +01:00