ca220b5fc5
Add custom NLR support for 64 bits RISC-V RV64I targets. Signed-off-by: Alessandro Gatti <a.gatti@frob.it>
82 lines
3.2 KiB
C
82 lines
3.2 KiB
C
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2024 Alessandro Gatti
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "py/mpstate.h"
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#if MICROPY_NLR_RV64I
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#undef nlr_push
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__attribute__((naked)) unsigned int nlr_push(nlr_buf_t *nlr) {
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__asm volatile (
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"sd x1, 16(x10) \n" // Store RA.
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"sd x8, 24(x10) \n" // Store S0.
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"sd x9, 32(x10) \n" // Store S1.
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"sd x18, 40(x10) \n" // Store S2.
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"sd x19, 48(x10) \n" // Store S3.
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"sd x20, 56(x10) \n" // Store S4.
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"sd x21, 64(x10) \n" // Store S5.
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"sd x22, 72(x10) \n" // Store S6.
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"sd x23, 80(x10) \n" // Store S7.
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"sd x24, 88(x10) \n" // Store S8.
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"sd x25, 96(x10) \n" // Store S9.
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"sd x26, 104(x10) \n" // Store S10.
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"sd x27, 112(x10) \n" // Store S11.
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"sd x2, 120(x10) \n" // Store SP.
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"jal x0, nlr_push_tail \n" // Jump to the C part.
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);
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}
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NORETURN void nlr_jump(void *val) {
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MP_NLR_JUMP_HEAD(val, top)
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__asm volatile (
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"add x10, x0, %0 \n" // Load nlr_buf address.
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"ld x1, 16(x10) \n" // Retrieve RA.
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"ld x8, 24(x10) \n" // Retrieve S0.
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"ld x9, 32(x10) \n" // Retrieve S1.
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"ld x18, 40(x10) \n" // Retrieve S2.
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"ld x19, 48(x10) \n" // Retrieve S3.
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"ld x20, 56(x10) \n" // Retrieve S4.
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"ld x21, 64(x10) \n" // Retrieve S5.
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"ld x22, 72(x10) \n" // Retrieve S6.
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"ld x23, 80(x10) \n" // Retrieve S7.
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"ld x24, 88(x10) \n" // Retrieve S8.
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"ld x25, 96(x10) \n" // Retrieve S9.
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"ld x26, 104(x10) \n" // Retrieve S10.
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"ld x27, 112(x10) \n" // Retrieve S11.
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"ld x2, 120(x10) \n" // Retrieve SP.
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"addi x10, x0, 1 \n" // Return 1 for a non-local return.
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"jalr x0, x1, 0 \n" // Return.
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: // Outputs.
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: "r" (top) // Inputs.
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: "memory" // Clobbered.
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);
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MP_UNREACHABLE
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}
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#endif // MICROPY_NLR_RV64I
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