From b603066bc2d272d05033705922e515d50318e735 Mon Sep 17 00:00:00 2001
From: iabdalkader <i.abdalkader@gmail.com>
Date: Tue, 8 Dec 2020 01:55:50 +0200
Subject: [PATCH] stm32/sdram: Add SDRAM enter/leave self-refresh mode
 functions.

These functions enable SDRAM data retention in stop mode.  Example usage,
in mpconfigboard.h:

    #define MICROPY_BOARD_ENTER_STOP sdram_enter_low_power();
    #define MICROPY_BOARD_LEAVE_STOP sdram_leave_low_power();
---
 ports/stm32/sdram.c | 22 ++++++++++++++++++++--
 ports/stm32/sdram.h |  2 ++
 2 files changed, 22 insertions(+), 2 deletions(-)

diff --git a/ports/stm32/sdram.c b/ports/stm32/sdram.c
index 0aae74e116..e8892b5746 100644
--- a/ports/stm32/sdram.c
+++ b/ports/stm32/sdram.c
@@ -49,8 +49,7 @@
 
 #ifdef FMC_SDRAM_BANK
 
-static void sdram_init_seq(SDRAM_HandleTypeDef
-    *hsdram, FMC_SDRAM_CommandTypeDef *command);
+static void sdram_init_seq(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_CommandTypeDef *command);
 extern void __fatal_error(const char *msg);
 
 bool sdram_init(void) {
@@ -254,6 +253,25 @@ static void sdram_init_seq(SDRAM_HandleTypeDef
     #endif
 }
 
+void sdram_enter_low_power(void) {
+    // Enter self-refresh mode.
+    // In self-refresh mode the SDRAM retains data with external clocking.
+    FMC_SDRAM_DEVICE->SDCMR |= (FMC_SDRAM_CMD_SELFREFRESH_MODE |     // Command Mode
+        FMC_SDRAM_CMD_TARGET_BANK |                                  // Command Target
+        (0 << 5U) |                                                  // Auto Refresh Number -1
+        (0 << 9U));                                                  // Mode Register Definition
+}
+
+void sdram_leave_low_power(void) {
+    // Exit self-refresh mode.
+    // Self-refresh mode is exited when the device is accessed or the mode bits are
+    // set to Normal mode, so technically it's not necessary to call this functions.
+    FMC_SDRAM_DEVICE->SDCMR |= (FMC_SDRAM_CMD_NORMAL_MODE |          // Command Mode
+        FMC_SDRAM_CMD_TARGET_BANK |                                  // Command Target
+        (0 << 5U) |                                                  // Auto Refresh Number - 1
+        (0 << 9U));                                                  // Mode Register Definition
+}
+
 bool sdram_test(bool fast) {
     uint8_t const pattern = 0xaa;
     uint8_t const antipattern = 0x55;
diff --git a/ports/stm32/sdram.h b/ports/stm32/sdram.h
index 9b4b4fb83e..773a30802f 100644
--- a/ports/stm32/sdram.h
+++ b/ports/stm32/sdram.h
@@ -11,5 +11,7 @@
 bool sdram_init(void);
 void *sdram_start(void);
 void *sdram_end(void);
+void sdram_enter_low_power(void);
+void sdram_leave_low_power(void);
 bool sdram_test(bool fast);
 #endif // __SDRAM_H__