stmhal: Put all DMA channel & stream definitions in dma.h
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@ -34,6 +34,7 @@
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#include "py/runtime.h"
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#include "py/runtime.h"
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#include "timer.h"
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#include "timer.h"
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#include "dac.h"
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#include "dac.h"
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#include "dma.h"
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#include "pin.h"
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#include "pin.h"
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#include "genhdr/pins.h"
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#include "genhdr/pins.h"
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@ -216,11 +217,11 @@ STATIC mp_obj_t pyb_dac_make_new(mp_obj_t type_in, mp_uint_t n_args, mp_uint_t n
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if (dac_id == 1) {
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if (dac_id == 1) {
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dac->pin = GPIO_PIN_4;
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dac->pin = GPIO_PIN_4;
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dac->dac_channel = DAC_CHANNEL_1;
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dac->dac_channel = DAC_CHANNEL_1;
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dac->dma_stream = DMA1_Stream5;
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dac->dma_stream = DMA_STREAM_DAC1;
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} else if (dac_id == 2) {
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} else if (dac_id == 2) {
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dac->pin = GPIO_PIN_5;
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dac->pin = GPIO_PIN_5;
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dac->dac_channel = DAC_CHANNEL_2;
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dac->dac_channel = DAC_CHANNEL_2;
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dac->dma_stream = DMA1_Stream6;
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dac->dma_stream = DMA_STREAM_DAC2;
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} else {
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} else {
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nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "DAC %d does not exist", dac_id));
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nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "DAC %d does not exist", dac_id));
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}
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}
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@ -396,7 +397,7 @@ mp_obj_t pyb_dac_write_timed(mp_uint_t n_args, const mp_obj_t *pos_args, mp_map_
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DMA_Handle.State = HAL_DMA_STATE_READY;
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DMA_Handle.State = HAL_DMA_STATE_READY;
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HAL_DMA_DeInit(&DMA_Handle);
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HAL_DMA_DeInit(&DMA_Handle);
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DMA_Handle.Init.Channel = DMA_CHANNEL_7;
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DMA_Handle.Init.Channel = DMA_CHANNEL_DAC1; // DAC1 & DAC2 both use the same channel
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DMA_Handle.Init.Direction = DMA_MEMORY_TO_PERIPH;
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DMA_Handle.Init.Direction = DMA_MEMORY_TO_PERIPH;
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DMA_Handle.Init.PeriphInc = DMA_PINC_DISABLE;
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DMA_Handle.Init.PeriphInc = DMA_PINC_DISABLE;
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DMA_Handle.Init.MemInc = DMA_MINC_ENABLE;
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DMA_Handle.Init.MemInc = DMA_MINC_ENABLE;
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58
stmhal/dma.h
58
stmhal/dma.h
@ -24,12 +24,64 @@
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* THE SOFTWARE.
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* THE SOFTWARE.
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*/
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*/
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//TODO: Put stream/channel defs for i2c/spi/can, etc here
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// These are ordered by DMAx_Stream number, and within a stream by channel
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// number. The duplicate streams are ok as long as they aren't used at the
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// same time.
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//
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// Currently I2C and SPI are synchronous and they call dma_init/dma_deinit
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// around each transfer.
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// DMA1 streams
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#define DMA_STREAM_I2C1_RX DMA1_Stream0
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#define DMA_CHANNEL_I2C1_RX DMA_CHANNEL_1
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#define DMA_STREAM_SPI3_RX DMA1_Stream2
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#define DMA_CHANNEL_SPI3_RX DMA_CHANNEL_0
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#define DMA_STREAM_I2C3_RX DMA1_Stream2
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#define DMA_CHANNEL_I2C3_RX DMA_CHANNEL_3
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#define DMA_STREAM_I2C2_RX DMA1_Stream2
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#define DMA_CHANNEL_I2C2_RX DMA_CHANNEL_7
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#define DMA_STREAM_SPI2_RX DMA1_Stream3
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#define DMA_CHANNEL_SPI2_RX DMA_CHANNEL_0
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#define DMA_STREAM_SPI2_TX DMA1_Stream4
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#define DMA_CHANNEL_SPI2_TX DMA_CHANNEL_0
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#define DMA_STREAM_I2C3_TX DMA1_Stream4
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#define DMA_CHANNEL_I2C3_TX DMA_CHANNEL_3
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#define DMA_STREAM_DAC1 DMA1_Stream5
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#define DMA_CHANNEL_DAC1 DMA_CHANNEL_7
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#define DMA_STREAM_DAC2 DMA1_Stream6
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#define DMA_CHANNEL_DAC2 DMA_CHANNEL_7
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#define DMA_STREAM_SPI3_TX DMA1_Stream7
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#define DMA_CHANNEL_SPI3_TX DMA_CHANNEL_0
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#define DMA_STREAM_I2C1_TX DMA1_Stream7
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#define DMA_CHANNEL_I2C1_TX DMA_CHANNEL_1
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#define DMA_STREAM_I2C2_TX DMA1_Stream7
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#define DMA_CHANNEL_I2C2_TX DMA_CHANNEL_7
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// DMA2 streams
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#define DMA_STREAM_SPI1_RX DMA2_Stream2
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#define DMA_CHANNEL_SPI1_RX DMA_CHANNEL_3
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#define DMA_STREAM_SDIO_RX DMA2_Stream3
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#define DMA_STREAM_SDIO_RX DMA2_Stream3
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#define DMA_CHANNEL_SDIO_RX DMA_CHANNEL_4
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#define DMA_CHANNEL_SDIO_RX DMA_CHANNEL_4
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#define DMA_STREAM_SPI1_TX DMA2_Stream5
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#define DMA_CHANNEL_SPI1_TX DMA_CHANNEL_3
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#define DMA_STREAM_SDIO_TX DMA2_Stream6
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#define DMA_STREAM_SDIO_TX DMA2_Stream6
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#define DMA_CHANNEL_SDIO_TX DMA_CHANNEL_4
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#define DMA_CHANNEL_SDIO_TX DMA_CHANNEL_4
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typedef union {
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typedef union {
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uint16_t enabled; // Used to test if both counters are == 0
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uint16_t enabled; // Used to test if both counters are == 0
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@ -134,17 +134,17 @@ I2C_HandleTypeDef I2CHandle3 = {.Instance = NULL};
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STATIC const pyb_i2c_obj_t pyb_i2c_obj[] = {
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STATIC const pyb_i2c_obj_t pyb_i2c_obj[] = {
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#if defined(MICROPY_HW_I2C1_SCL)
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#if defined(MICROPY_HW_I2C1_SCL)
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{{&pyb_i2c_type}, &I2CHandle1, DMA1_Stream7, DMA_CHANNEL_1, DMA1_Stream0, DMA_CHANNEL_1},
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{{&pyb_i2c_type}, &I2CHandle1, DMA_STREAM_I2C1_TX, DMA_CHANNEL_I2C1_TX, DMA_STREAM_I2C1_RX, DMA_CHANNEL_I2C1_RX},
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#else
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#else
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{{&pyb_i2c_type}, NULL, NULL, 0, NULL, 0},
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{{&pyb_i2c_type}, NULL, NULL, 0, NULL, 0},
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#endif
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#endif
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#if defined(MICROPY_HW_I2C2_SCL)
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#if defined(MICROPY_HW_I2C2_SCL)
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{{&pyb_i2c_type}, &I2CHandle2, DMA1_Stream7, DMA_CHANNEL_7, DMA1_Stream2, DMA_CHANNEL_7},
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{{&pyb_i2c_type}, &I2CHandle2, DMA_STREAM_I2C2_TX, DMA_CHANNEL_I2C2_TX, DMA_STREAM_I2C2_RX, DMA_CHANNEL_I2C2_RX},
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#else
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#else
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{{&pyb_i2c_type}, NULL, NULL, 0, NULL, 0},
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{{&pyb_i2c_type}, NULL, NULL, 0, NULL, 0},
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#endif
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#endif
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#if defined(MICROPY_HW_I2C3_SCL)
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#if defined(MICROPY_HW_I2C3_SCL)
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{{&pyb_i2c_type}, &I2CHandle3, DMA1_Stream4, DMA_CHANNEL_3, DMA1_Stream2, DMA_CHANNEL_3},
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{{&pyb_i2c_type}, &I2CHandle3, DMA_STREAM_I2C3_TX, DMA_CHANNEL_I2C3_TX, DMA_STREAM_I2C3_RX, DMA_CHANNEL_I2C3_RX},
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#else
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#else
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{{&pyb_i2c_type}, NULL, NULL, 0, NULL, 0},
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{{&pyb_i2c_type}, NULL, NULL, 0, NULL, 0},
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#endif
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#endif
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@ -114,17 +114,17 @@ SPI_HandleTypeDef SPIHandle3 = {.Instance = NULL};
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STATIC const pyb_spi_obj_t pyb_spi_obj[] = {
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STATIC const pyb_spi_obj_t pyb_spi_obj[] = {
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#if MICROPY_HW_ENABLE_SPI1
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#if MICROPY_HW_ENABLE_SPI1
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{{&pyb_spi_type}, &SPIHandle1, DMA2_Stream5, DMA_CHANNEL_3, DMA2_Stream2, DMA_CHANNEL_3},
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{{&pyb_spi_type}, &SPIHandle1, DMA_STREAM_SPI1_TX, DMA_CHANNEL_SPI1_TX, DMA_STREAM_SPI1_RX, DMA_CHANNEL_SPI1_RX},
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#else
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#else
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{{&pyb_spi_type}, NULL, NULL, 0, NULL, 0},
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{{&pyb_spi_type}, NULL, NULL, 0, NULL, 0},
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#endif
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#endif
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#if MICROPY_HW_ENABLE_SPI2
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#if MICROPY_HW_ENABLE_SPI2
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{{&pyb_spi_type}, &SPIHandle2, DMA1_Stream4, DMA_CHANNEL_0, DMA1_Stream3, DMA_CHANNEL_0},
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{{&pyb_spi_type}, &SPIHandle2, DMA_STREAM_SPI2_TX, DMA_CHANNEL_SPI2_TX, DMA_STREAM_SPI2_RX, DMA_CHANNEL_SPI2_RX},
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#else
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#else
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{{&pyb_spi_type}, NULL, NULL, 0, NULL, 0},
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{{&pyb_spi_type}, NULL, NULL, 0, NULL, 0},
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#endif
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#endif
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#if MICROPY_HW_ENABLE_SPI3
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#if MICROPY_HW_ENABLE_SPI3
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{{&pyb_spi_type}, &SPIHandle3, DMA1_Stream7, DMA_CHANNEL_0, DMA1_Stream2, DMA_CHANNEL_0},
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{{&pyb_spi_type}, &SPIHandle3, DMA_STREAM_SPI3_TX, DMA_CHANNEL_SPI3_TX, DMA_STREAM_SPI3_RX, DMA_CHANNEL_SPI3_RX},
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#else
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#else
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{{&pyb_spi_type}, NULL, NULL, 0, NULL, 0},
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{{&pyb_spi_type}, NULL, NULL, 0, NULL, 0},
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#endif
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#endif
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