81 lines
1.7 KiB
C
81 lines
1.7 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#ifndef CACHE_H
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#define CACHE_H
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/**
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* \file
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*
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* Provides functions to enable, disable, and flush the CPU caches.
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*
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*//*
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* Copyright (C) 2020-2022 Martin Whitaker.
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*/
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/**
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* Disable the CPU caches.
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*/
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static inline void cache_off(void)
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{
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#ifdef __x86_64__
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__asm__ __volatile__ ("\t"
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"movq %%cr0, %%rax \n\t"
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"orl $0x40000000, %%eax \n\t" /* Set CD */
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"movq %%rax, %%cr0 \n\t"
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"wbinvd \n"
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: /* no outputs */
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: /* no inputs */
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: "rax", "memory"
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);
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#else
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__asm__ __volatile__ ("\t"
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"movl %%cr0, %%eax \n\t"
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"orl $0x40000000, %%eax \n\t" /* Set CD */
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"movl %%eax, %%cr0 \n\t"
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"wbinvd \n"
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: /* no outputs */
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: /* no inputs */
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: "eax", "memory"
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);
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#endif
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}
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/**
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* Enable the CPU caches.
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*/
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static inline void cache_on(void)
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{
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#ifdef __x86_64__
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__asm__ __volatile__ ("\t"
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"movq %%cr0, %%rax \n\t"
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"andl $0x9fffffff, %%eax \n\t" /* Clear CD and NW */
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"movq %%rax, %%cr0 \n"
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: /* no outputs */
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: /* no inputs */
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: "rax", "memory"
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);
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#else
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__asm__ __volatile__ ("\t"
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"movl %%cr0, %%eax \n\t"
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"andl $0x9fffffff, %%eax \n\t" /* Clear CD and NW */
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"movl %%eax, %%cr0 \n"
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: /* no outputs */
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: /* no inputs */
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: "eax", "memory"
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);
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#endif
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}
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/**
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* Flush the CPU caches.
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*/
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static inline void cache_flush(void)
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{
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__asm__ __volatile__ ("\t"
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"wbinvd\n"
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: /* no outputs */
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: /* no inputs */
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: "memory"
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);
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}
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#endif // CACHE_H
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