mirror of
https://github.com/memtest86plus/memtest86plus
synced 2025-03-12 17:02:58 +03:00
a10664a251
* move x86/x86-64-specific files to boot/x86, build/i586, build/x86_64, system/x86, system/imc/x86; * move build64/la64 to build/loongarch64; * rename system/imc/loongson to system/img/loongarch.
91 lines
1.7 KiB
C
91 lines
1.7 KiB
C
// SPDX-License-Identifier: GPL-2.0
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// Copyright (C) 2004-2023 Sam Demeulemeester
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//
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// ------------------------
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//
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// Platform-specific code for IMC configuration, ECC support, etc.
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//
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#include <stdbool.h>
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#include "config.h"
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#include "cpuinfo.h"
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#include "memctrl.h"
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#include "imc/imc.h"
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#include "display.h"
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imc_info_t imc = {"UNDEF", 0, 0, 0, 0, 0, 0, 0, 0};
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ecc_info_t ecc_status = {false, ECC_ERR_NONE, 0, 0, 0, 0};
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// ---------------------
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// -- Public function --
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// ---------------------
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void memctrl_init(void)
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{
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ecc_status.ecc_enabled = false;
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if (!enable_mch_read) {
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return;
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}
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switch(imc.family) {
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case IMC_K17:
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case IMC_K19_VRM:
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case IMC_K19_RPL:
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case IMC_K19_RBT:
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case IMC_K1A_GRG:
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get_imc_config_amd_zen();
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break;
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case IMC_SNB:
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case IMC_IVB:
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get_imc_config_intel_snb();
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break;
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case IMC_HSW:
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get_imc_config_intel_hsw();
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break;
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case IMC_SKL:
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case IMC_KBL:
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get_imc_config_intel_skl();
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break;
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case IMC_RKL:
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get_imc_config_intel_icl();
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break;
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case IMC_RPL:
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case IMC_ADL:
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get_imc_config_intel_adl();
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break;
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case IMC_ARL:
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case IMC_MTL:
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get_imc_config_intel_mtl();
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default:
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break;
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}
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// Consistency check
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if (imc.tCL == 0 || imc.tRCD == 0 || imc.tRP == 0 || imc.tRCD == 0) {
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imc.freq = 0;
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}
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}
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void memctrl_poll_ecc(void)
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{
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if (!ecc_status.ecc_enabled) {
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return;
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}
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switch(imc.family) {
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case IMC_K17:
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case IMC_K19_VRM:
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case IMC_K19_RPL:
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case IMC_K19_RBT:
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poll_ecc_amd_zen(true);
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break;
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default:
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break;
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}
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}
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