Commit Graph

  • 43082ec3f7
    Merge 5cdeebea33 into a52ad6aa61 #440 Jonathan Teh 2024-10-17 20:46:15 +0800
  • a52ad6aa61
    system/loongarch: Fix a bug about the memory boundary. (#447) main Chao Li 2024-10-17 20:43:27 +0800
  • 9a9856382a system/loongarch: Fix a bug about the memory boundary. #447 Chao Li 2024-10-17 20:17:13 +0800
  • 7f6d4d5b4e
    Merge 736f9c1525 into f34a85ce07 #429 01e3 2024-10-17 17:16:57 +0800
  • 3748a07a93
    Merge af6120c6bb into f34a85ce07 #343 Scott Lee 2024-10-16 22:12:46 +0200
  • 3480e80d79
    Merge fbb0dec5eb into f34a85ce07 #344 Scott Lee 2024-10-16 22:12:29 +0200
  • b0aba22ae3
    Merge c5d3cd1db7 into f34a85ce07 #421 Tormod Volden 2024-10-03 12:06:52 +0200
  • f3df0a9e18
    Merge 51d6faf1d1 into f34a85ce07 #427 01e3 2024-10-02 17:04:40 +0800
  • b2d1d345e7 Move x86/x86-64-specific files to build32/x86, build64/x86 and system/x86; adjust Github workflows accordingly. multiarch Lionel Debroux 2024-09-29 22:16:55 +0200
  • bf9e1840b9
    Merge 9000ab5097 into f34a85ce07 #435 David Koňařík 2024-09-30 22:16:20 +0200
  • f34a85ce07
    Add support for Intel MTL & ARL CPUs (#441) Sam Demeulemeester 2024-09-30 13:38:13 +0200
  • e0c99d11bd Correct K8 Rev G detection Fix #361 (PR hijacking) #441 Sam Demeulemeester 2024-09-30 02:28:25 +0200
  • 937238d528 Add Live Freq/Timings IMC Polling for Intel MTL & ADL CPUs Sam Demeulemeester 2024-09-30 01:58:40 +0200
  • 60c86c6874 Add support for ARL SMBus Controler Add PCI Device polling on Bus 0x80 (instead of fixed 0x00) Solve issue with DDR5 SPD Bank switching when SPD Write is disabled (using Proc Call) Sam Demeulemeester 2024-09-30 01:57:55 +0200
  • 33ade790e0 Add CPUID detection for MTL & ARL CPUs Sam Demeulemeester 2024-09-30 01:55:15 +0200
  • bfdad115d1
    Merge 0b8c5153f2 into 0a543a41f2 #357 0xAdk 2024-09-28 22:20:31 +0200
  • 0a543a41f2
    x86_64: preserve r8-11 over call to interrupt handler. (#430) martinwhitaker 2024-09-28 21:19:27 +0100
  • 5cdeebea33 temperature: Add support for AMD Excavator #440 Jonathan Teh 2024-09-26 23:52:56 +0100
  • fc70a910ba WIP BROKEN Add SIMD tests for x86 & x86-64: MMX, SSE, SSE2, AVX ( #98 ). simd Lionel Debroux 2023-09-28 23:43:56 +0200
  • c308fd0356 Significantly optimize the bit fade and own addr tests for size, by folding near-identical switch case bodies together, and removing code duplication by merging pattern_fill() and pattern_check(). Also, add a rep stos[lq] path in the bit fade test. debrouxl/experiments Lionel Debroux 2023-10-11 23:37:53 +0200
  • 28b784eff1 Improve the IMC reading code by including IMC support files into */memctrl.c: the Makefile becomes simpler, the build becomes faster, the redundant includes can go away, the resulting binary is more optimized. Lionel Debroux 2023-05-13 21:07:40 +0200
  • df1fddcddb Inline several functions which are simple or have a single caller, to save a bit of space. Lionel Debroux 2022-09-15 22:08:39 +0200
  • edf6b5576d Optimize the JEP106 list by switching from relocated string pointers to offsets from the beginning of a string table, defined in a generated file. Lionel Debroux 2022-08-26 22:16:27 +0200
  • b7f5e91a80 Add beep sound upon pass or failure, based on PIT channel 2. sound demiurg-spb 2024-05-15 16:40:37 +0300
  • 317196ca60 Trace cr0, cr3, cr4 upon processor exception. Lionel Debroux 2023-09-28 23:41:14 +0200
  • d8920db972 WIP BROKEN NX enablement, for now only for the second page directory. Lionel Debroux 2023-01-18 23:36:44 +0100
  • acbdb77c4b Add experimental mode with nontemporal stores (movnt[iq]) in own addr test, the only one where helps with performance across most processors I have access to, both single and multi-socket. Per #79, it saves several dozens of minutes on my 4S Opteron 62xx / 63xx servers equipped with 256 GB of RAM. nontemporal Lionel Debroux 2022-07-13 10:27:44 +0200
  • fa7065125f
    Merge e31e24bda5 into 97922cc4cf #405 Lionel Debroux 2024-09-23 06:58:26 -0500
  • be16fa1b27 Sequential SPD read optimization for DDR4 and DDR5 #437 TommiRommi 2024-09-13 14:53:03 +0000
  • 9000ab5097 Add faulty memory range display mode #435 David Koňařík 2024-09-04 12:41:13 +0200
  • 51d6faf1d1 Bye bye memtest.bin and memtest.efi, long live mt86plus #427 01e3 2024-08-11 16:21:32 -0700
  • 97922cc4cf
    Add LoongArch support (#410) Chao Li 2024-08-30 19:38:46 +0800
  • 7bc4a846e4
    Merge ac5b405c38 into e38ad8e6a4 #387 Tormod Volden 2024-08-20 09:33:39 +0900
  • 482e765ae5 workflows: Add LoongArch64 CI supports #410 Chao Li 2024-08-09 17:04:32 +0800
  • 57d1813dd2 build64/la64: Add LoongArch64 build files Chao Li 2024-06-18 14:27:36 +0800
  • 0b4793e08b boot: Add LoongArch startup and header Chao Li 2024-08-15 11:11:03 +0800
  • d9deb248d7 system/loongarch: Add LoongArch ARCH specific files Chao Li 2024-08-16 10:11:05 +0800
  • aec66014e6 app/loongarch: Add intrrupt handler for LoongArch Chao Li 2024-06-18 11:57:37 +0800
  • be2fd190dc system/imc/loongson: Add Loongson LoongArch IMC support Chao Li 2024-08-14 15:48:36 +0800
  • 2d0d374292 boot/efi: Limiting the ms_abi using scope Chao Li 2024-06-18 10:33:42 +0800
  • d032e2dfb8 boot/efisetup: Add LoongArch CPU halt instruction Chao Li 2024-06-13 15:39:49 +0800
  • 4fd4a2dee3 boot: Adjust the AP stack size for LoongArch Chao Li 2024-06-13 15:31:07 +0800
  • 582a4ea9e9 test/mov_inv_fixed: Add LoongArch ASM version word write operation Chao Li 2024-07-11 15:10:33 +0800
  • 342cca4fb8 test/block_move: Add block move test via ASM for LoongArch Chao Li 2024-07-11 15:07:40 +0800
  • 770eece4c3 app: Add LoongArch version support Chao Li 2024-06-19 11:19:52 +0800
  • c7fbb0a4cc system: Add the way to access PCI memory space via MMIO Chao Li 2024-06-12 17:44:13 +0800
  • ca2b9b0851 system: Add the way to IO access via MMIO Chao Li 2024-07-17 16:22:13 +0800
  • 20ad46c03c system/usbhcd: Add Loongson 7A2000 chipset OHCI BAR offset fix Chao Li 2024-08-13 14:38:50 +0800
  • 4905714ecb system/usbhcd: Add LoongArch MMIO perfix Chao Li 2024-06-12 16:47:54 +0800
  • 1cfd4d6c68 system/tsc: Add LoongArch support Chao Li 2024-06-12 16:25:06 +0800
  • 495d991a45 system/timers: Add LoongArch supports Chao Li 2024-07-11 14:55:11 +0800
  • 4a8f7fa970 system/smp: Add LoongArch SMP support Chao Li 2024-08-16 09:49:44 +0800
  • f3c11e4f38 system/smbus: Rename smbus.c to i2c_x86.c Chao Li 2024-08-08 09:47:55 +0800
  • aaf9aef38f system/serial: Add Loongson CPU serial port support Chao Li 2024-06-18 14:43:02 +0800
  • 180d53218f system/reloc64: Add LoongArch64 relocations support Chao Li 2024-06-11 21:02:06 +0800
  • 80a2ca9dac system/io: Add LoongArch64 IO port operations Chao Li 2024-07-16 20:22:55 +0800
  • 82e12795af system: Add Loongson PCI vendor ID and Loongson 7A chipset EHCI workaround Chao Li 2024-07-16 20:07:36 +0800
  • 300c0c75f7 system/memrw: Add LoongArch memory access operations Chao Li 2024-07-16 18:58:08 +0800
  • 9d91551d8d system/memrw: Add 8-bit and 16-bit memory operations Chao Li 2024-07-16 18:45:55 +0800
  • 603f1590b9 system/heap: Add heap support for LoongArch64 Chao Li 2024-06-11 19:51:22 +0800
  • fec689966b system/cpuid: Add the compile limit Chao Li 2024-06-11 19:41:55 +0800
  • c4fafe38f5 system/cache: Add LoongArch64 cache operations support Chao Li 2024-06-11 19:37:11 +0800
  • ae02026ad2 system/acpi: Reduce the way of search RSDP for non-x86 ARCHs Chao Li 2024-07-11 18:59:29 +0800
  • cf15b62787 lib/unistd: Add LoongArch CPU pause Chao Li 2024-06-06 19:58:22 +0800
  • d3854276f2 lib/string: Make LoongArch use the string function in the file Chao Li 2024-06-06 19:53:46 +0800
  • a0ead5f260 lib/spinlock: Add LoongArch CPU pause Chao Li 2024-06-06 19:50:36 +0800
  • 6221e5d494 lib/barrier: Add barrier method for LoongArch Chao Li 2024-06-06 19:35:49 +0800
  • f7e50c198d lib/assert: Add LoongArch assert support Chao Li 2024-06-06 19:30:36 +0800
  • d51c3fd3b7
    Merge 375e22a4d7 into e38ad8e6a4 #354 Lionel Debroux 2024-08-12 19:04:01 +0200
  • e409a42f85
    Merge fc3a0bd461 into e38ad8e6a4 #356 Jonathan Teh 2024-08-11 19:09:17 -0700
  • e88374f289 Merge bootsect.S and setup.S into header.S 01e3 2024-08-02 12:23:41 -0700
  • 4deea7f228 x86_64: preserve r8-11 over call to interrupt handler. #430 x86-64-preserve-r8-11-on-irq Martin Whitaker 2024-08-11 13:15:39 +0100
  • 151a03f2c4
    Merge ea1aadc4e0 into e38ad8e6a4 #120 01e3 2024-08-10 17:41:43 +0100
  • e38ad8e6a4 Mark EFI image .text section as writable. Martin Whitaker 2024-08-10 16:11:08 +0100
  • 736f9c1525 Change SPD math from floating point to integer (fixed point) #429 01e3 2024-08-08 07:02:53 -0700
  • 771d6d4dca
    Split SPD parsing and printing code from smbus.c to spd.c (#426) 01e3 2024-08-07 17:41:19 -0700
  • 95818cedaa Add -fexcess-precision=standard to CFLAGS for build(32,64)/Makefile #426 01e3 2024-08-07 14:37:03 -0700
  • 097dae476a Split SPD parsing and printing code from smbus.c to spd.c 01e3 2024-08-04 07:59:27 -0700
  • 45b67bd526
    Merge ce62772c3f into e99ce97648 #424 Lionel Debroux 2024-07-31 22:13:37 +0200
  • ce62772c3f WIP BROKEN Attempt to build memtest_shared with LTO: works for the static build but not the dynamic build. #424 lto Lionel Debroux 2022-12-11 18:22:24 +0100
  • c5d3cd1db7 doc: Command line parameters for QEMU auto-start #421 Tormod Volden 2024-07-23 22:54:57 +0200
  • 58b0c5c103 De-pessimize i2c.c by commenting out LA64 code on x86/x86_64, and the other way round. 410_smbus Lionel Debroux 2024-07-24 22:34:45 +0200
  • 719a07662e system/i2c: Add a method of readout SPD via I2C Chao Li 2024-07-22 11:06:40 +0800
  • 57dcee96e9 De-pessimize spd.c and i2c.c by building them together again, saving nearly 1 KB. Lionel Debroux 2024-07-24 22:04:42 +0200
  • 97240e83ae system: Split the SPD functions from smbus.c to spd.c, rename smbus.c to i2c.c Chao Li 2024-06-12 15:24:05 +0800
  • 98b8aa982e system/memrw: Add LoongArch memory access operations Chao Li 2024-07-16 18:58:08 +0800
  • 23349da047 system/memrw: Add 8-bit and 16-bit memory operations Chao Li 2024-07-16 18:45:55 +0800
  • d0f2d9833c efisetup: Ignore Unicode byte-order mark in command line Tormod Volden 2024-07-23 22:09:08 +0200
  • e99ce97648 Add the 64-bit and 32-bit CC flag Chao Li 2024-07-10 15:06:26 +0800
  • f52a093272 Correct check for console "ttyS..." parameter #419 Tormod Volden 2024-03-09 15:15:16 +0100
  • ac5b405c38 Attempt at non-null init of print_hcd/print_ep #387 Tormod Volden 2024-03-20 22:32:19 +0100
  • f392232f10 Add the 64-bit and 32-bit CC flag #417 bit_count_passed_by_build_system Chao Li 2024-07-10 15:06:26 +0800
  • 8d966d98f4
    Refactor the memrw functions to reduce the redundancy. (#415) Lionel Debroux 2024-07-16 09:55:13 +0200
  • 7bbfa761e1 Refactor the memrw functions to reduce the redundancy. The impact is limited now, but will increase when adding support for more architectures and more bit widths. #415 Lionel Debroux 2024-07-12 10:45:21 +0200
  • fa583c906b app/main: Adjust the inline ASM to i386 only Chao Li 2024-06-18 10:39:55 +0800
  • 28689102a4 boot: Export the startup64 symbol Chao Li 2024-06-18 10:30:45 +0800
  • d84c8eebee boot/peimage: Add LoongArch and RISC-V PE machine numbers. Chao Li 2024-06-13 15:50:13 +0800
  • 5c12c1b2e4 Fix hexadecimal conversion in read_value(). Martin Whitaker 2024-06-21 22:58:25 +0100
  • f52751d325 Fix read_value() to correctly scale value when shift parameter is negative. Martin Whitaker 2024-06-21 22:25:23 +0100
  • 3f86696f00 Add GPT partition support Pete Batard 2024-05-20 12:35:45 +0100