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https://github.com/memtest86plus/memtest86plus
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Simple maintenance improvements (#145)
* Fix typos * Add missing final newline * Trim trailing whitespace
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@ -69,7 +69,7 @@ booted directly by a legacy BIOS (in floppy mode) or by an intermediate
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bootloader using the Linux 16-bit boot protocol and a `memtest.efi` binary
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image file which can be booted directly by a 32-bit UEFI BIOS. Either image
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can be booted by an intermediate bootloader using the Linux 32-bit or 32-bit
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EFI handover boot protocols.
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EFI handover boot protocols.
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To build a 64-bit image, change directory into the `build64` directory and
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type `make`. The result is a `memtest.bin` binary image file which can be
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@ -144,7 +144,7 @@ recognised:
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* activate serial/tty console output, where *x* is one of the following IO port
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* 0 = 0x3F8
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* 1 = 0x2F8
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* 2 = 0x3E8
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* 2 = 0x3E8
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* 3 = 0x2E8
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* and *y* is an optional baud rate to choose from the following list
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* 9600
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@ -334,7 +334,7 @@ void addr_error(testword_t *addr1, testword_t *addr2, testword_t good, testword_
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void data_error(testword_t *addr, testword_t good, testword_t bad, bool use_for_badram)
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{
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#if USB_WORKAROUND
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/* Skip any errrors that appear to be due to the BIOS using location
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/* Skip any errors that appear to be due to the BIOS using location
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* 0x4e0 for USB keyboard support. This often happens with Intel
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* 810, 815 and 820 chipsets. It is possible that we will skip
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* a real error but the odds are very low.
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@ -196,7 +196,7 @@ void interrupt(struct trap_regs *trap_regs)
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clear_screen_region(ROW_FOOTER, 0, ROW_FOOTER, SCREEN_WIDTH - 1);
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prints(ROW_FOOTER, 0, "Press any key to reboot...");
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while (get_key() == 0) { }
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reboot();
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}
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@ -132,7 +132,7 @@ do_setup:
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call empty_8042
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movb $0xd1, %al # send write command
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outb %al, $0x64
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call empty_8042
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call empty_8042
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movb $0xdf, %al # A20 on
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outb %al, $0x60
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call empty_8042
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@ -352,7 +352,7 @@ empty_8042:
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call delay
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inb $0x60, %al # read it
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jmp empty_8042
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no_output:
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testb $2, %al # is input buffer full?
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jnz empty_8042 # yes - loop
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@ -46,7 +46,7 @@ static inline void cache_on(void)
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#ifdef __x86_64__
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__asm__ __volatile__ ("\t"
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"movq %%cr0, %%rax \n\t"
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"andl $0x9fffffff, %%eax \n\t" /* Clear CD and NW */
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"andl $0x9fffffff, %%eax \n\t" /* Clear CD and NW */
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"movq %%rax, %%cr0 \n"
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: /* no outputs */
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: /* no inputs */
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@ -55,7 +55,7 @@ static inline void cache_on(void)
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#else
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__asm__ __volatile__ ("\t"
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"movl %%cr0, %%eax \n\t"
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"andl $0x9fffffff, %%eax \n\t" /* Clear CD and NW */
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"andl $0x9fffffff, %%eax \n\t" /* Clear CD and NW */
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"movl %%eax, %%cr0 \n"
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: /* no outputs */
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: /* no inputs */
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@ -47,7 +47,7 @@
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#define EHCI_USBCMD_ITC(n) ((n) << 16) // Interrupt Threshold Control = n (n = 1,2,4,8,16,32,64)
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// USB Status register
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// USB Status register
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#define EHCI_USBSTS_INT 0x00000001 // Interrupt
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#define EHCI_USBSTS_ERR 0x00000002 // Error interrupt
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@ -60,7 +60,7 @@
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#define EHCI_USBSTS_PSS 0x00004000 // Periodic Schedule Status
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#define EHCI_USBSTS_ASS 0x00008000 // Asynchronous Schedule Status
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// Port Status and Control register
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// Port Status and Control register
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#define EHCI_PORT_SC_CCS 0x00000001 // Current Connect Status
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#define EHCI_PORT_SC_CCSC 0x00000002 // Current Connect Status Change
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@ -78,7 +78,7 @@
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#define EHCI_PORT_SC_LS_J 0x00000800 // Line Status is J-state
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#define EHCI_PORT_SC_LS_U 0x00000c00 // Line Status is undefined
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// Link Pointer
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// Link Pointer
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#define EHCI_LP_TERMINATE 0x00000001 // Terminate (T) bit
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@ -410,7 +410,7 @@ bool ohci_init(uintptr_t base_addr, usb_hcd_t *hcd)
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{
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ohci_op_regs_t *op_regs = (ohci_op_regs_t *)base_addr;
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// Check the host controller revison.
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// Check the host controller revision.
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if ((read32(&op_regs->revision) & 0xff) != 0x10) {
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return false;
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}
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@ -135,7 +135,7 @@ extern struct mem_dev *dmi_memory_device;
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int smbios_init(void);
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/**
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* Print DMI
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* Print DMI
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*/
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void print_smbios_startup_info(void);
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@ -192,7 +192,7 @@ static spd_info parse_spd_ddr5(uint8_t slot_idx)
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spdi.sku_len = 0;
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spdi.module_size = 0;
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// Compute module size for symmetric & assymetric configuration
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// Compute module size for symmetric & asymmetric configuration
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for (int sbyte_adr = 1; sbyte_adr <= 2; sbyte_adr++) {
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uint32_t cur_rank = 0;
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uint8_t sbyte = get_spd(slot_idx, sbyte_adr * 4);
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@ -871,7 +871,7 @@ static spd_info parse_spd_ddr(uint8_t slot_idx)
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case 128:
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spdi.module_size = 512;
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break;
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default: // we don't support asymetric banking
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default: // we don't support asymmetric banking
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spdi.module_size = 0;
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break;
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}
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@ -127,4 +127,4 @@ extern ram_info ram;
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void print_smbus_startup_info(void);
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#endif // SMBUS_H
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#endif // SMBUS_H
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@ -59,7 +59,7 @@
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#define UHCI_USBCMD_GR 0x0004 // Global Reset
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#define UHCI_USBCMD_MAXP 0x0080 // Max Packet
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// USB Status register
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// USB Status register
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#define UHCI_USBSTS_INT 0x0001 // Interrupt
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#define UHCI_USBSTS_ERR 0x0002 // Error interrupt
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@ -600,7 +600,7 @@ bool assign_usb_address(const usb_hcd_t *hcd, const usb_hub_t *hub, int port_num
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return true;
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}
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bool find_attached_usb_keyboards(const usb_hcd_t *hcd, const usb_hub_t *hub, int port_num,
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bool find_attached_usb_keyboards(const usb_hcd_t *hcd, const usb_hub_t *hub, int port_num,
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usb_speed_t device_speed, int device_id, int *num_devices,
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usb_ep_t keyboards[], int max_keyboards, int *num_keyboards)
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{
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@ -70,7 +70,7 @@ int test_addr_walk1(int my_cpu)
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break;
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}
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write_word(p2, ~invert ^ (testword_t)p2);
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testword_t actual = read_word(p1);
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if (unlikely(actual != expect)) {
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addr_error(p1, p2, expect, actual);
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@ -84,7 +84,7 @@ int test_block_move(int my_cpu, int iterations)
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}
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flush_caches(my_cpu);
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// Now move the data around. First move the data up half of the segment size
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// Now move the data around. First move the data up half of the segment size
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// we are testing. Then move the data to the original location + 32 bytes.
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for (int i = 0; i < vm_map_size; i++) {
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testword_t *start, *end;
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