diff --git a/system/cpuid.c b/system/cpuid.c
index 260f138..c11965f 100644
--- a/system/cpuid.c
+++ b/system/cpuid.c
@@ -128,6 +128,26 @@ void cpuid_init(void)
             );
         }
         break;
+      case 'C':
+        if (cpuid_info.vendor_id.str[5] == 'I') break; // Cyrix
+        // VIA / CentaurHauls
+        if (cpuid_info.max_xcpuid >= 0x80000005) {
+            cpuid(0x80000005, 0,
+                &reg[0],
+                &reg[1],
+                &cpuid_info.cache_info.raw[0],
+                &cpuid_info.cache_info.raw[1]
+            );
+        }
+        if (cpuid_info.max_xcpuid >= 0x80000006) {
+            cpuid(0x80000006, 0,
+                &reg[0],
+                &reg[1],
+                &cpuid_info.cache_info.raw[2],
+                &cpuid_info.cache_info.raw[3]
+            );
+        }
+        break;
       case 'G':
         // Intel Processors
         // No cpuid info to read.
diff --git a/system/cpuid.h b/system/cpuid.h
index a16c1ae..009772f 100644
--- a/system/cpuid.h
+++ b/system/cpuid.h
@@ -122,7 +122,7 @@ typedef union {
 } cpuid_brand_string_t;
 
 typedef union {
-    uint32_t        raw[12];
+    uint32_t        raw[4];
     struct {
         uint32_t                : 24;
         uint32_t    l1_i_size   : 8;
diff --git a/system/cpuinfo.c b/system/cpuinfo.c
index a8d1e40..7d4b58c 100644
--- a/system/cpuinfo.c
+++ b/system/cpuinfo.c
@@ -71,10 +71,16 @@ static void determine_cache_size()
         l3_cache *= 512;
         break;
       case 'C':
-        // Zhaoxin CPU only
-        if (cpuid_info.version.family != 7) {
+        if (cpuid_info.vendor_id.str[5] == 'I') break; // Cyrix
+        // VIA C3/C7/Nano
+        if (cpuid_info.version.family == 6) {
+            l1_cache = cpuid_info.cache_info.l1_d_size;
+            l2_cache = cpuid_info.cache_info.l2_size;
+            break;
+        } else if (cpuid_info.version.family != 7) {
             break;
         }
+        // Zhaoxin CPU only
         /* fall through */
       case 'G':
         // Intel Processors
diff --git a/system/temperature.c b/system/temperature.c
index 5d29cb5..4d3c0aa 100644
--- a/system/temperature.c
+++ b/system/temperature.c
@@ -47,7 +47,7 @@ int get_cpu_temperature(void)
     }
 
     // AMD CPU
-    if (cpuid_info.vendor_id.str[0] == 'A' && cpuid_info.version.extendedFamily > 0 && cpuid_info.version.extendedFamily < 8) {
+    else if (cpuid_info.vendor_id.str[0] == 'A' && cpuid_info.version.extendedFamily > 0 && cpuid_info.version.extendedFamily < 8) {
 
         // Untested yet
         uint32_t rtcr = pci_config_read32(0, 24, 3, 0xA4);
@@ -69,5 +69,23 @@ int get_cpu_temperature(void)
         return offset + 0.125f * (float)((tval >> 21) & 0x7FF);
     }
 
+    // VIA/Centaur/Zhaoxin CPU
+    else if (cpuid_info.vendor_id.str[0] == 'C' && cpuid_info.vendor_id.str[1] == 'e'
+          && (cpuid_info.version.family == 6 || cpuid_info.version.family == 7)) {
+
+        uint32_t msrl, msrh, msr_temp;
+
+        if (cpuid_info.version.family == 7 || cpuid_info.version.model == 0xF) {
+            msr_temp = 0x1423;  // Zhaoxin, Nano
+        } else if (cpuid_info.version.model == 0xA || cpuid_info.version.model == 0xD) {
+            msr_temp = 0x1169;  // C7 A/D
+        } else {
+            return 0;
+        }
+
+        rdmsr(msr_temp, msrl, msrh);
+        return (int)(msrl & 0xffffff);
+    }
+
     return 0;
 }