diff --git a/app/main.c b/app/main.c index f906407..1709bac 100644 --- a/app/main.c +++ b/app/main.c @@ -216,12 +216,12 @@ static void global_init(void) pci_init(); + quirks_init(); + membw_init(); smbios_init(); - quirks_init(); - badram_init(); config_init(); diff --git a/system/cpuinfo.c b/system/cpuinfo.c index 93d42e8..0123d4e 100644 --- a/system/cpuinfo.c +++ b/system/cpuinfo.c @@ -25,6 +25,7 @@ #include "pmem.h" #include "vmem.h" #include "memsize.h" +#include "hwquirks.h" #include "cpuinfo.h" @@ -1089,6 +1090,10 @@ void cpuinfo_init(void) void membw_init(void) { + if (quirk.type & QUIRK_TYPE_MEM_SIZE) { + quirk.process(); + } + if(enable_bench) { measure_memory_bandwidth(); } diff --git a/system/hwquirks.c b/system/hwquirks.c index a15c09a..b78ecbd 100644 --- a/system/hwquirks.c +++ b/system/hwquirks.c @@ -12,6 +12,7 @@ #include "io.h" #include "pci.h" #include "unistd.h" +#include "cpuinfo.h" quirk_t quirk; @@ -44,6 +45,25 @@ static void asus_tusl2_configure_mux(void) outb(0xAA, 0x2E); } +static void get_m1541_l2_cache_size(void) +{ + if (l2_cache != 0) { + return; + } + + // Check if L2 cache is enabled with L2CC-2 Register[0] + if ((pci_config_read8(0, 0, 0, 0x42) & 1) == 0) { + return; + } + + // Get L2 Cache Size with L2CC-1 Register[3:2] + uint8_t reg = (pci_config_read8(0, 0, 0, 0x41) >> 2) & 3; + + if (reg == 0b00) { l2_cache = 256; } + if (reg == 0b01) { l2_cache = 512; } + if (reg == 0b10) { l2_cache = 1024; } +} + // --------------------- // -- Public function -- // --------------------- @@ -56,6 +76,17 @@ void quirks_init(void) quirk.root_did = pci_config_read16(0, 0, 0, 2); quirk.process = NULL; + // ------------------------- + // -- ALi Aladdin V Quirk -- + // ------------------------- + // As on many Socket 7 Motherboard, the L2 cache is external and must + // be detected by a proprietary way based on chipset registers + if (quirk.root_vid == 0x10B9 && quirk.root_did == 0x1541) { // ALi Aladdin V (M1541) + quirk.id = QUIRK_ALI_ALADDIN_V; + quirk.type |= QUIRK_TYPE_MEM_SIZE; + quirk.process = get_m1541_l2_cache_size; + } + // ------------------------ // -- ASUS TUSL2-C Quirk -- // ------------------------ diff --git a/system/hwquirks.h b/system/hwquirks.h index ba1d78b..cca30c1 100644 --- a/system/hwquirks.h +++ b/system/hwquirks.h @@ -12,16 +12,18 @@ #include #include -#define QUIRK_TYPE_NONE 0b00000000 -#define QUIRK_TYPE_USB 0b00000001 -#define QUIRK_TYPE_SMP 0b00000010 -#define QUIRK_TYPE_SMBIOS 0b00000100 -#define QUIRK_TYPE_SMBUS 0b00001000 -#define QUIRK_TYPE_TIMER 0b00010000 +#define QUIRK_TYPE_NONE (1 << 0) +#define QUIRK_TYPE_USB (1 << 1) +#define QUIRK_TYPE_SMP (1 << 2) +#define QUIRK_TYPE_SMBIOS (1 << 3) +#define QUIRK_TYPE_SMBUS (1 << 4) +#define QUIRK_TYPE_TIMER (1 << 5) +#define QUIRK_TYPE_MEM_SIZE (1 << 6) typedef enum { QUIRK_NONE, - QUIRK_TUSL2 + QUIRK_TUSL2, + QUIRK_ALI_ALADDIN_V } quirk_id_t; typedef struct { diff --git a/system/smbus.c b/system/smbus.c index d0a04d6..50b1463 100644 --- a/system/smbus.c +++ b/system/smbus.c @@ -154,7 +154,7 @@ void print_smbus_startup_info(void) { ram.freq = 0; curspd.isValid = false; - if (quirk.type == QUIRK_TYPE_SMBUS) { + if (quirk.type & QUIRK_TYPE_SMBUS) { quirk.process(); }