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Add IMC polling for AMD Rembrandt 

Refactor cpuinfo() for AMD Family 19h CPUs and add detection for AMD Chagall, Storm Peak, Rembrandt, Phoenix and Granite Ridge
This commit is contained in:
Sam Demeulemeester 2023-06-01 22:00:02 +02:00
parent 43aab9d231
commit 03b6cbe4e4
4 changed files with 33 additions and 7 deletions
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30
system/cpuinfo.c
View File

@ -332,13 +332,33 @@ static void determine_imc(void)
imc.family = IMC_K18; // Hygon (Family 18h)
break;
case 0xA:
if (cpuid_info.version.extendedModel == 5) {
imc.family = IMC_K19_CZN; // AMD Cezanne APU (Model 0x50-5F - Family 19h)
} else if (cpuid_info.version.extendedModel >= 6) {
imc.family = IMC_K19_RPL; // Zen4 (Family 19h - Raphael AM5)
} else {
switch(cpuid_info.version.extendedModel) {
case 0:
imc.family = IMC_K19_CHL; // Zen3 (Threadripper - Chagall sWRX8)
break;
case 1:
imc.family = IMC_K19_STK; // Zen4 (Threadripper - Storm Peak TR5)
break;
case 2:
imc.family = IMC_K19_VRM; // Zen3 (Family 19h - Vermeer AM4)
break;
case 4:
imc.family = IMC_K19_RBT; // Zen3+ (Family 19h - Rembrandt FP7 & AM5 FTV)
break;
case 5:
imc.family = IMC_K19_CZN; // Zen3 APU (Family 19h - Cezanne FP6)
break;
case 6:
imc.family = IMC_K19_RPL; // Zen4 (Family 19h - Raphael AM5)
break;
case 7:
imc.family = IMC_K19_PHX; // Zen4 (Family 19h - Phoenix FP7/FP8)
break;
}
break;
case 0xB:
imc.family = IMC_K19_GRG; // Zen5 APU (Family 19h - Granite Ridge)
break;
default:
break;
}

7
system/cpuinfo.h
View File

@ -66,8 +66,13 @@
#define IMC_K18 0x8070 // Hygon (Family 18h)
#define IMC_K19_VRM 0x8080 // Zen3 (Family 19h - Vermeer)
#define IMC_K19_CZN 0x8081 // Cezanne APU
#define IMC_K19_CHL 0x8090 // Zen3 Chagall TR
#define IMC_K19_RPL 0x8100 // Zen4 (Family 19h - Raphael (AM5))
#define IMC_K19_RBT 0x8100 // Zen3+ (Rembrandt)
#define IMC_K19_RPL 0x8110 // Zen4 (Raphael)
#define IMC_K19_PHX 0x8120 // Zen4 (Phoenix)
#define IMC_K19_STK 0x81A0 // Zen4 (Storm Peak)
#define IMC_K19_GRG 0x8150 // Zen5 (Granite Ridge)
/**
* A string identifying the CPU make and model.

2
system/imc/amd_zen.c
View File

@ -37,7 +37,7 @@ void get_imc_config_amd_zen(void)
// Get DRAM Frequency
smn_reg = amd_smn_read(AMD_SMN_UMC_DRAM_CONFIG + offset);
if (imc.family >= IMC_K19_RPL) {
if (imc.family >= IMC_K19_RBT) {
imc.type = "DDR5";
imc.freq = smn_reg & 0xFFFF;
if ((smn_reg >> 18) & 1) imc.freq *= 2; // GearDown

1
system/memctrl.c
View File

@ -34,6 +34,7 @@ void memctrl_init(void)
case IMC_K17:
case IMC_K19_VRM:
case IMC_K19_RPL:
case IMC_K19_RBT:
get_imc_config_amd_zen();
break;
case IMC_SNB: