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Ticket# 4215: support syntax highlighting for Verilog/SystemVerilog header files. 

Signed-off-by: Andrew Borodin <aborodin@vmail.ru>
This commit is contained in:
Purdea Andrei 2021-03-11 13:28:36 +02:00 committed by Andrew Borodin
parent 94588d2da6
commit e50a4d0e25
1 changed files with 1 additions and 1 deletions
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misc/syntax/Syntax.in
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@ -235,7 +235,7 @@ include cabal.syntax
file ..\*\\.(?i:n)$ Nemerle\sProgram
include nemerle.syntax
file ..\*\\.(?i:(v|sv))$ Verilog/SystemVerilog\sDevice\sDescription
file ..\*\\.(?i:(v|sv|vh|svh))$ Verilog/SystemVerilog\sDevice\sDescription
include verilog.syntax
file ..\*\\.(?i:hdl|vhdl?)$ VHDL\sDevice\sDescription