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verilog syntax: added IEEE1364-2001 missing keywords

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Signed-off-by: Andrew Borodin <aborodin@vmail.ru>
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Purdea Andrei 2020-06-01 20:58:58 +03:00 committed by Andrew Borodin
parent 91fdf29635
commit b0927b0627
1 changed files with 20 additions and 0 deletions
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misc/syntax/verilog.syntax
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@ -144,6 +144,26 @@ context default
keyword whole xor yellow
#Reserved Keywords IEEE1364-2001
keyword whole automatic yellow
keyword whole cell yellow
keyword whole config yellow
keyword whole design yellow
keyword whole endconfig yellow
keyword whole endgenerate yellow
keyword whole generate yellow
keyword whole genvar yellow
keyword whole incdir yellow
keyword whole include yellow
keyword whole instance yellow
keyword whole liblist yellow
keyword whole library yellow
keyword whole localparam yellow
keyword whole noshowcancelled yellow
keyword whole pulsestyle_ondetect yellow
keyword whole pulsestyle_onevent yellow
keyword whole showcancelled yellow
keyword whole signed yellow
keyword whole unsigned yellow
keyword whole use yellow
#Reserved Keywords 2