mirror of https://github.com/proski/madwifi
92 lines
3.9 KiB
C
92 lines
3.9 KiB
C
/*
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* Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
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* Copyright (c) 2002-2008 Atheros Communications, Inc.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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* $Id: ah_soc.h,v 1.4 2008/11/10 04:08:00 sam Exp $
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*/
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#ifndef _ATH_AH_SOC_H_
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#define _ATH_AH_SOC_H_
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/*
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* Atheros System on Chip (SoC) public definitions.
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*/
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/*
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* This is board-specific data that is stored in a "known"
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* location in flash. To find the start of this data search
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* back from the (aliased) end of flash by 0x1000 bytes at a
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* time until you find the string "5311", which marks the
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* start of Board Configuration. Typically one gives up if
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* more than 500KB is searched.
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*/
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struct ar531x_boarddata {
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uint32_t magic; /* board data is valid */
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#define AR531X_BD_MAGIC 0x35333131 /* "5311", for all 531x platforms */
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uint16_t cksum; /* checksum (starting with BD_REV 2) */
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uint16_t rev; /* revision of this struct */
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#define BD_REV 4
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char boardName[64]; /* Name of board */
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uint16_t major; /* Board major number */
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uint16_t minor; /* Board minor number */
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uint32_t config; /* Board configuration */
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#define BD_ENET0 0x00000001 /* ENET0 is stuffed */
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#define BD_ENET1 0x00000002 /* ENET1 is stuffed */
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#define BD_UART1 0x00000004 /* UART1 is stuffed */
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#define BD_UART0 0x00000008 /* UART0 is stuffed (dma) */
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#define BD_RSTFACTORY 0x00000010 /* Reset factory defaults stuffed */
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#define BD_SYSLED 0x00000020 /* System LED stuffed */
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#define BD_EXTUARTCLK 0x00000040 /* External UART clock */
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#define BD_CPUFREQ 0x00000080 /* cpu freq is valid in nvram */
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#define BD_SYSFREQ 0x00000100 /* sys freq is set in nvram */
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#define BD_WLAN0 0x00000200 /* Enable WLAN0 */
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#define BD_MEMCAP 0x00000400 /* CAP SDRAM @ memCap for testing */
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#define BD_DISWATCHDOG 0x00000800 /* disable system watchdog */
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#define BD_WLAN1 0x00001000 /* Enable WLAN1 (ar5212) */
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#define BD_ISCASPER 0x00002000 /* FLAG for AR2312 */
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#define BD_WLAN0_2G_EN 0x00004000 /* FLAG for radio0_2G */
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#define BD_WLAN0_5G_EN 0x00008000 /* FLAG for radio0_2G */
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#define BD_WLAN1_2G_EN 0x00020000 /* FLAG for radio0_2G */
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#define BD_WLAN1_5G_EN 0x00040000 /* FLAG for radio0_2G */
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uint16_t resetConfigGpio; /* Reset factory GPIO pin */
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uint16_t sysLedGpio; /* System LED GPIO pin */
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uint32_t cpuFreq; /* CPU core frequency in Hz */
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uint32_t sysFreq; /* System frequency in Hz */
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uint32_t cntFreq; /* Calculated C0_COUNT frequency */
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uint8_t wlan0Mac[6];
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uint8_t enet0Mac[6];
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uint8_t enet1Mac[6];
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uint16_t pciId; /* Pseudo PCIID for common code */
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uint16_t memCap; /* cap bank1 in MB */
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/* version 3 */
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uint8_t wlan1Mac[6]; /* (ar5212) */
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};
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/*
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* Board support data. The driver is required to locate
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* and fill-in this information before passing a reference to
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* this structure as the HAL_BUS_TAG parameter supplied to
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* ath_hal_attach.
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*/
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struct ar531x_config {
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const struct ar531x_boarddata *board; /* board config data */
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const char *radio; /* radio config data */
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int unit; /* unit number [0, 1] */
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void *tag; /* bus space tag */
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};
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#endif /* _ATH_AH_SOC_H_ */
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