mirror of https://github.com/proski/madwifi
148 lines
4.0 KiB
C
148 lines
4.0 KiB
C
/*
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* Copyright (c) 2004 Atheros Communications, Inc.
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* All rights reserved.
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*
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* $Id$
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*/
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#ifndef _DEV_ATH_AHB_H_
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#define _DEV_ATH_AHB_H_
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#include <asm/io.h>
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#include <asm/uaccess.h>
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#define AR531X_WLAN0_NUM 0
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#define AR531X_WLAN1_NUM 1
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#define REG_WRITE(_reg,_val) *((volatile u_int32_t *)(_reg)) = (_val);
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#define REG_READ(_reg) *((volatile u_int32_t *)(_reg))
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/*
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* 5315 specific registers
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*/
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/*
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* PCI-MAC Configuration registers
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*/
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#define AR5315_PCI 0xB0100000 /* PCI MMR */
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#define AR5315_PCI_MAC_RC (AR5315_PCI + 0x4000)
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#define AR5315_PCI_MAC_SCR (AR5315_PCI + 0x4004)
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#define AR5315_PCI_MAC_INTPEND (AR5315_PCI + 0x4008)
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#define AR5315_PCI_MAC_SFR (AR5315_PCI + 0x400C)
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#define AR5315_PCI_MAC_PCICFG (AR5315_PCI + 0x4010)
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#define AR5315_PCI_MAC_SREV (AR5315_PCI + 0x4020)
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#define AR5315_PCI_MAC_RC_MAC 0x00000001
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#define AR5315_PCI_MAC_RC_BB 0x00000002
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#define AR5315_PCI_MAC_SCR_SLMODE_M 0x00030000
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#define AR5315_PCI_MAC_SCR_SLMODE_S 16
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#define AR5315_PCI_MAC_SCR_SLM_FWAKE 0
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#define AR5315_PCI_MAC_SCR_SLM_FSLEEP 1
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#define AR5315_PCI_MAC_SCR_SLM_NORMAL 2
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#define AR5315_PCI_MAC_SFR_SLEEP 0x00000001
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#define AR5315_PCI_MAC_PCICFG_SPWR_DN 0x00010000
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#define AR5315_IRQ_WLAN0_INTRS 3
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#define AR5315_WLAN0 0xb0000000
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#define AR5315_ENDIAN_CTL 0xb100000c
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#define AR5315_CONFIG_WLAN 0x00000002 /* WLAN byteswap */
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#define AR5315_AHB_ARB_CTL 0xb1000008
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#define AR5315_ARB_WLAN 0x00000002
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/*
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* Revision Register - Initial value is 0x3010 (WMAC 3.0, AR531X 1.0).
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*/
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#define AR5315_SREV 0xb1000014
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#define AR5315_REV_MAJ 0x0080
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#define AR5317_REV_MAJ 0x0090
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#define AR5315_REV_MAJ_M 0x00f0
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#define AR5315_REV_MAJ_S 4
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#define AR5315_REV_MIN_M 0x000f
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#define AR5315_REV_MIN_S 0
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#define AR5315_REV_CHIP (REV_MAJ|REV_MIN)
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#define AR531X_IRQ_WLAN0_INTRS 2
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#define AR531X_IRQ_WLAN1_INTRS 5
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#define AR531X_WLAN0 0xb8000000
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#define AR531X_WLAN1 0xb8500000
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#define AR531X_WLANX_LEN 0x000ffffc
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#define AR531X_RESETCTL 0xbc003020
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#define AR531X_RESET_WLAN0 0x00000004 /* mac & bb */
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#define AR531X_RESET_WLAN1 0x00000200 /* mac & bb */
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#define AR531X_RESET_WARM_WLAN0_MAC 0x00002000
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#define AR531X_RESET_WARM_WLAN0_BB 0x00004000
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#define AR531X_RESET_WARM_WLAN1_MAC 0x00020000
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#define AR531X_RESET_WARM_WLAN1_BB 0x00040000
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#define AR531X_ENABLE 0xbc003080
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#define AR531X_ENABLE_WLAN0 0x0001
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#define AR531X_ENABLE_WLAN1 0x0018 /* both DMA and PIO */
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#define AR531X_RADIO_MASK_OFF 0xc8
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#define AR531X_RADIO0_MASK 0x0003
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#define AR531X_RADIO1_MASK 0x000c
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#define AR531X_RADIO1_S 2
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#define BUS_DMA_FROMDEVICE 0
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#define BUS_DMA_TODEVICE 1
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#define AR531X_APBBASE 0xbc000000
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#define AR531X_RESETTMR (AR531X_APBBASE + 0x3000)
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#define AR531X_REV (AR531X_RESETTMR + 0x0090) /* revision */
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#define AR531X_REV_MAJ 0x00f0
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#define AR531X_REV_MAJ_S 4
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#define AR531X_REV_MIN 0x000f
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#define AR531X_REV_MIN_S 0
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#define AR531X_BD_MAGIC 0x35333131 /* "5311", for all 531x platforms */
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/* Allow compiling on non-mips platforms for code verification */
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#ifndef __mips__
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#define CAC_ADDR(addr) (addr)
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#define UNCAC_ADDR(addr) (addr)
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#define KSEG1ADDR(addr) (addr)
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#define dma_cache_wback_inv(start,size) \
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do { (void) (start); (void) (size); } while (0)
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#endif
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/* set bus cachesize in 4B word units */
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static __inline void bus_dma_sync_single(void *hwdev, dma_addr_t dma_handle,
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size_t size, int direction)
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{
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unsigned long addr;
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addr = (unsigned long) __va(dma_handle);
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dma_cache_wback_inv(addr, size);
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}
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static __inline dma_addr_t bus_map_single(void *hwdev, void *ptr,
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size_t size, int direction)
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{
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dma_cache_wback_inv((unsigned long) ptr, size);
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return __pa(ptr);
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}
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static __inline void bus_unmap_single(void *hwdev, dma_addr_t dma_addr,
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size_t size, int direction)
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{
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if (direction != BUS_DMA_TODEVICE) {
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unsigned long addr;
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addr = (unsigned long)__va(dma_addr);
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dma_cache_wback_inv(addr, size);
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}
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}
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void *bus_alloc_consistent(void *, size_t, dma_addr_t *);
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void bus_free_consistent(void *, size_t, void *, dma_addr_t);
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#define sysRegRead(phys) (*(volatile u_int32_t *)phys)
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#endif /* _DEV_ATH_AHB_H_ */
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