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https://github.com/proski/madwifi
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97b4d431f7
32-bit PowerPC only gets iowrite32be() and ioread32be() in version 2.6.20. This applies only to the merged "powerpc" architecture identified by CONFIG_PPC_MERGE. The old "ppc" architecture goes away in Linux 2.6.27, so CONFIG_PPC_MERGE is no longer valid. git-svn-id: http://madwifi-project.org/svn/madwifi/trunk@4029 0192ed92-7a03-0410-a25b-9323aeb14dbd
269 lines
9.7 KiB
C
269 lines
9.7 KiB
C
/*-
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* Copyright (c) 2002-2006 Sam Leffler, Errno Consulting
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer,
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* without modification.
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* 2. Redistributions in binary form must reproduce at minimum a disclaimer
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* similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
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* redistribution must be conditioned upon including a substantially
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* similar Disclaimer requirement for further binary redistribution.
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* 3. Neither the names of the above-listed copyright holders nor the names
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* of any contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* Alternatively, this software may be distributed under the terms of the
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* GNU General Public License ("GPL") version 2 as published by the Free
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* Software Foundation.
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*
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* NO WARRANTY
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
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* AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
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* OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
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* IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGES.
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*
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* $Id$
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*/
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#ifndef _ATH_AH_OSDEP_H_
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#define _ATH_AH_OSDEP_H_
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#include <asm/io.h>
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#include "ah_devid.h"
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#define __ahdecl
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#ifndef __packed
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#define __packed __attribute__((__packed__))
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#endif
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#ifndef __used
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#define __used __attribute__((__used__))
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#endif
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/* Replace void pointers from ah.h with safer specific types */
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#define HAL_SOFTC struct ath_softc *
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#define HAL_BUS_HANDLE void __iomem *
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#define HAL_BUS_TAG struct ar531x_config *
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/* Linker-assisted set support */
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#define __STRING(x) #x
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#define DECLARE_ah_chips \
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struct ath_hal_chip *AR5210_chip_ptr __attribute__((__weak__)); \
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struct ath_hal_chip *AR5211_chip_ptr __attribute__((__weak__)); \
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struct ath_hal_chip *AR5212_chip_ptr __attribute__((__weak__)); \
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struct ath_hal_chip *AR5312_chip_ptr __attribute__((__weak__)); \
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struct ath_hal_chip *AR5416_chip_ptr __attribute__((__weak__)); \
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struct ath_hal_chip *AR9160_chip_ptr __attribute__((__weak__)); \
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struct ath_hal_chip *const *ah_chips_ptrs[] = { \
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&AR5210_chip_ptr, \
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&AR5211_chip_ptr, \
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&AR5212_chip_ptr, \
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&AR5312_chip_ptr, \
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&AR5416_chip_ptr, \
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&AR9160_chip_ptr, \
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NULL \
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}
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#define DECLARE_ah_rfs \
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struct ath_hal_rf *RF2316_rf_ptr __attribute__((__weak__)); \
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struct ath_hal_rf *RF2317_rf_ptr __attribute__((__weak__)); \
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struct ath_hal_rf *RF2413_rf_ptr __attribute__((__weak__)); \
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struct ath_hal_rf *RF2425_rf_ptr __attribute__((__weak__)); \
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struct ath_hal_rf *RF5111_rf_ptr __attribute__((__weak__)); \
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struct ath_hal_rf *RF5112_rf_ptr __attribute__((__weak__)); \
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struct ath_hal_rf *RF5413_rf_ptr __attribute__((__weak__)); \
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struct ath_hal_rf *const *ah_rfs_ptrs[] = { \
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&RF2316_rf_ptr, \
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&RF2317_rf_ptr, \
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&RF2413_rf_ptr, \
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&RF2425_rf_ptr, \
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&RF5111_rf_ptr, \
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&RF5112_rf_ptr, \
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&RF5413_rf_ptr, \
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NULL \
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}
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#define OS_SET_DECLARE(set, ptype) \
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DECLARE_##set
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#define OS_DATA_SET(set, sym) \
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typeof(sym) *sym##_ptr = &sym
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#define OS_SET_FOREACH(pvar, set) \
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typeof(pvar) *ppvar = set##_ptrs; \
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for (pvar = *ppvar; pvar; pvar = *++ppvar) if (*pvar)
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/* Byte order/swapping support. */
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#define AH_LITTLE_ENDIAN 1234
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#define AH_BIG_ENDIAN 4321
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#ifndef AH_BYTE_ORDER
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/*
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* When the .inc file is not available (e.g. when building in the kernel source
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* tree), look for some other way to determine the host byte order.
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*/
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#ifdef __LITTLE_ENDIAN
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#define AH_BYTE_ORDER AH_LITTLE_ENDIAN
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#endif
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#ifdef __BIG_ENDIAN
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#define AH_BYTE_ORDER AH_BIG_ENDIAN
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#endif
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#ifndef AH_BYTE_ORDER
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#error "Do not know host byte order"
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#endif
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#endif /* AH_BYTE_ORDER */
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/* 32-bit sparc gets iowrite32() and ioread32() in Linux 2.6.18 */
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#if (defined(CONFIG_SPARC32) && (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18)))
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#ifndef iowrite32
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#define iowrite32(_val, _addr) writel(_val, _addr)
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#endif
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#ifndef ioread32
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#define ioread32(_addr) readl(_addr)
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#endif
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#endif
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/*
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* The HAL programs big-endian platforms to use byte-swapped hardware registers.
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* This is done to avoid the byte swapping needed to access PCI devices.
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*
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* Many big-endian architectures provide I/O functions that avoid byte swapping.
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* We use them when possible. Otherwise, we provide replacements. The downside
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* or the replacements is that we may be byte-swapping data twice, so we try to
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* avoid it.
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*
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* We use raw access for Linux prior to 2.6.12. For newer version, we need to
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* use ioread32() and iowrite32(), which would take care of indirect access to
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* the registers.
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*/
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#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,12)) && \
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(AH_BYTE_ORDER == AH_BIG_ENDIAN) && \
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!defined(CONFIG_GENERIC_IOMAP) && \
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!defined(CONFIG_PARISC) && \
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!(defined(CONFIG_PPC64) && \
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(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,14))) && \
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!(defined(CONFIG_PPC_MERGE) && \
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(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,20))) && \
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!(defined(CONFIG_PPC32) && \
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(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,27))) && \
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!(defined(CONFIG_MIPS) && \
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(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21)))
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# ifndef iowrite32be
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# define iowrite32be(_val, _addr) iowrite32(swab32((_val)), (_addr))
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# endif
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# ifndef ioread32be
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# define ioread32be(_addr) swab32(ioread32((_addr)))
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# endif
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#endif
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/*
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* The register accesses are done using target-specific functions when
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* debugging is enabled (AH_DEBUG) or it's explicitly requested for the target.
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*
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* The hardware registers use little-endian byte order natively. Big-endian
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* systems are configured by HAL to byte-swap of register reads and writes.
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* However, the registers in the areas 0x4000-0x4fff and 0x7000-0x7fff are not
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* byte swapped!
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*
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* Since Linux I/O primitives default to little-endian operations, we only
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* need to suppress byte-swapping on big-endian systems outside the area used
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* by the PCI clock domain registers.
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*/
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#if (AH_BYTE_ORDER == AH_BIG_ENDIAN)
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# define is_reg_le(__reg) ((0x4000 <= (__reg) && (__reg) < 0x5000) || \
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(0x7000 <= (__reg) && (__reg) < 0x8000))
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# if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,12)
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# define _OS_REG_WRITE(_ah, _reg, _val) do { \
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is_reg_le(_reg) ? \
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iowrite32((_val), (_ah)->ah_sh + (_reg)) : \
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iowrite32be((_val), (_ah)->ah_sh + (_reg)); \
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} while (0)
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# define _OS_REG_READ(_ah, _reg) \
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(is_reg_le(_reg) ? \
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ioread32((_ah)->ah_sh + (_reg)) : \
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ioread32be((_ah)->ah_sh + (_reg)))
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# else /* Linux < 2.6.12 */
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# define _OS_REG_WRITE(_ah, _reg, _val) do { \
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writel(is_reg_le(_reg) ? \
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(_val) : cpu_to_le32(_val), \
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(_ah)->ah_sh + (_reg)); \
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} while (0)
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# define _OS_REG_READ(_ah, _reg) \
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(is_reg_le(_reg) ? \
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readl((_ah)->ah_sh + (_reg)) : \
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cpu_to_le32(readl((_ah)->ah_sh + (_reg))))
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# endif /* Linux < 2.6.12 */
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#else /* Little endian */
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# if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,12)
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# define _OS_REG_WRITE(_ah, _reg, _val) do { \
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iowrite32((_val), (_ah)->ah_sh + (_reg)); \
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} while (0)
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# define _OS_REG_READ(_ah, _reg) \
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ioread32((_ah)->ah_sh + (_reg))
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# else /* Linux < 2.6.12 */
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# define _OS_REG_WRITE(_ah, _reg, _val) do { \
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writel((_val), (_ah)->ah_sh + (_reg)); \
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} while (0)
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# define _OS_REG_READ(_ah, _reg) \
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readl((_ah)->ah_sh + (_reg))
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# endif /* Linux < 2.6.12 */
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#endif /* Little endian */
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/*
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* The functions in this section are not intended to be invoked by MadWifi
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* driver code, but by the HAL. They are NOT safe to call directly when the
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* sc->sc_hal_lock is not held. Use ath_reg_read and ATH_REG_WRITE instead!
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*/
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#if defined(AH_DEBUG) || defined(AH_REGOPS_FUNC) || defined(AH_DEBUG_ALQ)
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#define OS_REG_WRITE(_ah, _reg, _val) ath_hal_reg_write(_ah, _reg, _val)
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#define OS_REG_READ(_ah, _reg) ath_hal_reg_read(_ah, _reg)
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struct ath_hal;
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extern void __ahdecl ath_hal_reg_write(struct ath_hal *ah, u_int reg,
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u_int32_t val);
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extern u_int32_t __ahdecl ath_hal_reg_read(struct ath_hal *ah, u_int reg);
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#else
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#define OS_REG_WRITE(_ah, _reg, _val) _OS_REG_WRITE(_ah, _reg, _val)
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#define OS_REG_READ(_ah, _reg) _OS_REG_READ(_ah, _reg)
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#endif /* AH_DEBUG || AH_REGFUNC || AH_DEBUG_ALQ */
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/* Delay n microseconds. */
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extern void __ahdecl ath_hal_delay(int);
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#define OS_DELAY(_n) ath_hal_delay(_n)
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/* Uptime in milliseconds, used by debugging code only */
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#define OS_GETUPTIME(_ah) ((int)(1000 * jiffies / HZ))
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#define OS_INLINE __inline
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#define OS_MEMZERO(_a, _n) ath_hal_memzero((_a), (_n))
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extern void __ahdecl ath_hal_memzero(void *, size_t);
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#define OS_MEMCPY(_d, _s, _n) ath_hal_memcpy(_d,_s,_n)
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extern void *__ahdecl ath_hal_memcpy(void *, const void *, size_t);
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#define __bswap16(val) __swab16(val)
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#define __bswap32(val) __swab32(val)
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#ifdef AH_DEBUG_ALQ
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extern void __ahdecl OS_MARK(struct ath_hal *, u_int id, u_int32_t value);
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#else
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#define OS_MARK(_ah, _id, _v)
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#endif
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#define __DECONST(type, var) ((type)(unsigned long)(const void *)(var))
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#define __printflike(fmtarg, firstvararg) \
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__attribute__((__format__ (__printf__, fmtarg, firstvararg)))
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#define __va_list va_list
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#undef swap
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#endif /* _ATH_AH_OSDEP_H_ */
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