mirror of https://github.com/proski/madwifi
60 lines
2.5 KiB
C
60 lines
2.5 KiB
C
/*
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* Copyright (c) 2002-2008 Sam Leffler, Errno Consulting
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* Copyright (c) 2002-2004 Atheros Communications, Inc.
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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* $Id: ar5210phy.h,v 1.4 2008/11/10 01:19:37 sam Exp $
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*/
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#ifndef _DEV_ATH_AR5210PHY_H
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#define _DEV_ATH_AR5210PHY_H
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/*
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* Definitions for the PHY on the Atheros AR5210 parts.
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*/
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/* PHY Registers */
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#define AR_PHY_BASE 0x9800 /* PHY register base */
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#define AR_PHY(_n) (AR_PHY_BASE + ((_n)<<2))
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#define AR_PHY_FRCTL 0x9804 /* PHY frame control */
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#define AR_PHY_TURBO_MODE 0x00000001 /* PHY turbo mode */
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#define AR_PHY_TURBO_SHORT 0x00000002 /* PHY turbo short symbol */
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#define AR_PHY_TIMING_ERR 0x01000000 /* Detect PHY timing error */
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#define AR_PHY_PARITY_ERR 0x02000000 /* Detect signal parity err */
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#define AR_PHY_ILLRATE_ERR 0x04000000 /* Detect PHY illegal rate */
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#define AR_PHY_ILLLEN_ERR 0x08000000 /* Detect PHY illegal length */
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#define AR_PHY_SERVICE_ERR 0x20000000 /* Detect PHY nonzero service */
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#define AR_PHY_TXURN_ERR 0x40000000 /* DetectPHY TX underrun */
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#define AR_PHY_FRCTL_BITS \
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"\20\1TURBO_MODE\2TURBO_SHORT\30TIMING_ERR\31PARITY_ERR\32ILLRATE_ERR"\
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"\33ILLEN_ERR\35SERVICE_ERR\36TXURN_ERR"
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#define AR_PHY_AGC 0x9808 /* PHY AGC command */
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#define AR_PHY_AGC_DISABLE 0x08000000 /* Disable PHY AGC */
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#define AR_PHY_AGC_BITS "\20\33DISABLE"
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#define AR_PHY_CHIPID 0x9818 /* PHY chip revision */
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#define AR_PHY_ACTIVE 0x981c /* PHY activation */
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#define AR_PHY_ENABLE 0x00000001 /* activate PHY */
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#define AR_PHY_DISABLE 0x00000002 /* deactivate PHY */
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#define AR_PHY_ACTIVE_BITS "\20\1ENABLE\2DISABLE"
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#define AR_PHY_AGCCTL 0x9860 /* PHY calibration and noise floor */
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#define AR_PHY_AGC_CAL 0x00000001 /* PHY internal calibration */
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#define AR_PHY_AGC_NF 0x00000002 /* calc PHY noise-floor */
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#define AR_PHY_AGCCTL_BITS "\20\1CAL\2NF"
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#endif /* _DEV_ATH_AR5210PHY_H */
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