mirror of https://github.com/proski/madwifi
Fix sample and minstrel algorithms for AR5416
Use correct shifts for the rate data. Remove excessive debug statements that would have to be extended even further to deal with AR5416. The code has been taken from the FreeBSD driver. The original coding style has been preserved. git-svn-id: http://madwifi-project.org/svn/madwifi/trunk@4015 0192ed92-7a03-0410-a25b-9323aeb14dbd
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proski
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a71559e552
commit
cf2afadc08
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@ -470,10 +470,10 @@ ath_rate_tx_complete(struct ath_softc *sc,
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int tries = 0;
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int mrr;
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int final_ndx;
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int rate0, tries0, ndx0;
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int rate1, tries1, ndx1;
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int rate2, tries2, ndx2;
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int rate3, tries3, ndx3;
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int rate0, tries0, ndx0, hwrate0;
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int rate1, tries1, ndx1, hwrate1;
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int rate2, tries2, ndx2, hwrate2;
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int rate3, tries3, ndx3, hwrate3;
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/* This is the index in the retry chain we finish at.
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* With no retransmits, it is always 0.
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@ -520,19 +520,31 @@ ath_rate_tx_complete(struct ath_softc *sc,
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* call will always return 6,3,2,2. For some packets, we can
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* get a mrr of 0, -1, -1, -1, which indicates there is no
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* chain installed for that packet */
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rate0 = sc->sc_hwmap[MS(ds->ds_ctl3, AR_XmitRate0)].ieeerate;
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if (sc->sc_ah->ah_magic != 0x20065416) {
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hwrate0 = MS(ds->ds_ctl3, AR_XmitRate0);
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hwrate1 = MS(ds->ds_ctl3, AR_XmitRate1);
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hwrate2 = MS(ds->ds_ctl3, AR_XmitRate2);
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hwrate3 = MS(ds->ds_ctl3, AR_XmitRate3);
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} else {
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hwrate0 = MS(ds->ds_ctl3, AR5416_XmitRate0);
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hwrate1 = MS(ds->ds_ctl3, AR5416_XmitRate1);
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hwrate2 = MS(ds->ds_ctl3, AR5416_XmitRate2);
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hwrate3 = MS(ds->ds_ctl3, AR5416_XmitRate3);
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}
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rate0 = sc->sc_hwmap[hwrate0].ieeerate;
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tries0 = MS(ds->ds_ctl2, AR_XmitDataTries0);
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ndx0 = rate_to_ndx(sn, rate0);
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rate1 = sc->sc_hwmap[MS(ds->ds_ctl3, AR_XmitRate1)].ieeerate;
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rate1 = sc->sc_hwmap[hwrate1].ieeerate;
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tries1 = MS(ds->ds_ctl2, AR_XmitDataTries1);
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ndx1 = rate_to_ndx(sn, rate1);
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rate2 = sc->sc_hwmap[MS(ds->ds_ctl3, AR_XmitRate2)].ieeerate;
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rate2 = sc->sc_hwmap[hwrate2].ieeerate;
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tries2 = MS(ds->ds_ctl2, AR_XmitDataTries2);
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ndx2 = rate_to_ndx(sn, rate2);
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rate3 = sc->sc_hwmap[MS(ds->ds_ctl3, AR_XmitRate3)].ieeerate;
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rate3 = sc->sc_hwmap[hwrate3].ieeerate;
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tries3 = MS(ds->ds_ctl2, AR_XmitDataTries3);
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ndx3 = rate_to_ndx(sn, rate3);
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@ -209,6 +209,16 @@ struct minstrel_node {
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#define AR_XmitRate3 0x000f8000 /* series 3 tx rate */
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#define AR_XmitRate3_S 15
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/* TX ds_ctl3 for 5416 */
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#define AR5416_XmitRate0 0x000000ff /* series 0 tx rate */
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#define AR5416_XmitRate0_S 0
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#define AR5416_XmitRate1 0x0000ff00 /* series 1 tx rate */
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#define AR5416_XmitRate1_S 8
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#define AR5416_XmitRate2 0x00ff0000 /* series 2 tx rate */
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#define AR5416_XmitRate2_S 16
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#define AR5416_XmitRate3 0xff000000 /* series 3 tx rate */
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#define AR5416_XmitRate3_S 24
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#define MS(_v, _f) (((_v) & (_f)) >> _f##_S)
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#endif /* _DEV_ATH_RATE_MINSTEL_H */
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@ -681,31 +681,7 @@ ath_rate_tx_complete(struct ath_softc *sc,
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MAC_ADDR(an->an_node.ni_macaddr), __func__);
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return;
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}
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mrr = sc->sc_mrretry && !(ic->ic_flags & IEEE80211_F_USEPROT) && ENABLE_MRR;
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if (sc->sc_mrretry && ts->ts_status) {
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/* this packet failed */
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DPRINTF(sc, ATH_DEBUG_RATE, "%s: " MAC_FMT " size %u rate/try %u/%u %u/%u %u/%u %u/%u status %s retries (%u/%u)\n",
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dev_info,
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MAC_ADDR(an->an_node.ni_macaddr),
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bin_to_size(size_to_bin(frame_size)),
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sc->sc_hwmap[MS(ds->ds_ctl3, AR_XmitRate0)].ieeerate,
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MS(ds->ds_ctl2, AR_XmitDataTries0),
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sc->sc_hwmap[MS(ds->ds_ctl3, AR_XmitRate1)].ieeerate,
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MS(ds->ds_ctl2, AR_XmitDataTries1),
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sc->sc_hwmap[MS(ds->ds_ctl3, AR_XmitRate2)].ieeerate,
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MS(ds->ds_ctl2, AR_XmitDataTries2),
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sc->sc_hwmap[MS(ds->ds_ctl3, AR_XmitRate3)].ieeerate,
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MS(ds->ds_ctl2, AR_XmitDataTries3),
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ts->ts_status ? "FAIL" : "OK",
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short_tries, long_tries);
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}
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mrr = sc->sc_mrretry && !(ic->ic_flags & IEEE80211_F_USEPROT) && ENABLE_MRR;
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if (!mrr || !(ts->ts_rate & HAL_TXSTAT_ALTRATE)) {
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/* only one rate was used */
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int ndx = rate_to_ndx(sn, final_rate);
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@ -718,7 +694,7 @@ ath_rate_tx_complete(struct ath_softc *sc,
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short_tries, long_tries, ts->ts_status);
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}
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} else {
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unsigned int rate[4], tries[4];
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unsigned int rate[4], tries[4], hwrate[4];
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int ndx[4];
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int finalTSIdx = ts->ts_finaltsi;
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@ -726,19 +702,31 @@ ath_rate_tx_complete(struct ath_softc *sc,
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* Process intermediate rates that failed.
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*/
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rate[0] = sc->sc_hwmap[MS(ds->ds_ctl3, AR_XmitRate0)].ieeerate;
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if (sc->sc_ah->ah_magic != 0x20065416) {
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hwrate[0] = MS(ds->ds_ctl3, AR_XmitRate0);
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hwrate[1] = MS(ds->ds_ctl3, AR_XmitRate1);
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hwrate[2] = MS(ds->ds_ctl3, AR_XmitRate2);
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hwrate[3] = MS(ds->ds_ctl3, AR_XmitRate3);
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} else {
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hwrate[0] = MS(ds->ds_ctl3, AR5416_XmitRate0);
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hwrate[1] = MS(ds->ds_ctl3, AR5416_XmitRate1);
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hwrate[2] = MS(ds->ds_ctl3, AR5416_XmitRate2);
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hwrate[3] = MS(ds->ds_ctl3, AR5416_XmitRate3);
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}
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rate[0] = sc->sc_hwmap[hwrate[0]].ieeerate;
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tries[0] = MS(ds->ds_ctl2, AR_XmitDataTries0);
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ndx[0] = rate_to_ndx(sn, rate[0]);
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rate[1] = sc->sc_hwmap[MS(ds->ds_ctl3, AR_XmitRate1)].ieeerate;
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rate[1] = sc->sc_hwmap[hwrate[1]].ieeerate;
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tries[1] = MS(ds->ds_ctl2, AR_XmitDataTries1);
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ndx[1] = rate_to_ndx(sn, rate[1]);
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rate[2] = sc->sc_hwmap[MS(ds->ds_ctl3, AR_XmitRate2)].ieeerate;
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rate[2] = sc->sc_hwmap[hwrate[2]].ieeerate;
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tries[2] = MS(ds->ds_ctl2, AR_XmitDataTries2);
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ndx[2] = rate_to_ndx(sn, rate[2]);
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rate[3] = sc->sc_hwmap[MS(ds->ds_ctl3, AR_XmitRate3)].ieeerate;
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rate[3] = sc->sc_hwmap[hwrate[3]].ieeerate;
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tries[3] = MS(ds->ds_ctl2, AR_XmitDataTries3);
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ndx[3] = rate_to_ndx(sn, rate[3]);
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@ -135,6 +135,16 @@ struct sample_node {
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#define AR_XmitRate3 0x000f8000 /* series 3 tx rate */
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#define AR_XmitRate3_S 15
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/* TX ds_ctl3 for 5416 */
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#define AR5416_XmitRate0 0x000000ff /* series 0 tx rate */
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#define AR5416_XmitRate0_S 0
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#define AR5416_XmitRate1 0x0000ff00 /* series 1 tx rate */
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#define AR5416_XmitRate1_S 8
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#define AR5416_XmitRate2 0x00ff0000 /* series 2 tx rate */
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#define AR5416_XmitRate2_S 16
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#define AR5416_XmitRate3 0xff000000 /* series 3 tx rate */
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#define AR5416_XmitRate3_S 24
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#define MS(_v, _f) (((_v) & (_f)) >> _f##_S)
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#endif /* _DEV_ATH_RATE_SAMPLE_H */
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