Remove all reverse engineering support, it's pointless now

git-svn-id: http://madwifi-project.org/svn/madwifi/trunk@4008 0192ed92-7a03-0410-a25b-9323aeb14dbd
This commit is contained in:
proski 2009-04-22 22:05:57 +00:00
parent 43c86cb332
commit c62003532a
10 changed files with 0 additions and 319 deletions

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@ -25,14 +25,6 @@ ifndef ATH_CAP_TX99
export ATH_CAP_TX99=0 export ATH_CAP_TX99=0
endif endif
# WARNING: The use of these extensions may introduce a security risk (someone can peek/poke registers on your Atheros device)
ifndef ATH_REVERSE_ENGINEERING
export ATH_REVERSE_ENGINEERING=0
endif
ifndef ATH_REVERSE_ENGINEERING_WITH_NO_FEAR
export ATH_REVERSE_ENGINEERING_WITH_NO_FEAR=0
endif
# #
# directives # directives
# #
@ -59,12 +51,3 @@ endif
ifneq ($(strip $(ATH_CAP_TX99)),0) ifneq ($(strip $(ATH_CAP_TX99)),0)
COPTS+= -DATH_TX99_DIAG=1 COPTS+= -DATH_TX99_DIAG=1
endif endif
# WARNING: The use of these extensions may introduce a security risk (someone can peek/poke registers on your Atheros device)
ifneq ($(strip $(ATH_REVERSE_ENGINEERING)),0)
COPTS+= -DATH_REVERSE_ENGINEERING=1
endif
ifneq ($(strip $(ATH_REVERSE_ENGINEERING_WITH_NO_FEAR)),0)
COPTS+= -DATH_REVERSE_ENGINEERING_WITH_NO_FEAR=1 -DATH_REVERSE_ENGINEERING=1
endif

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@ -235,18 +235,6 @@ static int ath_getchannels(struct net_device *, u_int, HAL_BOOL, HAL_BOOL);
static void ath_led_event(struct ath_softc *, int); static void ath_led_event(struct ath_softc *, int);
static void ath_update_txpow(struct ath_softc *); static void ath_update_txpow(struct ath_softc *);
#ifdef ATH_REVERSE_ENGINEERING
/* Reverse engineering utility commands */
static void ath_registers_dump(struct ieee80211com *ic);
static void ath_registers_dump_delta(struct ieee80211com *ic);
static void ath_registers_mark(struct ieee80211com *ic);
static unsigned int ath_read_register(struct ieee80211com *ic,
unsigned int address, unsigned int *value);
static unsigned int ath_write_register(struct ieee80211com *ic,
unsigned int address, unsigned int value);
static void ath_ar5212_registers_dump(struct ath_softc *sc);
#endif /* #ifdef ATH_REVERSE_ENGINEERING */
static int ath_set_mac_address(struct net_device *, void *); static int ath_set_mac_address(struct net_device *, void *);
static int ath_change_mtu(struct net_device *, int); static int ath_change_mtu(struct net_device *, int);
static int ath_ioctl(struct net_device *, struct ifreq *, int); static int ath_ioctl(struct net_device *, struct ifreq *, int);
@ -1053,13 +1041,6 @@ ath_attach(u_int16_t devid, struct net_device *dev, HAL_BUS_TAG tag)
ic->ic_scan_end = ath_scan_end; ic->ic_scan_end = ath_scan_end;
ic->ic_set_channel = ath_set_channel; ic->ic_set_channel = ath_set_channel;
#ifdef ATH_REVERSE_ENGINEERING
ic->ic_read_register = ath_read_register;
ic->ic_write_register = ath_write_register;
ic->ic_registers_dump = ath_registers_dump;
ic->ic_registers_dump_delta = ath_registers_dump_delta;
ic->ic_registers_mark = ath_registers_mark;
#endif /* #ifdef ATH_REVERSE_ENGINEERING */
ic->ic_debug_ath_iwpriv = ath_debug_iwpriv; ic->ic_debug_ath_iwpriv = ath_debug_iwpriv;
ic->ic_set_coverageclass = ath_set_coverageclass; ic->ic_set_coverageclass = ath_set_coverageclass;
@ -12181,194 +12162,6 @@ ath_rcv_dev_event(struct notifier_block *this, unsigned long event,
return 0; return 0;
} }
/* A filter for hiding the addresses we don't think are very interesting or
* which have adverse side effects. Return AH_TRUE if the address should be
* exlucded, and AH_FALSE otherwise. */
#ifdef ATH_REVERSE_ENGINEERING
static HAL_BOOL
ath_regdump_filter(struct ath_softc *sc, u_int32_t address)
{
#ifndef ATH_REVERSE_ENGINEERING_WITH_NO_FEAR
char buf[MAX_REGISTER_NAME_LEN];
#endif
if ((ar_device(sc->devid) != 5212) && (ar_device(sc->devid) != 5213))
return AH_TRUE;
/* Addresses with side effects are never dumped out by bulk debug
* dump routines. */
if ((address >= 0x00c0) && (address <= 0x00df)) return AH_TRUE;
if ((address >= 0x143c) && (address <= 0x143f)) return AH_TRUE;
/* PCI timing registers are not interesting */
if ((address >= 0x4000) && (address <= 0x5000)) return AH_TRUE;
/* Reading 0x0920-0x092c causes crashes in turbo A mode? */
if ((address >= 0x0920) && (address <= 0x092c)) return AH_TRUE;
#ifndef ATH_REVERSE_ENGINEERING_WITH_NO_FEAR
/* We are being conservative, and do not want to access addresses that
* may crash the system, so we will only consider addresses we know
* the names of from previous reverse engineering efforts (AKA
* openHAL). */
return (AH_TRUE == ath_hal_lookup_register_name(sc->sc_ah, buf,
MAX_REGISTER_NAME_LEN, address)) ?
AH_FALSE : AH_TRUE;
#else /* #ifndef ATH_REVERSE_ENGINEERING_WITH_NO_FEAR */
return AH_FALSE;
#endif /* #ifndef ATH_REVERSE_ENGINEERING_WITH_NO_FEAR */
}
#endif /* #ifdef ATH_REVERSE_ENGINEERING */
/* Dump any Atheros registers we think might be interesting. */
#ifdef ATH_REVERSE_ENGINEERING
static void
ath_ar5212_registers_dump(struct ath_softc *sc)
{
unsigned int address = MIN_REGISTER_ADDRESS;
unsigned int value = 0;
do {
if (ath_regdump_filter(sc, address))
continue;
value = ath_reg_read(sc, address);
ath_hal_print_decoded_register(sc->sc_ah, SC_DEV_NAME(sc),
address, value, value,
AH_FALSE);
} while ((address += 4) < MAX_REGISTER_ADDRESS);
}
#endif /* #ifdef ATH_REVERSE_ENGINEERING */
/* Dump any changes that were made to Atheros registers we think might be
* interesting, since the last call to ath_ar5212_registers_mark. */
#ifdef ATH_REVERSE_ENGINEERING
static void
ath_ar5212_registers_dump_delta(struct ath_softc *sc)
{
unsigned int address = MIN_REGISTER_ADDRESS;
unsigned int value = 0;
unsigned int *p_old = 0;
do {
if (ath_regdump_filter(sc, address))
continue;
value = ath_reg_read(sc, address);
p_old = (unsigned int *)&sc->register_snapshot[address];
if (*p_old != value) {
ath_hal_print_decoded_register(sc->sc_ah, SC_DEV_NAME(sc),
address, *p_old, value, AH_FALSE);
}
} while ((address += 4) < MAX_REGISTER_ADDRESS);
}
#endif /* #ifdef ATH_REVERSE_ENGINEERING */
/* Mark the current values of all Atheros registers we think might be
* interesting, so any changes can be dumped out by a subsequent call to
* ath_ar5212_registers_dump_delta. */
#ifdef ATH_REVERSE_ENGINEERING
static void
ath_ar5212_registers_mark(struct ath_softc *sc)
{
unsigned int address = MIN_REGISTER_ADDRESS;
do {
*((unsigned int *)&sc->register_snapshot[address]) =
ath_regdump_filter(sc, address) ?
0x0 : ath_reg_read(sc, address);
} while ((address += 4) < MAX_REGISTER_ADDRESS);
}
#endif /* #ifdef ATH_REVERSE_ENGINEERING */
/* Read an Atheros register...for reverse engineering. */
#ifdef ATH_REVERSE_ENGINEERING
static unsigned int
ath_read_register(struct ieee80211com *ic, unsigned int address,
unsigned int *value)
{
struct ath_softc *sc = netdev_priv(ic->ic_dev);
if (address >= MAX_REGISTER_ADDRESS) {
IPRINTF(sc, "Illegal Atheros register access "
"attempted: 0x%04x >= 0x%04x\n",
address, MAX_REGISTER_ADDRESS);
return 1;
}
if (address % 4) {
IPRINTF(sc, "Illegal Atheros register access "
"attempted: 0x%04x %% 4 != 0\n",
address);
return 1;
}
*value = ath_reg_read(sc, address);
IPRINTF(sc, "*0x%04x -> 0x%08x\n", address, *value);
return 0;
}
#endif /* #ifdef ATH_REVERSE_ENGINEERING */
/* Write to a Atheros register...for reverse engineering.
* XXX: known issue with iwpriv argument handling. It only knows how to
* handle signed 32-bit integers and seems to get confused if you are writing
* 0xffffffff or something. Using the signed integer equivalent always works,
* but for some reason 0xffffffff is just as likely to give you something else
* at the moment. */
#ifdef ATH_REVERSE_ENGINEERING
static unsigned int
ath_write_register(struct ieee80211com *ic, unsigned int address,
unsigned int value)
{
struct ath_softc *sc = netdev_priv(ic->ic_dev);
if (address >= MAX_REGISTER_ADDRESS) {
IPRINTF(sc, "Illegal Atheros register access "
"attempted: 0x%04x >= 0x%04x\n",
address,
MAX_REGISTER_ADDRESS);
return 1;
}
if (address % 4) {
IPRINTF(sc, "Illegal Atheros register access "
"attempted: 0x%04x %% 4 != 0\n",
address);
return 1;
}
ath_reg_write(sc, address, value);
IPRINTF(sc, "*0x%04x <- 0x%08x = 0x%08x\n", address, value,
ath_reg_read(sc, address));
return 0;
}
#endif /* #ifdef ATH_REVERSE_ENGINEERING */
/* Dump out Atheros registers (excluding known duplicate mappings,
* unmapped zones, etc.) */
#ifdef ATH_REVERSE_ENGINEERING
static void
ath_registers_dump(struct ieee80211com *ic)
{
struct net_device *dev = ic->ic_dev;
struct ath_softc *sc = netdev_priv(dev);
ath_ar5212_registers_dump(sc);
}
#endif /* #ifdef ATH_REVERSE_ENGINEERING */
/* Make a copy of significant registers in the Atheros chip for later
* comparison and dump with ath_registers_dump_delta */
#ifdef ATH_REVERSE_ENGINEERING
static void
ath_registers_mark(struct ieee80211com *ic)
{
struct net_device *dev = ic->ic_dev;
struct ath_softc *sc = netdev_priv(dev);
ath_ar5212_registers_mark(sc);
}
#endif /* #ifdef ATH_REVERSE_ENGINEERING */
/* Dump out any registers changed since the last call to
* ath_registers_mark */
#ifdef ATH_REVERSE_ENGINEERING
static void
ath_registers_dump_delta(struct ieee80211com *ic)
{
struct net_device *dev = ic->ic_dev;
struct ath_softc *sc = netdev_priv(dev);
ath_ar5212_registers_dump_delta(sc);
}
#endif /* #ifdef ATH_REVERSE_ENGINEERING */
/* Caller must have the TXBUF_LOCK */ /* Caller must have the TXBUF_LOCK */
static void static void
ath_return_txbuf_locked(struct ath_softc *sc, struct ath_buf **bf) ath_return_txbuf_locked(struct ath_softc *sc, struct ath_buf **bf)

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@ -28,9 +28,6 @@
#define AR5K_AR5212_PHY_ERR_FIL 0x810c #define AR5K_AR5212_PHY_ERR_FIL 0x810c
#define AR5K_AR5212_PHY_ERR_FIL_RADAR 0x00000020 #define AR5K_AR5212_PHY_ERR_FIL_RADAR 0x00000020
/* AR5K_PHY_RADAR register definition reverse engineered with
* ATH_REVERSE_ENGINEERING. */
/* PHY radar detection register [5111+] */ /* PHY radar detection register [5111+] */
#define AR5K_PHY_RADAR 0x9954 #define AR5K_PHY_RADAR 0x9954

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@ -340,11 +340,6 @@ enum {
#define ATH_KEYMAX 128 /* max key cache size we handle */ #define ATH_KEYMAX 128 /* max key cache size we handle */
#define ATH_KEYBYTES (ATH_KEYMAX / NBBY) /* storage space in bytes */ #define ATH_KEYBYTES (ATH_KEYMAX / NBBY) /* storage space in bytes */
#ifdef ATH_REVERSE_ENGINEERING
#define MIN_REGISTER_ADDRESS 0x0000 /* PCI register addresses are taken as releative to the appropriate BAR */
#define MAX_REGISTER_ADDRESS 0xc000 /* AR5212/AR5213 seems to have a 48k address range */
#define MAX_REGISTER_NAME_LEN 32 /* Maximum length of register nicknames in debug output */
#endif /* #ifdef ATH_REVERSE_ENGINEERING */
/* /*
* Convert from net80211 layer values to Ath layer values. Hopefully this will * Convert from net80211 layer values to Ath layer values. Hopefully this will
* be optimised away when the two constants are the same. * be optimised away when the two constants are the same.
@ -813,10 +808,6 @@ struct ath_softc {
struct timer_list sc_mib_enable; struct timer_list sc_mib_enable;
#ifdef ATH_REVERSE_ENGINEERING
u_int8_t register_snapshot[MAX_REGISTER_ADDRESS];
#endif /* #ifdef ATH_REVERSE_ENGINEERING */
#ifdef ATH_SUPERG_DYNTURBO #ifdef ATH_SUPERG_DYNTURBO
struct timer_list sc_dturbo_switch_mode;/* AP scan timer */ struct timer_list sc_dturbo_switch_mode;/* AP scan timer */
u_int32_t sc_dturbo_tcount; /* beacon intval count */ u_int32_t sc_dturbo_tcount; /* beacon intval count */

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@ -539,7 +539,6 @@ struct ieee80211req_scan_result {
#define IEEE80211_IOCTL_CHANSWITCH (SIOCIWFIRSTPRIV+8) #define IEEE80211_IOCTL_CHANSWITCH (SIOCIWFIRSTPRIV+8)
#define IEEE80211_IOCTL_GET_APPIEBUF (SIOCIWFIRSTPRIV+9) #define IEEE80211_IOCTL_GET_APPIEBUF (SIOCIWFIRSTPRIV+9)
#define IEEE80211_IOCTL_SET_APPIEBUF (SIOCIWFIRSTPRIV+10) #define IEEE80211_IOCTL_SET_APPIEBUF (SIOCIWFIRSTPRIV+10)
#define IEEE80211_IOCTL_READREG (SIOCIWFIRSTPRIV+11)
#define IEEE80211_IOCTL_FILTERFRAME (SIOCIWFIRSTPRIV+12) #define IEEE80211_IOCTL_FILTERFRAME (SIOCIWFIRSTPRIV+12)
#define IEEE80211_IOCTL_GETCHANINFO (SIOCIWFIRSTPRIV+13) #define IEEE80211_IOCTL_GETCHANINFO (SIOCIWFIRSTPRIV+13)
#define IEEE80211_IOCTL_SETOPTIE (SIOCIWFIRSTPRIV+14) #define IEEE80211_IOCTL_SETOPTIE (SIOCIWFIRSTPRIV+14)
@ -547,7 +546,6 @@ struct ieee80211req_scan_result {
#define IEEE80211_IOCTL_SETMLME (SIOCIWFIRSTPRIV+16) #define IEEE80211_IOCTL_SETMLME (SIOCIWFIRSTPRIV+16)
#define IEEE80211_IOCTL_RADAR (SIOCIWFIRSTPRIV+17) #define IEEE80211_IOCTL_RADAR (SIOCIWFIRSTPRIV+17)
#define IEEE80211_IOCTL_SETKEY (SIOCIWFIRSTPRIV+18) #define IEEE80211_IOCTL_SETKEY (SIOCIWFIRSTPRIV+18)
#define IEEE80211_IOCTL_WRITEREG (SIOCIWFIRSTPRIV+19)
#define IEEE80211_IOCTL_DELKEY (SIOCIWFIRSTPRIV+20) #define IEEE80211_IOCTL_DELKEY (SIOCIWFIRSTPRIV+20)
#define IEEE80211_IOCTL_HALMAP (SIOCIWFIRSTPRIV+21) #define IEEE80211_IOCTL_HALMAP (SIOCIWFIRSTPRIV+21)
#define IEEE80211_IOCTL_ADDMAC (SIOCIWFIRSTPRIV+22) #define IEEE80211_IOCTL_ADDMAC (SIOCIWFIRSTPRIV+22)
@ -624,7 +622,6 @@ enum {
IEEE80211_PARAM_REGCLASS = 59, /* enable regclass ids in country IE */ IEEE80211_PARAM_REGCLASS = 59, /* enable regclass ids in country IE */
IEEE80211_PARAM_DROPUNENC_EAPOL = 60, /* drop unencrypted eapol frames */ IEEE80211_PARAM_DROPUNENC_EAPOL = 60, /* drop unencrypted eapol frames */
IEEE80211_PARAM_SHPREAMBLE = 61, /* Short Preamble */ IEEE80211_PARAM_SHPREAMBLE = 61, /* Short Preamble */
IEEE80211_PARAM_DUMPREGS = 62, /* Pretty printed dump of Atheros hardware registers */
IEEE80211_PARAM_DOTH_ALGORITHM = 63, /* spectrum management algorithm */ IEEE80211_PARAM_DOTH_ALGORITHM = 63, /* spectrum management algorithm */
IEEE80211_PARAM_DOTH_MINCOM = 64, /* minimum number of common channels */ IEEE80211_PARAM_DOTH_MINCOM = 64, /* minimum number of common channels */
IEEE80211_PARAM_DOTH_SLCG = 65, /* permil of Stations Lost per Channel Gained */ IEEE80211_PARAM_DOTH_SLCG = 65, /* permil of Stations Lost per Channel Gained */

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@ -511,14 +511,6 @@ struct ieee80211com {
/* MHz to IEEE channel conversion */ /* MHz to IEEE channel conversion */
u_int (*ic_mhz2ieee)(struct ieee80211com *, u_int, u_int); u_int (*ic_mhz2ieee)(struct ieee80211com *, u_int, u_int);
#ifdef ATH_REVERSE_ENGINEERING
/* debug and reverse engineering hooks */
void (*ic_registers_dump)(struct ieee80211com *);
void (*ic_registers_mark)(struct ieee80211com *);
void (*ic_registers_dump_delta)(struct ieee80211com *);
unsigned int (*ic_write_register)(struct ieee80211com *, unsigned int, unsigned int);
unsigned int (*ic_read_register)(struct ieee80211com *, unsigned int, unsigned int*);
#endif /* #ifdef ATH_REVERSE_ENGINEERING */
int (*ic_debug_ath_iwpriv)(struct ieee80211com *, unsigned int param, unsigned int value); int (*ic_debug_ath_iwpriv)(struct ieee80211com *, unsigned int param, unsigned int value);
}; };

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@ -1596,51 +1596,6 @@ ieee80211_ioctl_giwtxpow(struct net_device *dev, struct iw_request_info *info,
return 0; return 0;
} }
#ifdef ATH_REVERSE_ENGINEERING
static int
ieee80211_dump_registers(struct net_device *dev, struct iw_request_info *info, void *w, char *extra)
{
unsigned int *params = (unsigned int *)extra;
struct ieee80211vap *vap = netdev_priv(dev);
struct ieee80211com *ic = vap->iv_ic;
switch (params[1]) {
case 2:
ic->ic_registers_mark(ic);
break;
case 1:
ic->ic_registers_dump_delta(ic);
break;
case 0:
default:
ic->ic_registers_dump(ic);
break;
}
return 0;
}
#endif /* #ifdef ATH_REVERSE_ENGINEERING */
#ifdef ATH_REVERSE_ENGINEERING
static int
ieee80211_ioctl_writereg(struct net_device *dev, struct iw_request_info *info, void *w, char *extra)
{
unsigned int *params = (unsigned int *)extra;
struct ieee80211vap *vap = netdev_priv(dev);
struct ieee80211com *ic = vap->iv_ic;
return ic->ic_write_register(ic, params[0], params[1]);
}
#endif /* #ifdef ATH_REVERSE_ENGINEERING */
#ifdef ATH_REVERSE_ENGINEERING
static int
ieee80211_ioctl_readreg(struct net_device *dev, struct iw_request_info *info, void *w, char *extra)
{
unsigned int *params = (unsigned int *)extra;
struct ieee80211vap *vap = netdev_priv(dev);
struct ieee80211com *ic = vap->iv_ic;
return ic->ic_read_register(ic, params[0], &params[0]);
}
#endif /* #ifdef ATH_REVERSE_ENGINEERING */
struct waplistreq { /* XXX: not the right place for declaration? */ struct waplistreq { /* XXX: not the right place for declaration? */
struct ieee80211vap *vap; struct ieee80211vap *vap;
struct sockaddr addr[IW_MAX_AP]; struct sockaddr addr[IW_MAX_AP];
@ -2872,11 +2827,6 @@ ieee80211_ioctl_setparam(struct net_device *dev, struct iw_request_info *info,
else else
ic->ic_flags_ext &= ~IEEE80211_FEXT_MARKDFS; ic->ic_flags_ext &= ~IEEE80211_FEXT_MARKDFS;
break; break;
#ifdef ATH_REVERSE_ENGINEERING
case IEEE80211_PARAM_DUMPREGS:
ieee80211_dump_registers(dev, info, w, extra);
break;
#endif /* #ifdef ATH_REVERSE_ENGINEERING */
default: default:
retv = EOPNOTSUPP; retv = EOPNOTSUPP;
break; break;
@ -5662,18 +5612,6 @@ static const struct iw_priv_args ieee80211_priv_args[] = {
IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "debug_scanbufs" }, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "debug_scanbufs" },
{ IEEE80211_PARAM_LEAKTXBUFS, { IEEE80211_PARAM_LEAKTXBUFS,
IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "debug_leaktxbufs" }, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "debug_leaktxbufs" },
#ifdef ATH_REVERSE_ENGINEERING
/*
Diagnostic dump of device registers
*/
{ IEEE80211_PARAM_DUMPREGS,
IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, 0, "dumpregs" },
{ IEEE80211_IOCTL_READREG,
IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1, "readreg" },
{ IEEE80211_IOCTL_WRITEREG,
IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 2, 0, "writereg" },
#endif /* #ifdef ATH_REVERSE_ENGINEERING */
}; };
#define set_handler(x,f) [x - SIOCIWFIRST] = (iw_handler) f #define set_handler(x,f) [x - SIOCIWFIRST] = (iw_handler) f
@ -5757,10 +5695,6 @@ static const iw_handler ieee80211_priv_handlers[] = {
set_priv(IEEE80211_IOCTL_WDSADDMAC, ieee80211_ioctl_wdsmac), set_priv(IEEE80211_IOCTL_WDSADDMAC, ieee80211_ioctl_wdsmac),
set_priv(IEEE80211_IOCTL_WDSDELMAC, ieee80211_ioctl_wdsdelmac), set_priv(IEEE80211_IOCTL_WDSDELMAC, ieee80211_ioctl_wdsdelmac),
set_priv(IEEE80211_IOCTL_KICKMAC, ieee80211_ioctl_kickmac), set_priv(IEEE80211_IOCTL_KICKMAC, ieee80211_ioctl_kickmac),
#ifdef ATH_REVERSE_ENGINEERING
set_priv(IEEE80211_IOCTL_READREG, ieee80211_ioctl_readreg),
set_priv(IEEE80211_IOCTL_WRITEREG, ieee80211_ioctl_writereg),
#endif /* #ifdef ATH_REVERSE_ENGINEERING */
}; };
static struct iw_handler_def ieee80211_iw_handler_def = { static struct iw_handler_def ieee80211_iw_handler_def = {

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@ -118,8 +118,6 @@ set80211priv(const char *dev, int op, void *data, int len, int show_err)
IOCTL_ERR(IEEE80211_IOCTL_DELMAC), IOCTL_ERR(IEEE80211_IOCTL_DELMAC),
IOCTL_ERR(IEEE80211_IOCTL_WDSADDMAC), IOCTL_ERR(IEEE80211_IOCTL_WDSADDMAC),
IOCTL_ERR(IEEE80211_IOCTL_WDSDELMAC), IOCTL_ERR(IEEE80211_IOCTL_WDSDELMAC),
IOCTL_ERR(IEEE80211_IOCTL_READREG),
IOCTL_ERR(IEEE80211_IOCTL_WRITEREG),
}; };
if (IEEE80211_IOCTL_SETPARAM <= op && if (IEEE80211_IOCTL_SETPARAM <= op &&
op <= IEEE80211_IOCTL_SETCHANLIST) op <= IEEE80211_IOCTL_SETCHANLIST)

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@ -118,8 +118,6 @@ set80211priv(const char *dev, int op, void *data, int len, int show_err)
IOCTL_ERR(IEEE80211_IOCTL_DELMAC), IOCTL_ERR(IEEE80211_IOCTL_DELMAC),
IOCTL_ERR(IEEE80211_IOCTL_WDSADDMAC), IOCTL_ERR(IEEE80211_IOCTL_WDSADDMAC),
IOCTL_ERR(IEEE80211_IOCTL_WDSDELMAC), IOCTL_ERR(IEEE80211_IOCTL_WDSDELMAC),
IOCTL_ERR(IEEE80211_IOCTL_READREG),
IOCTL_ERR(IEEE80211_IOCTL_WRITEREG),
}; };
if (IEEE80211_IOCTL_SETPARAM <= op && if (IEEE80211_IOCTL_SETPARAM <= op &&
op <= IEEE80211_IOCTL_SETCHANLIST) op <= IEEE80211_IOCTL_SETCHANLIST)

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@ -974,8 +974,6 @@ do80211priv(struct iwreq *iwr, const char *ifname, int op, void *data, size_t le
IOCTL_ERR(IEEE80211_IOCTL_DELMAC), IOCTL_ERR(IEEE80211_IOCTL_DELMAC),
IOCTL_ERR(IEEE80211_IOCTL_WDSADDMAC), IOCTL_ERR(IEEE80211_IOCTL_WDSADDMAC),
IOCTL_ERR(IEEE80211_IOCTL_WDSDELMAC), IOCTL_ERR(IEEE80211_IOCTL_WDSDELMAC),
IOCTL_ERR(IEEE80211_IOCTL_READREG),
IOCTL_ERR(IEEE80211_IOCTL_WRITEREG),
}; };
op -= SIOCIWFIRSTPRIV; op -= SIOCIWFIRSTPRIV;
if (0 <= op && op < ARRAY_SIZE(opnames)) if (0 <= op && op < ARRAY_SIZE(opnames))