mirror of https://github.com/proski/madwifi
Be very careful about using ioread32be() and iowrite32()
They appeared: - in generic code and PARISC - in 2.6.12 - in PPC64 - in 2.6.14 - in merged PowerPC - in 2.6.15 (when the merge occurred) - in MIPS - in 2.6.21 Improve comments and indentation, as the logic is getting more complex. git-svn-id: http://madwifi-project.org/svn/madwifi/trunk@3712 0192ed92-7a03-0410-a25b-9323aeb14dbd
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proski
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@ -151,19 +151,27 @@ extern void *__ahdecl ath_hal_memcpy(void *, const void *, size_t);
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#endif /* AH_BYTE_ORDER */
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/*
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* Some big-endian architectures don't set CONFIG_GENERIC_IOMAP, but fail to
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* implement iowrite32be and ioread32be. Provide compatibility macros when
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* it's needed.
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* The HAL programs big-endian platforms to use byte-swapped hardware registers.
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* This is done to avoid the byte swapping needed to access PCI devices.
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*
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* As of Linux 2.6.24, only MIPS, PARISC and PowerPC implement iowrite32be and
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* ioread32be as functions.
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* Many big-endian architectures provide I/O functions that avoid byte swapping.
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* We use them when possible. Otherwise, we provide replacements. The downside
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* or the replacements is that we may be byte-swapping data twice, so we try to
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* avoid it.
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*
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* The downside or the replacement macros it that we may be byte-swapping data
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* for the second time, so the native implementations should be preferred.
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* We use raw access for Linux prior to 2.6.12. For newer version, we need to
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* use ioread32() and iowrite32(), which would take care of indirect access to
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* the registers.
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*/
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#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,12)) && \
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!defined(CONFIG_GENERIC_IOMAP) && (AH_BYTE_ORDER == AH_BIG_ENDIAN) && \
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!defined(__mips__) && !defined(__hppa__) && !defined(__powerpc__)
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(AH_BYTE_ORDER == AH_BIG_ENDIAN) && \
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!defined(CONFIG_GENERIC_IOMAP) && \
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!defined(CONFIG_PARICS) && \
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!(defined(CONFIG_PPC64) && \
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(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,14))) && \
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!defined(CONFIG_PPC_MERGE) && \
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!(defined(CONFIG_MIPS) && \
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(LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,21)))
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# ifndef iowrite32be
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# define iowrite32be(_val, _addr) iowrite32(swab32((_val)), (_addr))
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# endif
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@ -177,54 +185,53 @@ extern void *__ahdecl ath_hal_memcpy(void *, const void *, size_t);
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* debugging is enabled (AH_DEBUG) or it's explicitly requested for the target.
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*
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* The hardware registers use little-endian byte order natively. Big-endian
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* systems are configured by HAL to enable hardware byte-swap of register reads
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* and writes at reset. This avoid the need to byte-swap the data in software.
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* However, the registers in a certain area from 0x4000 to 0x4fff (PCI clock
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* domain registers) are not byte swapped!
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* systems are configured by HAL to byte-swap of register reads and writes.
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* However, the registers in the areas 0x4000-0x4fff and 0x7000-0x7fff are not
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* byte swapped!
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*
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* Since Linux I/O primitives default to little-endian operations, we only
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* need to suppress byte-swapping on big-endian systems outside the area used
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* by the PCI clock domain registers.
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*/
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#if (AH_BYTE_ORDER == AH_BIG_ENDIAN)
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#define is_reg_le(__reg) ((0x4000 <= (__reg) && (__reg) < 0x5000) || \
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(0x7000 <= (__reg) && (__reg) < 0x8000))
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#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,12)
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#define _OS_REG_WRITE(_ah, _reg, _val) do { \
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# define is_reg_le(__reg) ((0x4000 <= (__reg) && (__reg) < 0x5000) || \
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(0x7000 <= (__reg) && (__reg) < 0x8000))
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# if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,12)
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# define _OS_REG_WRITE(_ah, _reg, _val) do { \
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is_reg_le(_reg) ? \
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iowrite32((_val), (_ah)->ah_sh + (_reg)) : \
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iowrite32be((_val), (_ah)->ah_sh + (_reg)); \
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iowrite32((_val), (_ah)->ah_sh + (_reg)) : \
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iowrite32be((_val), (_ah)->ah_sh + (_reg)); \
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} while (0)
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#define _OS_REG_READ(_ah, _reg) \
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# define _OS_REG_READ(_ah, _reg) \
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(is_reg_le(_reg) ? \
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ioread32((_ah)->ah_sh + (_reg)) : \
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ioread32be((_ah)->ah_sh + (_reg)))
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#else
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#define _OS_REG_WRITE(_ah, _reg, _val) do { \
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writel(is_reg_le(_reg) ? \
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(_val) : cpu_to_le32(_val), \
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(_ah)->ah_sh + (_reg)); \
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ioread32((_ah)->ah_sh + (_reg)) : \
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ioread32be((_ah)->ah_sh + (_reg)))
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# else /* Linux < 2.6.12 */
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# define _OS_REG_WRITE(_ah, _reg, _val) do { \
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writel(is_reg_le(_reg) ? \
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(_val) : cpu_to_le32(_val), \
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(_ah)->ah_sh + (_reg)); \
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} while (0)
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#define _OS_REG_READ(_ah, _reg) \
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# define _OS_REG_READ(_ah, _reg) \
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(is_reg_le(_reg) ? \
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readl((_ah)->ah_sh + (_reg)) : \
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cpu_to_le32(readl((_ah)->ah_sh + (_reg))))
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#endif /* KERNEL_VERSION(2,6,12) */
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#else /* AH_BYTE_ORDER != AH_BIG_ENDIAN */
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#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,12)
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#define _OS_REG_WRITE(_ah, _reg, _val) do { \
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readl((_ah)->ah_sh + (_reg)) : \
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cpu_to_le32(readl((_ah)->ah_sh + (_reg))))
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# endif /* Linux < 2.6.12 */
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#else /* Little endian */
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# if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,12)
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# define _OS_REG_WRITE(_ah, _reg, _val) do { \
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iowrite32((_val), (_ah)->ah_sh + (_reg)); \
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} while (0)
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#define _OS_REG_READ(_ah, _reg) \
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# define _OS_REG_READ(_ah, _reg) \
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ioread32((_ah)->ah_sh + (_reg))
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#else
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#define _OS_REG_WRITE(_ah, _reg, _val) do { \
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# else /* Linux < 2.6.12 */
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# define _OS_REG_WRITE(_ah, _reg, _val) do { \
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writel((_val), (_ah)->ah_sh + (_reg)); \
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} while (0)
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#define _OS_REG_READ(_ah, _reg) \
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# define _OS_REG_READ(_ah, _reg) \
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readl((_ah)->ah_sh + (_reg))
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#endif /* KERNEL_VERSION(2,6,12) */
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#endif /* AH_BYTE_ORDER != AH_BIG_ENDIAN */
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# endif /* Linux < 2.6.12 */
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#endif /* Little endian */
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#define HAL_DEBUG_OFF 0
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/* Show register accesses */
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