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https://github.com/proski/madwifi
synced 2024-11-22 06:21:47 +03:00
Manually stomp the DMA size to 128B for AR5418 devices. This patch should probably be extended to do this for all PCIe devices.
The register defines were taken from ath5k. This patch has been only lightly tested, I'm afraid - trying for more coverage. git-svn-id: http://madwifi-project.org/svn/madwifi/trunk@3641 0192ed92-7a03-0410-a25b-9323aeb14dbd
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@ -627,6 +627,9 @@ ath_attach(u_int16_t devid, struct net_device *dev, HAL_BUS_TAG tag)
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IPRINTF(sc, "Interference mitigation is supported. Currently %s.\n",
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(sc->sc_useintmit ? "enabled" : "disabled"));
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}
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sc->sc_dmasize_stomp = 0;
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/*
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* Check if the MAC has multi-rate retry support.
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* We do this by trying to setup a fake extended
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@ -1698,6 +1701,8 @@ static HAL_BOOL ath_hw_reset(struct ath_softc* sc, HAL_OPMODE opmode,
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ath_hal_setintmit(sc->sc_ah, sc->sc_useintmit);
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#endif
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ath_override_intmit_if_disabled(sc);
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if (sc->sc_dmasize_stomp)
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ath_hal_set_dmasize_pcie(sc->sc_ah);
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if (sc->sc_softled)
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ath_hal_gpioCfgOutput(sc->sc_ah, sc->sc_ledpin);
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ath_update_txpow(sc); /* Update TX power state. */
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@ -143,6 +143,34 @@
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#define DEFAULT_AR5K_PHY_SPUR_THRESH 2
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#define DEFAULT_AR5K_PHY_SIG_FIRSTEP 0
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/*
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* Transmit configuration register
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*/
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#define AR5K_TXCFG 0x0030 /* Register Address */
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#define AR5K_TXCFG_SDMAMR 0x00000007 /* DMA size */
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#define AR5K_TXCFG_SDMAMR_S 0
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/*
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* Receive configuration register
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*/
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#define AR5K_RXCFG 0x0034 /* Register Address */
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#define AR5K_RXCFG_SDMAMW 0x00000007 /* DMA size */
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#define AR5K_RXCFG_SDMAMW_S 0
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/*
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* DMA size definitions (2^(n+2))
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*/
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enum ath5k_dmasize {
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AR5K_DMASIZE_4B = 0,
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AR5K_DMASIZE_8B,
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AR5K_DMASIZE_16B,
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AR5K_DMASIZE_32B,
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AR5K_DMASIZE_64B,
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AR5K_DMASIZE_128B,
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AR5K_DMASIZE_256B,
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AR5K_DMASIZE_512B
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};
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static inline unsigned long field_width(unsigned long mask, unsigned long shift)
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{
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unsigned long r = 0;
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@ -429,4 +457,9 @@ static inline void ath_hal_verify_default_intmit(struct ath_hal *ah) {
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VERIFICATION_WARNING(ah, AR5K_PHY_SPUR, AR5K_PHY_SPUR_THRESH, 0);
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}
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static inline void ath_hal_set_dmasize_pcie(struct ath_hal *ah) {
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SET_FIELD(ah, AR5K_TXCFG, AR5K_TXCFG_SDMAMR, AR5K_DMASIZE_128B);
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SET_FIELD(ah, AR5K_RXCFG, AR5K_RXCFG_SDMAMW, AR5K_DMASIZE_128B);
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}
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#endif /* _IF_ATH_HAL_EXTENSIONS_H_ */
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@ -252,6 +252,9 @@ ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
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dev_info, dev->name, athname ? athname : "Atheros ???",
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(unsigned long long)phymem, dev->irq);
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if (vdevice == AR5418_DEVID)
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sc->aps_sc.sc_dmasize_stomp = 1;
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/* ready to process interrupts */
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sc->aps_sc.sc_invalid = 0;
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@ -692,8 +692,9 @@ struct ath_softc {
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unsigned int sc_txcont:1; /* Is continuous transmit enabled? */
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unsigned int sc_dfs_testmode:1; /* IF this is on, AP vaps will stay in
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* 'channel availability check' indefinately,
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* reporting radar and interference detections.
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*/
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* reporting radar and interference detections. */
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unsigned int sc_dmasize_stomp:1; /* Whether to stomp on DMA size. */
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unsigned int sc_txcont_power; /* Continuous transmit power in 0.5dBm units */
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unsigned int sc_txcont_rate; /* Continuous transmit rate in Mbps */
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