mirror of https://github.com/proski/madwifi
First step for power calibration reading support. This is still work in
progress and only works for eeprom versions < 5. Reference: r3234 Merged from madwifi-trace and replaced with the exact version from madwifi-trace to fix minor differences caused by previous merges. git-svn-id: http://madwifi-project.org/svn/madwifi/trunk@3429 0192ed92-7a03-0410-a25b-9323aeb14dbd
This commit is contained in:
proski
parent
47002fcc6a
commit
6d6c1f9464
504
tools/ath_info.c
504
tools/ath_info.c
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@ -158,6 +158,8 @@ struct ath5k_srev_name {
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#define AR5K_SREV_VER_AR5212 0x50
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#define AR5K_SREV_VER_AR5213 0x55
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#define AR5K_SREV_VER_AR5213A 0x59
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#define AR5K_SREV_VER_AR2413 0x78
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#define AR5K_SREV_VER_AR2414 0x79
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#define AR5K_SREV_VER_AR2424 0xa0
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#define AR5K_SREV_VER_AR5424 0xa3
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#define AR5K_SREV_VER_AR5413 0xa4
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@ -175,6 +177,7 @@ struct ath5k_srev_name {
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#define AR5K_SREV_RAD_5112A 0x35
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#define AR5K_SREV_RAD_2112 0x40
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#define AR5K_SREV_RAD_2112A 0x45
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#define AR5K_SREV_RAD_SC0 0x56 /* Found on 2413/2414 */
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#define AR5K_SREV_RAD_SC1 0x63 /* Found on 5413/5414 */
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#define AR5K_SREV_RAD_SC2 0xa2 /* Found on 2424/5424 */
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#define AR5K_SREV_RAD_5133 0xc0 /* MIMO found on 5418 */
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@ -188,6 +191,8 @@ static const struct ath5k_srev_name ath5k_srev_names[] = {
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{"5212", AR5K_VERSION_VER, AR5K_SREV_VER_AR5212},
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{"5213", AR5K_VERSION_VER, AR5K_SREV_VER_AR5213},
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{"5213A", AR5K_VERSION_VER, AR5K_SREV_VER_AR5213A},
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{"2413", AR5K_VERSION_VER, AR5K_SREV_VER_AR2413},
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{"2414", AR5K_VERSION_VER, AR5K_SREV_VER_AR2414},
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{"2424", AR5K_VERSION_VER, AR5K_SREV_VER_AR2424},
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{"5424", AR5K_VERSION_VER, AR5K_SREV_VER_AR5424},
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{"5413", AR5K_VERSION_VER, AR5K_SREV_VER_AR5413},
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@ -203,6 +208,7 @@ static const struct ath5k_srev_name ath5k_srev_names[] = {
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{"5112a", AR5K_VERSION_RAD, AR5K_SREV_RAD_5112A},
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{"2112", AR5K_VERSION_RAD, AR5K_SREV_RAD_2112},
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{"2112a", AR5K_VERSION_RAD, AR5K_SREV_RAD_2112A},
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{"SChip", AR5K_VERSION_RAD, AR5K_SREV_RAD_SC0},
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{"SChip", AR5K_VERSION_RAD, AR5K_SREV_RAD_SC1},
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{"SChip", AR5K_VERSION_RAD, AR5K_SREV_RAD_SC2},
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{"5133", AR5K_VERSION_RAD, AR5K_SREV_RAD_5133},
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@ -357,6 +363,9 @@ static const struct ath5k_srev_name ath5k_srev_names[] = {
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#define AR5K_EEPROM_MODES_11B(_v) AR5K_EEPROM_OFF(_v, 0x00d0, 0x00f2)
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#define AR5K_EEPROM_MODES_11G(_v) AR5K_EEPROM_OFF(_v, 0x00da, 0x010d)
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#define AR5K_EEPROM_CTL(_v) AR5K_EEPROM_OFF(_v, 0x00e4, 0x0128) /* Conformance test limits */
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#define AR5K_EEPROM_CHANNELS_5GHZ(_v) AR5K_EEPROM_OFF(_v, 0x0150, 0x0150) /* List of calibrated 5Ghz chans
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Don't have a < 3_3 eeprom so i
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just use the same offset */
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/* [3.1 - 3.3] */
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#define AR5K_EEPROM_OBDB0_2GHZ 0x00ec
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@ -443,6 +452,19 @@ enum ath5k_ant_setting {
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AR5K_ANT_MAX = 3,
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};
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/* Per channel calibration data, used for power table setup */
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struct ath5k_chan_pcal_info{
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u_int16_t freq; /* Frequency */
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/* Power levels in dbm * 4 units */
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int16_t pwr_x0[AR5K_EEPROM_N_XPD0_POINTS];
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int16_t pwr_x3[AR5K_EEPROM_N_XPD3_POINTS];
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/* PCDAC tables in dbm * 2 units */
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u_int16_t pcdac_x0[AR5K_EEPROM_N_XPD0_POINTS];
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u_int16_t pcdac_x3[AR5K_EEPROM_N_XPD3_POINTS];
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/* Max available power */
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u_int16_t max_pwr;
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};
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/* Struct to hold EEPROM calibration data */
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struct ath5k_eeprom_info {
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@ -486,10 +508,15 @@ struct ath5k_eeprom_info {
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u_int16_t ee_i_gain[AR5K_EEPROM_N_MODES];
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u_int16_t ee_margin_tx_rx[AR5K_EEPROM_N_MODES];
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/* Unused */
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/* Power calibration data */
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u_int16_t ee_false_detect[AR5K_EEPROM_N_MODES];
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u_int16_t ee_cal_pier[AR5K_EEPROM_N_MODES][AR5K_EEPROM_N_2GHZ_CHAN];
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u_int16_t ee_channel[AR5K_EEPROM_N_MODES][AR5K_EEPROM_MAX_CHAN]; /*empty*/
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u_int16_t ee_cal_piers_a;
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struct ath5k_chan_pcal_info ee_pwr_cal_a[AR5K_EEPROM_N_5GHZ_CHAN];
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u_int16_t ee_cal_piers_b;
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struct ath5k_chan_pcal_info ee_pwr_cal_b[AR5K_EEPROM_N_2GHZ_CHAN];
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u_int16_t ee_cal_piers_g;
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struct ath5k_chan_pcal_info ee_pwr_cal_g[AR5K_EEPROM_N_2GHZ_CHAN];
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/* TODO: Per rate target power levels */
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/* Conformance test limits (Unused) */
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u_int16_t ee_ctls;
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@ -886,6 +913,87 @@ static int ath5k_eeprom_read_modes(void *mem,
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return 0;
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}
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/*
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* Read per channel calibration info from eeprom
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* This doesn't work on 2413+ chips (eeprom versions >= 5),
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* i only tested it on 5213 + 5112. This is still work in progress...
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*/
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static int ath5k_eeprom_read_pcal_info(void *mem,
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u_int8_t mac_version,
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struct ath5k_eeprom_info *ee,
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u_int32_t *offset,
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unsigned int mode)
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{
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u_int32_t o = *offset;
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unsigned int i,c;
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int ret;
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u_int16_t val;
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struct ath5k_chan_pcal_info* chan_pcal_info;
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u_int16_t cal_piers;
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switch(mode){
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case AR5K_EEPROM_MODE_11A:
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chan_pcal_info = ee->ee_pwr_cal_a;
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cal_piers = ee->ee_cal_piers_a;
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break;
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case AR5K_EEPROM_MODE_11B:
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chan_pcal_info = ee->ee_pwr_cal_b;
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cal_piers = ee->ee_cal_piers_b;
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break;
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case AR5K_EEPROM_MODE_11G:
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chan_pcal_info = ee->ee_pwr_cal_g;
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cal_piers = ee->ee_cal_piers_g;
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break;
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default:
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return -EINVAL;
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}
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for(i = 0; i < cal_piers; i++){
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/* Power values in dbm * 4 */
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for( c = 0; c < AR5K_EEPROM_N_XPD0_POINTS; c++){
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AR5K_EEPROM_READ(o++, val);
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chan_pcal_info[i].pwr_x0[c] = (val & 0xff);
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chan_pcal_info[i].pwr_x0[++c] = ((val >> 8) & 0xff);
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}
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/* Pcdac steps (dbm * 2) */
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AR5K_EEPROM_READ(o++, val);
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chan_pcal_info[i].pcdac_x0[1] = (val & 0x1f);
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chan_pcal_info[i].pcdac_x0[2] = ((val >> 5) & 0x1f);
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chan_pcal_info[i].pcdac_x0[3] = ((val >> 10) & 0x1f);
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/* No idea what these power levels are for (4 xpds ?)
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I got zeroes on my card and the eeprom info
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dumps we found on the net also have weird values */
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AR5K_EEPROM_READ(o++, val);
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chan_pcal_info[i].pwr_x3[0] = (val & 0xff);
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chan_pcal_info[i].pwr_x3[1] = ((val >> 8) & 0xff);
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AR5K_EEPROM_READ(o++, val);
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chan_pcal_info[i].pwr_x3[2] = (val & 0xff);
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/* It's weird but they puted it here, that's the
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pcdac starting step */
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chan_pcal_info[i].pcdac_x0[0] = ((val >> 8) & 0xff);
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/* Static values seen on eeprom info dumps */
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chan_pcal_info[i].pcdac_x3[0] = 20;
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chan_pcal_info[i].pcdac_x3[1] = 35;
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chan_pcal_info[i].pcdac_x3[2] = 63;
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/* Last xpd0 power level is also channel maximum */
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chan_pcal_info[i].max_pwr = chan_pcal_info[i].pwr_x0[3];
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/* Recreate pcdac_x0 table for this channel using pcdac steps */
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chan_pcal_info[i].pcdac_x0[1] += chan_pcal_info[i].pcdac_x0[0];
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chan_pcal_info[i].pcdac_x0[2] += chan_pcal_info[i].pcdac_x0[1];
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chan_pcal_info[i].pcdac_x0[3] += chan_pcal_info[i].pcdac_x0[2];
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}
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return 0;
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}
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/*
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* Initialize eeprom & capabilities structs
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*/
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@ -953,12 +1061,22 @@ static int ath5k_eeprom_init(void *mem,
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* Get conformance test limit values
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*/
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offset = AR5K_EEPROM_CTL(ee->ee_version);
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ee->ee_ctls = AR5K_EEPROM_N_CTLS(ee->ee_version);
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ee->ee_ctls = 0;
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for (i = 0; i < ee->ee_ctls; i++) {
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for (i = 0; i < AR5K_EEPROM_N_CTLS(ee->ee_version); i++) {
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AR5K_EEPROM_READ(offset++, val);
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if(((val >> 8) & 0xff) == 0)
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break;
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ee->ee_ctl[i] = (val >> 8) & 0xff;
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ee->ee_ctls ++;
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if((val & 0xff) == 0)
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break;
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ee->ee_ctl[i + 1] = val & 0xff;
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ee->ee_ctls ++;
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}
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/*
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@ -1019,14 +1137,22 @@ static int ath5k_eeprom_init(void *mem,
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if (ee->ee_version >= AR5K_EEPROM_VERSION_4_0) {
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AR5K_EEPROM_READ(offset++, val);
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ee->ee_cal_pier[mode][0] =
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ee->ee_cal_piers_b = 0;
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ee->ee_pwr_cal_b[0].freq =
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ath5k_eeprom_bin2freq(ee, val & 0xff, mode);
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ee->ee_cal_pier[mode][1] =
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ee->ee_cal_piers_b ++;
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ee->ee_pwr_cal_b[1].freq =
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ath5k_eeprom_bin2freq(ee, (val >> 8) & 0xff, mode);
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ee->ee_cal_piers_b ++;
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AR5K_EEPROM_READ(offset++, val);
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ee->ee_cal_pier[mode][2] =
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ee->ee_pwr_cal_b[2].freq =
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ath5k_eeprom_bin2freq(ee, val & 0xff, mode);
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ee->ee_cal_piers_b ++;
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}
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if (ee->ee_version >= AR5K_EEPROM_VERSION_4_1)
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@ -1053,18 +1179,25 @@ static int ath5k_eeprom_init(void *mem,
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if (ee->ee_version >= AR5K_EEPROM_VERSION_4_0) {
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AR5K_EEPROM_READ(offset++, val);
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ee->ee_cal_pier[mode][0] =
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ee->ee_cal_piers_g = 0;
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ee->ee_pwr_cal_g[0].freq =
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ath5k_eeprom_bin2freq(ee, val & 0xff, mode);
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ee->ee_cal_pier[mode][1] =
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ee->ee_cal_piers_g ++;
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ee->ee_pwr_cal_g[1].freq =
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ath5k_eeprom_bin2freq(ee, (val >> 8) & 0xff, mode);
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ee->ee_cal_piers_g ++;
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AR5K_EEPROM_READ(offset++, val);
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ee->ee_turbo_max_power[mode] = val & 0x7f;
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ee->ee_xr_power[mode] = (val >> 7) & 0x3f;
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AR5K_EEPROM_READ(offset++, val);
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ee->ee_cal_pier[mode][2] =
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ee->ee_pwr_cal_g[2].freq =
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ath5k_eeprom_bin2freq(ee, val & 0xff, mode);
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ee->ee_cal_piers_g ++;
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if (ee->ee_version >= AR5K_EEPROM_VERSION_4_1)
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ee->ee_margin_tx_rx[mode] = (val >> 8) & 0x3f;
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@ -1082,6 +1215,41 @@ static int ath5k_eeprom_init(void *mem,
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/*
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* Read 5GHz EEPROM channels
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*/
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offset = AR5K_EEPROM_CHANNELS_5GHZ(ee->ee_version);
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ee->ee_cal_piers_a = 0;
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for ( i = 0; i < AR5K_EEPROM_N_5GHZ_CHAN; i++){
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AR5K_EEPROM_READ(offset++, val);
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if((val & 0xff) == 0)
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break;
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ee->ee_pwr_cal_a[i].freq =
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ath5k_eeprom_bin2freq(ee, val & 0xff, AR5K_EEPROM_MODE_11A);
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ee->ee_cal_piers_a ++;
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if(((val >> 8) & 0xff) == 0)
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break;
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ee->ee_pwr_cal_a[++i].freq =
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ath5k_eeprom_bin2freq(ee, (val >> 8) & 0xff, AR5K_EEPROM_MODE_11A);
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ee->ee_cal_piers_a ++;
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}
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mode = AR5K_EEPROM_MODE_11A;
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ret = ath5k_eeprom_read_pcal_info(mem, mac_version, ee, &offset, mode);
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if (ret)
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return ret;
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mode = AR5K_EEPROM_MODE_11B;
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ret = ath5k_eeprom_read_pcal_info(mem, mac_version, ee, &offset, mode);
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if (ret)
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return ret;
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mode = AR5K_EEPROM_MODE_11G;
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ret = ath5k_eeprom_read_pcal_info(mem, mac_version, ee, &offset, mode);
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if (ret)
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return ret;
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return 0;
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}
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@ -1296,6 +1464,177 @@ static void usage(const char *n)
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"unlawful radio transmissions!\n\n");
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}
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void dump_capabilities(struct ath5k_eeprom_info *ee){
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u_int8_t has_a, has_b, has_g, has_rfkill, turbog_dis, turboa_dis;
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u_int8_t xr2_dis, xr5_dis, has_crystal;
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has_a = AR5K_EEPROM_HDR_11A(ee->ee_header);
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has_b = AR5K_EEPROM_HDR_11B(ee->ee_header);
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has_g = AR5K_EEPROM_HDR_11G(ee->ee_header);
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has_rfkill = AR5K_EEPROM_HDR_RFKILL(ee->ee_header);
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has_crystal = AR5K_EEPROM_HAS32KHZCRYSTAL(ee->ee_misc1);
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turbog_dis = AR5K_EEPROM_HDR_T_2GHZ_DIS(ee->ee_header);
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turboa_dis = AR5K_EEPROM_HDR_T_5GHZ_DIS(ee->ee_header);
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xr2_dis = AR5K_EEPROM_HDR_XR2_DIS(ee->ee_misc0);
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xr5_dis = AR5K_EEPROM_HDR_XR5_DIS(ee->ee_misc0);
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printf("-================= Capabilities ================-\n");
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printf("| 802.11a Support: ");
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if (has_a)
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printf(" yes |");
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else
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printf(" no |");
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printf(" Turboa disabled: ");
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if (turboa_dis)
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printf(" yes |\n");
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else
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printf(" no |\n");
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printf("| 802.11b Support: ");
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if (has_b)
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printf(" yes |");
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else
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printf(" no |");
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printf(" Turbog disabled: ");
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if (turbog_dis)
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printf(" yes |\n");
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else
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printf(" no |\n");
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printf("| 802.11g Support: ");
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if (has_g)
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printf(" yes |");
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else
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printf(" no |");
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printf(" 2GHzXR disabled: ");
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if (xr2_dis)
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printf(" yes |\n");
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else
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printf(" no |\n");
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printf("| RFKill Support: ");
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if (has_rfkill)
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printf(" yes |");
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else
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printf(" no |");
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printf(" 5GHzXR disabled: ");
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if (xr5_dis)
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printf(" yes |\n");
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else
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printf(" no |\n");
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if (has_crystal != 2) {
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printf("| 32KHz Crystal: ");
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if (has_crystal)
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printf(" yes |");
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else
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printf(" no |");
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printf(" |\n");
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}
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printf("-===============================================-\n");
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}
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|
||||
void dump_calinfo_for_mode(int mode, struct ath5k_eeprom_info *ee){
|
||||
|
||||
int i;
|
||||
|
||||
printf("|=========================================================|\n");
|
||||
printf("| I power: 0x%02x |",ee->ee_i_cal[mode]);
|
||||
printf(" Q power: 0x%02x |\n",ee->ee_q_cal[mode]);
|
||||
printf("| Use fixed bias: 0x%02x |",ee->ee_fixed_bias[mode]);
|
||||
printf(" Max turbo power: 0x%02x |\n",ee->ee_turbo_max_power[mode]);
|
||||
printf("| Max XR power: 0x%02x |",ee->ee_xr_power[mode]);
|
||||
printf(" Switch Settling Time: 0x%02x |\n",ee->ee_switch_settling[mode]);
|
||||
printf("| Tx/Rx attenuation: 0x%02x |",ee->ee_ant_tx_rx[mode]);
|
||||
printf(" TX end to XLNA On: 0x%02x |\n",ee->ee_tx_end2xlna_enable[mode]);
|
||||
printf("| TX end to XPA Off: 0x%02x |",ee->ee_tx_end2xpa_disable[mode]);
|
||||
printf(" TX end to XPA On: 0x%02x |\n",ee->ee_tx_frm2xpa_enable[mode]);
|
||||
printf("| 62db Threshold: 0x%02x |",ee->ee_thr_62[mode]);
|
||||
printf(" XLNA gain: 0x%02x |\n",ee->ee_xlna_gain[mode]);
|
||||
printf("| XPD: 0x%02x |",ee->ee_xpd[mode]);
|
||||
printf(" XPD gain: 0x%02x |\n",ee->ee_x_gain[mode]);
|
||||
printf("| I gain: 0x%02x |",ee->ee_i_gain[mode]);
|
||||
printf(" Tx/Rx margin: 0x%02x |\n",ee->ee_margin_tx_rx[mode]);
|
||||
printf("| False detect backoff: 0x%02x |",ee->ee_false_detect[mode]);
|
||||
printf(" Noise Floor Threshold: %3d |\n",ee->ee_noise_floor_thr[mode]);
|
||||
printf("| ADC desired size: %3d |",ee->ee_adc_desired_size[mode]);
|
||||
printf(" PGA desired size: %3d |\n",ee->ee_pga_desired_size[mode]);
|
||||
printf("|=========================================================|\n");
|
||||
for(i = 0; i < AR5K_EEPROM_N_PCDAC; i++){
|
||||
printf("| Antenna control %2i: 0x%02x |",i,ee->ee_ant_control[mode][i]);
|
||||
i++;
|
||||
printf(" Antenna control %2i: 0x%02x |\n",i,ee->ee_ant_control[mode][i]);
|
||||
}
|
||||
printf("|=========================================================|\n");
|
||||
for(i = 0; i <= AR5K_EEPROM_N_OBDB; i++){
|
||||
printf("| Octave Band %i: %2i |",i,ee->ee_ob[mode][i]);
|
||||
printf(" db %i: %2i |\n",i,ee->ee_db[mode][i]);
|
||||
}
|
||||
printf("\\=========================================================/\n");
|
||||
}
|
||||
|
||||
void dump_power_calinfo_for_mode(int mode, struct ath5k_eeprom_info *ee){
|
||||
|
||||
struct ath5k_chan_pcal_info* chan_pcal_info;
|
||||
u_int16_t cal_piers;
|
||||
int i, c;
|
||||
|
||||
switch(mode){
|
||||
case AR5K_EEPROM_MODE_11A:
|
||||
chan_pcal_info = ee->ee_pwr_cal_a;
|
||||
cal_piers = ee->ee_cal_piers_a;
|
||||
break;
|
||||
case AR5K_EEPROM_MODE_11B:
|
||||
chan_pcal_info = ee->ee_pwr_cal_b;
|
||||
cal_piers = ee->ee_cal_piers_b;
|
||||
break;
|
||||
case AR5K_EEPROM_MODE_11G:
|
||||
chan_pcal_info = ee->ee_pwr_cal_g;
|
||||
cal_piers = ee->ee_cal_piers_g;
|
||||
break;
|
||||
default:
|
||||
return;
|
||||
}
|
||||
|
||||
printf("/====================Per channel power calibration=====================\\\n");
|
||||
printf("| Freq | pwr_0 | pwr_1 | pwr_2 | pwr_3 |pwrx3_0|pwrx3_1|pwrx3_2|max_pwr|\n");
|
||||
printf("| | pcdac | pcdac | pcdac | pcdac | pcdac | pcdac | pcdac | |\n");
|
||||
|
||||
for( i = 0; i < cal_piers; i++){
|
||||
printf("|======|=======|=======|=======|=======|=======|=======|=======|=======|\n");
|
||||
printf("| %4i |",chan_pcal_info[i].freq);
|
||||
for( c = 0; c < AR5K_EEPROM_N_XPD0_POINTS; c++){
|
||||
printf(" %2i.%02i |",chan_pcal_info[i].pwr_x0[c] /4,
|
||||
chan_pcal_info[i].pwr_x0[c] % 4);
|
||||
}
|
||||
for( c = 0; c < AR5K_EEPROM_N_XPD3_POINTS; c++){
|
||||
printf(" %2i.%02i |",chan_pcal_info[i].pwr_x3[c] /4,
|
||||
chan_pcal_info[i].pwr_x3[c] % 4);
|
||||
}
|
||||
printf(" %2i.%02i |\n",chan_pcal_info[i].max_pwr /4,
|
||||
chan_pcal_info[i].max_pwr % 4);
|
||||
|
||||
printf("| |");
|
||||
for( c = 0; c < AR5K_EEPROM_N_XPD0_POINTS; c++){
|
||||
printf(" [%02i] |",chan_pcal_info[i].pcdac_x0[c]);
|
||||
}
|
||||
for( c = 0; c < AR5K_EEPROM_N_XPD3_POINTS; c++){
|
||||
printf(" [%02i] |",chan_pcal_info[i].pcdac_x3[c]);
|
||||
}
|
||||
printf(" |\n");
|
||||
|
||||
}
|
||||
printf("\\======================================================================/\n");
|
||||
}
|
||||
|
||||
u_int32_t extend_tu(u_int32_t base_tu, u_int32_t val, u_int32_t mask)
|
||||
{
|
||||
u_int32_t result;
|
||||
|
|
@ -1508,124 +1847,6 @@ void sta_id0_id1_dump(void *mem)
|
|||
sta_id1 & AR5K_STA_ID1_NO_KEYSRCH ? 1 : 0);
|
||||
}
|
||||
|
||||
void dump_capabilities(struct ath5k_eeprom_info *ee){
|
||||
|
||||
u_int8_t has_a, has_b, has_g, has_rfkill, turbog_dis, turboa_dis;
|
||||
u_int8_t xr2_dis, xr5_dis, has_crystal;
|
||||
|
||||
has_a = AR5K_EEPROM_HDR_11A(ee->ee_header);
|
||||
has_b = AR5K_EEPROM_HDR_11B(ee->ee_header);
|
||||
has_g = AR5K_EEPROM_HDR_11G(ee->ee_header);
|
||||
has_rfkill = AR5K_EEPROM_HDR_RFKILL(ee->ee_header);
|
||||
has_crystal = AR5K_EEPROM_HAS32KHZCRYSTAL(ee->ee_misc1);
|
||||
turbog_dis = AR5K_EEPROM_HDR_T_2GHZ_DIS(ee->ee_header);
|
||||
turboa_dis = AR5K_EEPROM_HDR_T_5GHZ_DIS(ee->ee_header);
|
||||
xr2_dis = AR5K_EEPROM_HDR_XR2_DIS(ee->ee_misc0);
|
||||
xr5_dis = AR5K_EEPROM_HDR_XR5_DIS(ee->ee_misc0);
|
||||
|
||||
printf("-================= Capabilities ================-\n");
|
||||
|
||||
printf("| 802.11a Support: ");
|
||||
if (has_a)
|
||||
printf(" yes |");
|
||||
else
|
||||
printf(" no |");
|
||||
|
||||
printf(" Turboa disabled: ");
|
||||
if (turboa_dis)
|
||||
printf(" yes |\n");
|
||||
else
|
||||
printf(" no |\n");
|
||||
|
||||
printf("| 802.11b Support: ");
|
||||
if (has_b)
|
||||
printf(" yes |");
|
||||
else
|
||||
printf(" no |");
|
||||
|
||||
printf(" Turbog disabled: ");
|
||||
if (turbog_dis)
|
||||
printf(" yes |\n");
|
||||
else
|
||||
printf(" no |\n");
|
||||
|
||||
printf("| 802.11g Support: ");
|
||||
if (has_g)
|
||||
printf(" yes |");
|
||||
else
|
||||
printf(" no |");
|
||||
|
||||
printf(" 2GHzXR disabled: ");
|
||||
if (xr2_dis)
|
||||
printf(" yes |\n");
|
||||
else
|
||||
printf(" no |\n");
|
||||
|
||||
printf("| RFKill Support: ");
|
||||
if (has_rfkill)
|
||||
printf(" yes |");
|
||||
else
|
||||
printf(" no |");
|
||||
|
||||
printf(" 5GHzXR disabled: ");
|
||||
if (xr5_dis)
|
||||
printf(" yes |\n");
|
||||
else
|
||||
printf(" no |\n");
|
||||
|
||||
if (has_crystal != 2) {
|
||||
printf("| 32KHz Crystal: ");
|
||||
if (has_crystal)
|
||||
printf(" yes |");
|
||||
else
|
||||
printf(" no |");
|
||||
|
||||
printf(" |\n");
|
||||
}
|
||||
|
||||
printf("-===============================================-\n");
|
||||
}
|
||||
|
||||
void dump_calinfo_for_mode(int mode, struct ath5k_eeprom_info *ee){
|
||||
|
||||
int i;
|
||||
|
||||
printf("|=========================================================|\n");
|
||||
printf("| I power: 0x%02x |",ee->ee_i_cal[mode]);
|
||||
printf(" Q power: 0x%02x |\n",ee->ee_q_cal[mode]);
|
||||
printf("| Use fixed bias: 0x%02x |",ee->ee_fixed_bias[mode]);
|
||||
printf(" Max turbo power: 0x%02x |\n",ee->ee_turbo_max_power[mode]);
|
||||
printf("| Max XR power: 0x%02x |",ee->ee_xr_power[mode]);
|
||||
printf(" Switch Settling Time: 0x%02x |\n",ee->ee_switch_settling[mode]);
|
||||
printf("| Tx/Rx attenuation: 0x%02x |",ee->ee_ant_tx_rx[mode]);
|
||||
printf(" TX end to XLNA On: 0x%02x |\n",ee->ee_tx_end2xlna_enable[mode]);
|
||||
printf("| TX end to XPA Off: 0x%02x |",ee->ee_tx_end2xpa_disable[mode]);
|
||||
printf(" TX end to XPA On: 0x%02x |\n",ee->ee_tx_frm2xpa_enable[mode]);
|
||||
printf("| 62db Threshold: 0x%02x |",ee->ee_thr_62[mode]);
|
||||
printf(" XLNA gain: 0x%02x |\n",ee->ee_xlna_gain[mode]);
|
||||
printf("| XPD: 0x%02x |",ee->ee_xpd[mode]);
|
||||
printf(" XPD gain: 0x%02x |\n",ee->ee_x_gain[mode]);
|
||||
printf("| I gain: 0x%02x |",ee->ee_i_gain[mode]);
|
||||
printf(" Tx/Rx margin: 0x%02x |\n",ee->ee_margin_tx_rx[mode]);
|
||||
printf("| False detect backoff: 0x%02x |",ee->ee_false_detect[mode]);
|
||||
printf(" Noise Floor Threshold: %3d |\n",ee->ee_noise_floor_thr[mode]);
|
||||
printf("| ADC desired size: %3d |",ee->ee_adc_desired_size[mode]);
|
||||
printf(" PGA desired size: %3d |\n",ee->ee_pga_desired_size[mode]);
|
||||
printf("|=========================================================|\n");
|
||||
for(i = 0; i < AR5K_EEPROM_N_PCDAC; i++){
|
||||
printf("| Antenna control %2i: 0x%02x |",i,ee->ee_ant_control[mode][i]);
|
||||
i++;
|
||||
printf(" Antenna control %2i: 0x%02x |\n",i,ee->ee_ant_control[mode][i]);
|
||||
}
|
||||
printf("|=========================================================|\n");
|
||||
for(i = 0; i <= AR5K_EEPROM_N_OBDB; i++){
|
||||
printf("| Octave Band %i: %2i |",i,ee->ee_ob[mode][i]);
|
||||
printf(" db %i: %2i |\n",i,ee->ee_db[mode][i]);
|
||||
}
|
||||
printf("\\=========================================================/\n");
|
||||
}
|
||||
|
||||
|
||||
int main(int argc, char *argv[])
|
||||
{
|
||||
unsigned long long dev_addr;
|
||||
|
|
@ -1639,12 +1860,12 @@ int main(int argc, char *argv[])
|
|||
int i, anr = 1;
|
||||
int do_write = 0; /* default: read only */
|
||||
int do_dump = 0;
|
||||
int timer_count = 1;
|
||||
int do_keycache_dump = 0;
|
||||
int keycache_copy_idx = 0;
|
||||
int reg_read = 0;
|
||||
int reg_write = 0;
|
||||
unsigned int reg_write_val = 0;
|
||||
int timer_count = 1;
|
||||
int do_keycache_dump = 0;
|
||||
int keycache_copy_idx = 0;
|
||||
|
||||
struct {
|
||||
int valid;
|
||||
|
|
@ -1699,14 +1920,6 @@ int main(int argc, char *argv[])
|
|||
do_dump = 1;
|
||||
break;
|
||||
|
||||
case 'k':
|
||||
do_keycache_dump = 1;
|
||||
break;
|
||||
|
||||
case 'K':
|
||||
keycache_copy_idx = atoi(argv[++anr]);
|
||||
break;
|
||||
|
||||
case 'R':
|
||||
anr++;
|
||||
reg_read = strtoul(argv[anr], NULL, 16);
|
||||
|
|
@ -1718,6 +1931,14 @@ int main(int argc, char *argv[])
|
|||
reg_write_val = strtoul(argv[anr], NULL, 16);
|
||||
break;
|
||||
|
||||
case 'k':
|
||||
do_keycache_dump = 1;
|
||||
break;
|
||||
|
||||
case 'K':
|
||||
keycache_copy_idx = atoi(argv[++anr]);
|
||||
break;
|
||||
|
||||
case 'h':
|
||||
usage(argv[0]);
|
||||
return 0;
|
||||
|
|
@ -1895,6 +2116,7 @@ int main(int argc, char *argv[])
|
|||
printf("/=========================================================\\\n");
|
||||
printf("| Calibration data for 802.11a operation |\n");
|
||||
dump_calinfo_for_mode(AR5K_EEPROM_MODE_11A,ee);
|
||||
dump_power_calinfo_for_mode(AR5K_EEPROM_MODE_11A,ee);
|
||||
printf("\n");
|
||||
}
|
||||
|
||||
|
|
@ -1902,6 +2124,7 @@ int main(int argc, char *argv[])
|
|||
printf("/=========================================================\\\n");
|
||||
printf("| Calibration data for 802.11b operation |\n");
|
||||
dump_calinfo_for_mode(AR5K_EEPROM_MODE_11B,ee);
|
||||
dump_power_calinfo_for_mode(AR5K_EEPROM_MODE_11B,ee);
|
||||
printf("\n");
|
||||
}
|
||||
|
||||
|
|
@ -1909,6 +2132,7 @@ int main(int argc, char *argv[])
|
|||
printf("/=========================================================\\\n");
|
||||
printf("| Calibration data for 802.11g operation |\n");
|
||||
dump_calinfo_for_mode(AR5K_EEPROM_MODE_11G,ee);
|
||||
dump_power_calinfo_for_mode(AR5K_EEPROM_MODE_11G,ee);
|
||||
printf("\n");
|
||||
}
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue