mirror of
https://github.com/proski/madwifi
synced 2024-11-28 17:23:11 +03:00
Big cleanup of tools/ath_info.c
Reformat with madwifi-indent, it was needed badly. Break some long lines. Avoid complex structure initializers that GNU indent cannot format. Avoid using macro for the names table. Remove spaces in the names, add then with formatted output. Remove spaces before punctuation signs. Fix all sparse warnings. Default to base 16 for all numbers specified on the command line. git-svn-id: http://madwifi-project.org/svn/madwifi/trunk@2816 0192ed92-7a03-0410-a25b-9323aeb14dbd
This commit is contained in:
proski
parent
120d309bc3
commit
25418eaa48
216
tools/ath_info.c
216
tools/ath_info.c
@ -16,7 +16,6 @@
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/* So here is how it works:
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*
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* First compile...
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@ -90,7 +89,6 @@
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*
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*/
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#include <stdio.h>
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#include <stdlib.h>
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#include <unistd.h>
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@ -99,9 +97,14 @@
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#include <fcntl.h>
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#include <sys/mman.h>
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#define dbg(fmt , __args__...) do { if (verbose) printf("#DBG %s: " fmt "\n", __FUNCTION__, ##__args__ ); } while (0)
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#define dbg(fmt, __args__...) \
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do { \
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if (verbose) \
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printf("#DBG %s: " fmt "\n", __FUNCTION__, ##__args__); \
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} while (0)
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#define err(fmt , __args__...) fprintf(stderr, "#ERR %s: " fmt "\n", __FUNCTION__, ##__args__ )
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#define err(fmt, __args__...) \
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fprintf(stderr, "#ERR %s: " fmt "\n", __FUNCTION__, ##__args__)
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#define AR5K_PCI_MEM_SIZE 0x10000
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#define AR5K_ELEMENTS(_array) (sizeof(_array) / sizeof(_array[0]))
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@ -113,12 +116,12 @@
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#define AR5K_GPIOCR_INT_SEL(n) ((n) << 12) /* Interrupt for GPIO pin n */
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/*
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* "General Purpose Input/Output" (GPIO) data output register
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* GPIO (General Purpose Input/Output) data output register
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*/
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#define AR5K_GPIODO 0x4018
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/*
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* "General Purpose Input/Output" (GPIO) data input register
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* GPIO (General Purpose Input/Output) data input register
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*/
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#define AR5K_GPIODI 0x401c
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@ -137,35 +140,6 @@ struct ath5k_srev_name {
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u_int sr_val;
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};
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#define AR5K_SREV_NAME { \
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{ "5210 ", AR5K_VERSION_VER, AR5K_SREV_VER_AR5210 }, \
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{ "5311 ", AR5K_VERSION_VER, AR5K_SREV_VER_AR5311 }, \
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{ "5311A", AR5K_VERSION_VER, AR5K_SREV_VER_AR5311A },\
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{ "5311B", AR5K_VERSION_VER, AR5K_SREV_VER_AR5311B },\
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{ "5211 ", AR5K_VERSION_VER, AR5K_SREV_VER_AR5211 }, \
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{ "5212 ", AR5K_VERSION_VER, AR5K_SREV_VER_AR5212 }, \
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{ "5213 ", AR5K_VERSION_VER, AR5K_SREV_VER_AR5213 }, \
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{ "5213A", AR5K_VERSION_VER, AR5K_SREV_VER_AR5213A },\
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{ "2424 ", AR5K_VERSION_VER, AR5K_SREV_VER_AR2424 }, \
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{ "5424 ", AR5K_VERSION_VER, AR5K_SREV_VER_AR5424 }, \
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{ "5413 ", AR5K_VERSION_VER, AR5K_SREV_VER_AR5413 }, \
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{ "5414 ", AR5K_VERSION_VER, AR5K_SREV_VER_AR5414 }, \
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{ "5416 ", AR5K_VERSION_VER, AR5K_SREV_VER_AR5416 }, \
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{ "5418 ", AR5K_VERSION_VER, AR5K_SREV_VER_AR5418 }, \
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{ "2425 ", AR5K_VERSION_VER, AR5K_SREV_VER_AR2425 }, \
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{ "xxxxx", AR5K_VERSION_VER, AR5K_SREV_UNKNOWN }, \
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{ "5110 ", AR5K_VERSION_RAD, AR5K_SREV_RAD_5110 }, \
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{ "5111 ", AR5K_VERSION_RAD, AR5K_SREV_RAD_5111 }, \
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{ "2111 ", AR5K_VERSION_RAD, AR5K_SREV_RAD_2111 }, \
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{ "5112 ", AR5K_VERSION_RAD, AR5K_SREV_RAD_5112 }, \
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{ "5112a", AR5K_VERSION_RAD, AR5K_SREV_RAD_5112A }, \
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{ "2112 ", AR5K_VERSION_RAD, AR5K_SREV_RAD_2112 }, \
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{ "2112a", AR5K_VERSION_RAD, AR5K_SREV_RAD_2112A }, \
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{ "SChip", AR5K_VERSION_RAD, AR5K_SREV_RAD_SC1 }, \
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{ "SChip", AR5K_VERSION_RAD, AR5K_SREV_RAD_SC2 }, \
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{ "5133", AR5K_VERSION_RAD, AR5K_SREV_RAD_5133 }, \
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{ "xxxxx", AR5K_VERSION_RAD, AR5K_SREV_UNKNOWN }, \
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}
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#define AR5K_SREV_UNKNOWN 0xffff
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/* Known MAC revision numbers */
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@ -198,6 +172,36 @@ struct ath5k_srev_name {
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#define AR5K_SREV_RAD_SC2 0xa2 /* Found on 2424/5424 */
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#define AR5K_SREV_RAD_5133 0xc0 /* MIMO found on 5418 */
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static const struct ath5k_srev_name ath5k_srev_names[] = {
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{"5210", AR5K_VERSION_VER, AR5K_SREV_VER_AR5210},
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{"5311", AR5K_VERSION_VER, AR5K_SREV_VER_AR5311},
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{"5311A", AR5K_VERSION_VER, AR5K_SREV_VER_AR5311A},
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{"5311B", AR5K_VERSION_VER, AR5K_SREV_VER_AR5311B},
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{"5211", AR5K_VERSION_VER, AR5K_SREV_VER_AR5211},
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{"5212", AR5K_VERSION_VER, AR5K_SREV_VER_AR5212},
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{"5213", AR5K_VERSION_VER, AR5K_SREV_VER_AR5213},
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{"5213A", AR5K_VERSION_VER, AR5K_SREV_VER_AR5213A},
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{"2424", AR5K_VERSION_VER, AR5K_SREV_VER_AR2424},
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{"5424", AR5K_VERSION_VER, AR5K_SREV_VER_AR5424},
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{"5413", AR5K_VERSION_VER, AR5K_SREV_VER_AR5413},
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{"5414", AR5K_VERSION_VER, AR5K_SREV_VER_AR5414},
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{"5416", AR5K_VERSION_VER, AR5K_SREV_VER_AR5416},
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{"5418", AR5K_VERSION_VER, AR5K_SREV_VER_AR5418},
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{"2425", AR5K_VERSION_VER, AR5K_SREV_VER_AR2425},
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{"xxxxx", AR5K_VERSION_VER, AR5K_SREV_UNKNOWN},
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{"5110", AR5K_VERSION_RAD, AR5K_SREV_RAD_5110},
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{"5111", AR5K_VERSION_RAD, AR5K_SREV_RAD_5111},
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{"2111", AR5K_VERSION_RAD, AR5K_SREV_RAD_2111},
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{"5112", AR5K_VERSION_RAD, AR5K_SREV_RAD_5112},
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{"5112a", AR5K_VERSION_RAD, AR5K_SREV_RAD_5112A},
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{"2112", AR5K_VERSION_RAD, AR5K_SREV_RAD_2112},
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{"2112a", AR5K_VERSION_RAD, AR5K_SREV_RAD_2112A},
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{"SChip", AR5K_VERSION_RAD, AR5K_SREV_RAD_SC1},
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{"SChip", AR5K_VERSION_RAD, AR5K_SREV_RAD_SC2},
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{"5133", AR5K_VERSION_RAD, AR5K_SREV_RAD_5133},
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{"xxxxx", AR5K_VERSION_RAD, AR5K_SREV_UNKNOWN},
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};
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/*
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* Silicon revision register
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*/
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@ -241,7 +245,7 @@ struct ath5k_srev_name {
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#define AR5K_SLEEP_CTL_SLE_WAKE 0x00000000 /* Force chip awake */
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#define AR5K_SLEEP_CTL_SLE_SLP 0x00010000 /* Force chip sleep */
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#define AR5K_SLEEP_CTL_SLE_ALLOW 0x00020000
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#define AR5K_SLEEP_CTL_SLE_UNITS 0x00000008 /*non 5210*/
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#define AR5K_SLEEP_CTL_SLE_UNITS 0x00000008 /* not on 5210 */
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#define AR5K_PCICFG 0x4010 /* Register Address */
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#define AR5K_PCICFG_EEAE 0x00000001 /* Eeprom access enable [5210] */
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@ -346,21 +350,22 @@ struct ath5k_srev_name {
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#define AR5K_TUNE_REGISTER_TIMEOUT 20000
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/* names for eeprom fields */
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static const struct {
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struct eeprom_entry {
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const char *name;
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int addr;
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} eeprom_addr[] = {
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};
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static const struct eeprom_entry eeprom_addr[] = {
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{"pci_dev_id", 0},
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{"pci_vendor_id", 1},
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{"pci_class", 2},
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{"pci_rev_id", 3},
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{"pci_subsys_dev_id", 7},
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{"pci_subsys_vendor_id", 8},
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{"regdomain", AR5K_EEPROM_REG_DOMAIN},
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};
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static const int eeprom_addr_len = sizeof(eeprom_addr) / sizeof(eeprom_addr[0]);
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static int force_write = 0;
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@ -369,9 +374,7 @@ static int verbose=0;
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/* forward decl. */
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static void usage(const char *n);
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static u_int32_t
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ath5k_hw_bitswap(u_int32_t val, u_int bits)
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static u_int32_t ath5k_hw_bitswap(u_int32_t val, u_int bits)
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{
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u_int32_t retval = 0, bit, i;
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@ -386,7 +389,7 @@ ath5k_hw_bitswap(u_int32_t val, u_int bits)
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/*
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* Get the PHY Chip revision
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*/
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u_int16_t
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static u_int16_t
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ath5k_hw_radio_revision(u_int16_t mac_version, void *mem, u_int8_t chip)
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{
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int i;
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@ -435,7 +438,7 @@ ath5k_hw_radio_revision(u_int16_t mac_version, void *mem, u_int8_t chip)
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/*
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* Write to EEPROM
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*/
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int
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static int
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ath5k_hw_eeprom_write(void *mem, u_int32_t offset, u_int16_t data,
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u_int8_t mac_version)
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{
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@ -453,7 +456,7 @@ ath5k_hw_eeprom_write(void *mem, u_int32_t offset, u_int16_t data,
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(void)AR5K_REG_WRITE(AR5K_EEPROM_BASE + (4 * offset), data);
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} else {
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/* != 5210 */
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/* not 5210 */
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/* reset eeprom access */
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AR5K_REG_WRITE(AR5K_EEPROM_CMD, AR5K_EEPROM_CMD_RESET);
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usleep(5);
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@ -472,7 +475,8 @@ ath5k_hw_eeprom_write(void *mem, u_int32_t offset, u_int16_t data,
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status = AR5K_REG_READ(AR5K_EEPROM_STATUS);
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if (status & AR5K_EEPROM_STAT_WRDONE) {
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if (status & AR5K_EEPROM_STAT_WRERR) {
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err("eeprom write access to 0x%04x failed", offset);
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err("eeprom write access to 0x%04x failed",
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offset);
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return 1;
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}
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return 0;
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@ -483,11 +487,10 @@ ath5k_hw_eeprom_write(void *mem, u_int32_t offset, u_int16_t data,
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return 1;
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}
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/*
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* Read from EEPROM
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*/
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int
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static int
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ath5k_hw_eeprom_read(void *mem, u_int32_t offset, u_int16_t *data,
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u_int8_t mac_version)
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{
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@ -501,8 +504,7 @@ ath5k_hw_eeprom_read(void *mem, u_int32_t offset, u_int16_t *data,
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(void)AR5K_REG_READ(AR5K_EEPROM_BASE + (4 * offset));
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} else {
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AR5K_REG_WRITE(AR5K_EEPROM_BASE, offset);
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AR5K_REG_ENABLE_BITS(AR5K_EEPROM_CMD,
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AR5K_EEPROM_CMD_READ);
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AR5K_REG_ENABLE_BITS(AR5K_EEPROM_CMD, AR5K_EEPROM_CMD_READ);
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}
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for (timeout = AR5K_TUNE_REGISTER_TIMEOUT; timeout > 0; timeout--) {
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@ -520,19 +522,18 @@ ath5k_hw_eeprom_read(void *mem, u_int32_t offset, u_int16_t *data,
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return 1;
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}
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const char *
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ath5k_hw_get_part_name(enum ath5k_srev_type type, u_int32_t val)
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static const char *ath5k_hw_get_part_name(enum ath5k_srev_type type,
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u_int32_t val)
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{
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struct ath5k_srev_name names[] = AR5K_SREV_NAME;
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const char *name = "xxxxx";
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int i;
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for (i = 0; i < AR5K_ELEMENTS(names); i++) {
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if (names[i].sr_type != type ||
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names[i].sr_val == AR5K_SREV_UNKNOWN)
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for (i = 0; i < AR5K_ELEMENTS(ath5k_srev_names); i++) {
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if (ath5k_srev_names[i].sr_type != type ||
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ath5k_srev_names[i].sr_val == AR5K_SREV_UNKNOWN)
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continue;
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if ((val & 0xff) < names[i + 1].sr_val) {
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name = names[i].sr_name;
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if ((val & 0xff) < ath5k_srev_names[i + 1].sr_val) {
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name = ath5k_srev_names[i].sr_name;
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break;
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}
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}
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@ -541,7 +542,7 @@ ath5k_hw_get_part_name(enum ath5k_srev_type type, u_int32_t val)
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}
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/* returns -1 on unknown name */
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int eeprom_name2addr(const char *name)
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static int eeprom_name2addr(const char *name)
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{
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int i;
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if (!name || !name[0])
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@ -553,7 +554,7 @@ int eeprom_name2addr(const char *name)
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} /* eeprom_name2addr */
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/* returns "<unknown>" on unknown address */
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const char *eeprom_addr2name(int addr)
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static const char *eeprom_addr2name(int addr)
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{
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int i;
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for (i = 0; i < eeprom_addr_len; i++)
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@ -562,9 +563,9 @@ const char *eeprom_addr2name(int addr)
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return "<unknown>";
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} /* eeprom_addr2name */
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static int
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do_write_pairs(int anr, int argc, char **argv, unsigned char *mem, int mac_version)
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do_write_pairs(int anr, int argc, char **argv, unsigned char *mem,
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int mac_version)
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{
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#define MAX_NR_WRITES 16
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struct {
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@ -596,23 +597,24 @@ do_write_pairs(int anr, int argc, char **argv, unsigned char *mem, int mac_versi
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/* get the (addr,val) pairs we have to write */
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i = 0;
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while (anr < (argc - 1)) {
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wr_ops[i].addr = strtoul(argv[anr], &end, 0);
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wr_ops[i].addr = strtoul(argv[anr], &end, 16);
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if (end == argv[anr]) {
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/* maybe a symbolic name for the address? */
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if ((wr_ops[i].addr = eeprom_name2addr(argv[anr])) == -1) {
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if ((wr_ops[i].addr =
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eeprom_name2addr(argv[anr])) == -1) {
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err("pair %d: bad address %s", i, argv[anr]);
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return 4;
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}
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}
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if (wr_ops[i].addr >= AR5K_EEPROM_INFO_BASE) {
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err("offset 0x%04x in CRC protected area is not supported",
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wr_ops[i].addr);
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err("offset 0x%04x in CRC protected area is "
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"not supported", wr_ops[i].addr);
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return 5;
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}
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anr++;
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wr_ops[i].val = strtoul(argv[anr], &end, 0);
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wr_ops[i].val = strtoul(argv[anr], &end, 16);
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if (end == argv[anr]) {
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err("pair %d: bad val %s", i, argv[anr]);
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return 5;
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@ -634,13 +636,14 @@ do_write_pairs(int anr, int argc, char **argv, unsigned char *mem, int mac_versi
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if (verbose || !force_write) {
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for (i = 0; i < wr_ops_len; i++)
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printf("%20s (0x%04x) := 0x%04x\n",
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eeprom_addr2name(wr_ops[i].addr), wr_ops[i].addr, wr_ops[i].val);
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eeprom_addr2name(wr_ops[i].addr), wr_ops[i].addr,
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wr_ops[i].val);
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}
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if (!force_write) {
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int c;
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printf(
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"WARNING: The write function may easy brick your device or\n"
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printf
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("WARNING: The write function may easy brick your device or\n"
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"violate state regulation on frequency usage.\n"
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"Proceed on your own risk!\n"
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"Shall I write the above value(s)? (y/n)\n");
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@ -654,8 +657,10 @@ do_write_pairs(int anr, int argc, char **argv, unsigned char *mem, int mac_versi
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for (i = 0; i < wr_ops_len; i++) {
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u_int16_t oldval, u;
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if (ath5k_hw_eeprom_read(mem, wr_ops[i].addr, &oldval, mac_version)) {
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err("failed to read old value from offset 0x%04x ", wr_ops[i].addr);
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if (ath5k_hw_eeprom_read
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(mem, wr_ops[i].addr, &oldval, mac_version)) {
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err("failed to read old value from offset 0x%04x ",
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wr_ops[i].addr);
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errors++;
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}
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@ -665,18 +670,22 @@ do_write_pairs(int anr, int argc, char **argv, unsigned char *mem, int mac_versi
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}
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dbg("writing *0x%04x := 0x%04x", wr_ops[i].addr, wr_ops[i].val);
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if (ath5k_hw_eeprom_write(mem, wr_ops[i].addr, wr_ops[i].val, mac_version)) {
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if (ath5k_hw_eeprom_write
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(mem, wr_ops[i].addr, wr_ops[i].val, mac_version)) {
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err("failed to write 0x%04x to offset 0x%04x",
|
||||
wr_ops[i].val, wr_ops[i].addr);
|
||||
errors++;
|
||||
} else {
|
||||
if (ath5k_hw_eeprom_read(mem, wr_ops[i].addr, &u, mac_version)) {
|
||||
err("failed to read offset 0x%04x for verification", wr_ops[i].addr);
|
||||
if (ath5k_hw_eeprom_read
|
||||
(mem, wr_ops[i].addr, &u, mac_version)) {
|
||||
err("failed to read offset 0x%04x for "
|
||||
"verification", wr_ops[i].addr);
|
||||
errors++;
|
||||
} else {
|
||||
if (u != wr_ops[i].val) {
|
||||
err("offset 0x%04x: wrote 0x%04x but read 0x%04x",
|
||||
wr_ops[i].addr, wr_ops[i].val, u);
|
||||
err("offset 0x%04x: wrote 0x%04x but "
|
||||
"read 0x%04x", wr_ops[i].addr,
|
||||
wr_ops[i].val, u);
|
||||
errors++;
|
||||
}
|
||||
}
|
||||
@ -686,8 +695,7 @@ do_write_pairs(int anr, int argc, char **argv, unsigned char *mem, int mac_versi
|
||||
return errors ? 11 : 0;
|
||||
} /* do_write_pairs */
|
||||
|
||||
static void
|
||||
usage(const char *n)
|
||||
static void usage(const char *n)
|
||||
{
|
||||
int i;
|
||||
|
||||
@ -722,8 +730,7 @@ usage(const char *n)
|
||||
"unlawful radio transmissions!\n\n");
|
||||
}
|
||||
|
||||
int
|
||||
main(int argc, char *argv[])
|
||||
int main(int argc, char *argv[])
|
||||
{
|
||||
u_int32_t dev_addr;
|
||||
u_int16_t eeprom_header, srev, phy_rev_5ghz, phy_rev_2ghz;
|
||||
@ -745,7 +752,6 @@ main(int argc, char *argv[])
|
||||
for (i = 0; i < sizeof(gpio_set) / sizeof(gpio_set[0]); i++)
|
||||
gpio_set[i].valid = 0;
|
||||
|
||||
|
||||
if (argc < 2) {
|
||||
usage(argv[0]);
|
||||
return -1;
|
||||
@ -800,7 +806,7 @@ main(int argc, char *argv[])
|
||||
return 3;
|
||||
}
|
||||
|
||||
dev_addr = strtoul(argv[anr], NULL, 0);
|
||||
dev_addr = strtoul(argv[anr], NULL, 16);
|
||||
|
||||
fd = open("/dev/mem", O_RDWR);
|
||||
if (fd < 0) {
|
||||
@ -808,12 +814,12 @@ main(int argc, char *argv[])
|
||||
return -2;
|
||||
}
|
||||
|
||||
mem = mmap(0, AR5K_PCI_MEM_SIZE, PROT_READ | PROT_WRITE,
|
||||
mem = mmap(NULL, AR5K_PCI_MEM_SIZE, PROT_READ | PROT_WRITE,
|
||||
MAP_SHARED | MAP_FILE, fd, dev_addr);
|
||||
|
||||
if (mem == MAP_FAILED) {
|
||||
printf("Mmap of device at 0x%08X for 0x%X bytes failed - "
|
||||
"%s", dev_addr, AR5K_PCI_MEM_SIZE, strerror(errno));
|
||||
"%s\n", dev_addr, AR5K_PCI_MEM_SIZE, strerror(errno));
|
||||
return -3;
|
||||
}
|
||||
|
||||
@ -914,17 +920,16 @@ main(int argc, char *argv[])
|
||||
|
||||
printf(" -==Device Information==-\n");
|
||||
|
||||
printf("MAC Version: %s(0x%x) \n",
|
||||
printf("MAC Version: %-5s (0x%02x)\n",
|
||||
ath5k_hw_get_part_name(AR5K_VERSION_VER, mac_version),
|
||||
mac_version);
|
||||
|
||||
printf("MAC Revision: %s(0x%x) \n",
|
||||
ath5k_hw_get_part_name(AR5K_VERSION_VER, srev),
|
||||
srev);
|
||||
printf("MAC Revision: %-5s (0x%02x)\n",
|
||||
ath5k_hw_get_part_name(AR5K_VERSION_VER, srev), srev);
|
||||
|
||||
/* Single-chip PHY with a/b/g support */
|
||||
if (has_b && !phy_rev_2ghz) {
|
||||
printf("PHY Revision: %s(0x%x) \n",
|
||||
printf("PHY Revision: %-5s (0x%02x)\n",
|
||||
ath5k_hw_get_part_name(AR5K_VERSION_RAD, phy_rev_5ghz),
|
||||
phy_rev_5ghz);
|
||||
phy_rev_5ghz = 0;
|
||||
@ -932,7 +937,7 @@ main(int argc, char *argv[])
|
||||
|
||||
/* Single-chip PHY with b/g support */
|
||||
if (!has_a) {
|
||||
printf("PHY Revision: %s(0x%x) \n",
|
||||
printf("PHY Revision: %-5s (0x%02x)\n",
|
||||
ath5k_hw_get_part_name(AR5K_VERSION_RAD, phy_rev_2ghz),
|
||||
phy_rev_2ghz);
|
||||
phy_rev_2ghz = 0;
|
||||
@ -940,12 +945,12 @@ main(int argc, char *argv[])
|
||||
|
||||
/* Different chip for 5Ghz and 2Ghz */
|
||||
if (phy_rev_5ghz) {
|
||||
printf("5Ghz PHY Revision: %s(0x%x) \n",
|
||||
printf("5Ghz PHY Revision: %-5s (0x%2x)\n",
|
||||
ath5k_hw_get_part_name(AR5K_VERSION_RAD, phy_rev_5ghz),
|
||||
phy_rev_5ghz);
|
||||
}
|
||||
if (phy_rev_2ghz) {
|
||||
printf("2Ghz PHY Revision: %s(0x%x) \n",
|
||||
printf("2Ghz PHY Revision: %-5s (0x%2x)\n",
|
||||
ath5k_hw_get_part_name(AR5K_VERSION_RAD, phy_rev_2ghz),
|
||||
phy_rev_2ghz);
|
||||
}
|
||||
@ -960,16 +965,13 @@ main(int argc, char *argv[])
|
||||
if (eeprom_size == 0) {
|
||||
printf(" 4K\n");
|
||||
byte_size = 4096;
|
||||
}
|
||||
else if (eeprom_size == 1) {
|
||||
} else if (eeprom_size == 1) {
|
||||
printf(" 8K\n");
|
||||
byte_size = 8192;
|
||||
}
|
||||
else if (eeprom_size == 2) {
|
||||
} else if (eeprom_size == 2) {
|
||||
printf(" 16K\n");
|
||||
byte_size = 16384;
|
||||
}
|
||||
else
|
||||
} else
|
||||
printf(" ??\n");
|
||||
|
||||
printf("Regulatory Domain: 0x%X\n", regdomain);
|
||||
@ -1015,14 +1017,16 @@ main(int argc, char *argv[])
|
||||
AR5K_REG_READ(AR5K_GPIODI));
|
||||
|
||||
if (do_dump) {
|
||||
printf("\nEEPROM dump (%d byte)\n", byte_size);
|
||||
printf("==============================================");
|
||||
u_int16_t data;
|
||||
FILE *dumpfile = fopen("ath-eeprom-dump.bin", "w");
|
||||
|
||||
printf("\nEEPROM dump (%d byte)\n", byte_size);
|
||||
printf("==============================================");
|
||||
for (i = 1; i <= (byte_size / 2); i++) {
|
||||
error = ath5k_hw_eeprom_read(mem, i, &data, mac_version);
|
||||
error =
|
||||
ath5k_hw_eeprom_read(mem, i, &data, mac_version);
|
||||
if (error) {
|
||||
printf("\nUnable to read at %04x !\n", i);
|
||||
printf("\nUnable to read at %04x\n", i);
|
||||
continue;
|
||||
}
|
||||
if (!((i - 1) % 8))
|
||||
@ -1041,7 +1045,8 @@ main(int argc, char *argv[])
|
||||
int rc;
|
||||
|
||||
if (mac_version >= AR5K_SREV_VER_AR5213 && !nr_gpio_set) {
|
||||
dbg("new MAC %x (>= AR5213) set gpio4 to low", mac_version);
|
||||
dbg("new MAC %x (>= AR5213) set gpio4 to low",
|
||||
mac_version);
|
||||
gpio_set[4].valid = 1;
|
||||
gpio_set[4].value = 0;
|
||||
}
|
||||
@ -1098,4 +1103,3 @@ main(int argc, char *argv[])
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user