mirror of
https://github.com/limine-bootloader/limine
synced 2024-12-12 17:47:19 +03:00
e1f6ac8860
* Initial aarch64 port * Enable chainload on aarch64 No changes necessary since it's all UEFI anyway. * Add specification for Limine protocol for aarch64 * PROTOCOL: Specify state of information in DT /chosen node * common: Add spinup code for aarch64 * common: Port elf and term to aarch64 * common: Port vmm to aarch64 Also prepare to drop VMM_FLAG_PRESENT on x86. * protos: Port limine boot protocol to aarch64 Also drop VMM_FLAG_PRESENT since we never unmap pages anyway. * test: Add DTB request * PROTOCOL: Port SMP request to aarch64 * cpu: Add cache maintenance functions for aarch64 * protos/limine, sys: Port SMP to aarch64 Also move common asm macros into a header file. * test: Start up APs * vmm: Unify get_next_level and implement large page splitting * protos/limine: Map framebuffer using correct caching mode on AArch64 * CI: Fix GCC build for aarch64 * entry, menu: Replace uses of naked attribute with separate asm file GCC does not understand the naked attribute on aarch64, and didn't understand it for x86 in older versions.
49 lines
810 B
C
49 lines
810 B
C
#if defined (__x86_64__) || defined (__i386__)
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#include <stddef.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <sys/pic.h>
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#include <sys/cpu.h>
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#include <lib/blib.h>
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void pic_eoi(int irq) {
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if (irq >= 8) {
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outb(0xa0, 0x20);
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}
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outb(0x20, 0x20);
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}
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// Flush all potentially pending IRQs
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void pic_flush(void) {
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for (int i = 0; i < 16; i++)
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pic_eoi(i);
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}
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void pic_set_mask(int line, bool status) {
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uint16_t port;
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uint8_t value;
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if (line < 8) {
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port = 0x21;
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} else {
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port = 0xa1;
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line -= 8;
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}
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if (!status)
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value = inb(port) & ~((uint8_t)1 << line);
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else
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value = inb(port) | ((uint8_t)1 << line);
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outb(port, value);
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}
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void pic_mask_all(void) {
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outb(0xa1, 0xff);
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outb(0x21, 0xff);
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}
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#endif
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