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https://github.com/limine-bootloader/limine
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mm/mtrr: Do not gate cr3 flush to UEFI only
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@ -87,12 +87,10 @@ void mtrr_restore(void) {
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/* then invalidate the caches */
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asm volatile ("wbinvd" ::: "memory");
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#if defined (UEFI)
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/* on UEFI, paging is enabled, so do a cr3 read/write to flush the TLB */
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/* do a cr3 read/write to flush the TLB */
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uintptr_t cr3;
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asm volatile ("mov %%cr3, %0" : "=r"(cr3) :: "memory");
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asm volatile ("mov %0, %%cr3" :: "r"(cr3) : "memory");
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#endif
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/* disable the MTRRs */
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uint64_t mtrr_def = rdmsr(0x2ff);
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@ -128,11 +126,9 @@ void mtrr_restore(void) {
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mtrr_def |= (1 << 11);
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wrmsr(0x2ff, mtrr_def);
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#if defined (UEFI)
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/* on UEFI, paging is enabled, so do a cr3 read/write to flush the TLB */
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/* do a cr3 read/write to flush the TLB */
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asm volatile ("mov %%cr3, %0" : "=r"(cr3) :: "memory");
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asm volatile ("mov %0, %%cr3" :: "r"(cr3) : "memory");
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#endif
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/* then invalidate the caches */
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asm volatile ("wbinvd" ::: "memory");
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