2020-04-24 00:36:01 +03:00
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# stivale boot protocol specification
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The stivale boot protocol aims to be a *simple* to implement protocol which
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provides the kernel with most of the features one may need in a *modern*
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2020-04-30 22:19:12 +03:00
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x86_64 context (although 32-bit x86 is also supported).
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2020-04-24 00:36:01 +03:00
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## General information
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In order to have a stivale compliant kernel, one must have a kernel executable
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in the `elf64` or `elf32` format and have a `.stivalehdr` section (described below).
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Other executable formats are not supported.
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stivale will recognise whether the ELF file is 32-bit or 64-bit and load the kernel
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into the appropriate CPU mode.
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stivale natively supports (only for 64-bit kernels) and encourages higher half kernels.
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The kernel can load itself at `0xffffffff80100000` (as defined in the linker script)
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and the bootloader will take care of everything, no AT linker script directives needed.
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If the kernel loads itself in the lower half (`0x100000` or higher), the bootloader
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will not perform the higher half relocation.
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The kernel MUST NOT overwrite anything below `0x100000` (physical memory) as that
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is where the bootloader memory structures reside.
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Once the kernel is DONE depending on the bootloader (for page tables, structures, ...)
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then these areas can be reclaimed if one wants.
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The kernel MUST NOT request to load itself at an address lower than `0x100000`
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(or `0xffffffff80100000` for higher half kernels) for the same reasons as above.
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## Kernel entry machine state
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2020-04-30 22:19:12 +03:00
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### 64-bit kernel
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2020-05-30 16:44:14 +03:00
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`rip` will be the entry point as defined in the ELF file, unless the `entry_point`
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field in the stivale header is set to a non-0 value, in which case, it is set to
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the value of `entry_point`.
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At entry, the bootloader will have setup paging such that there is a 4GiB identity
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mapped block of memory at `0x0000000000000000`, a 2GiB mapped area of memory
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that maps from `0x0000000000000000` physical to `0x0000000080000000` physical
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to `0xffffffff80000000` virtual. This area is for the higher half kernels.
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Further more, a 4GiB area of memory from `0x0000000000000000` physical to
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`0x0000000100000000` physical to `0xffff800000000000` virtual is mapped.
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2020-05-30 16:44:14 +03:00
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If the kernel is dynamic and not statically linked, the bootloader will relocate it.
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Furthermore if bit 2 of the flags field in the stivale header is set, the bootloader
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will perform kernel address space layout randomisation (KASLR).
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2020-04-24 00:36:01 +03:00
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The kernel should NOT modify the bootloader page tables, and it should only use them
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to bootstrap its own virtual memory manager and its own page tables.
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At entry all segment registers are loaded as 64 bit code/data segments, limits and
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bases are ignored since this is Long Mode.
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DO NOT reload segment registers or rely on the provided GDT. The kernel MUST load
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its own GDT as soon as possible and not rely on the bootloader's.
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The IDT is in an undefined state. Kernel must load its own.
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IF flag, VM flag, and direction flag are cleared on entry. Other flags undefined.
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PG is enabled (`cr0`), PE is enabled (`cr0`), PAE is enabled (`cr4`),
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LME is enabled (`EFER`).
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If stivale header flag bit 1 is set, then, if available, 5-level paging is enabled
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(LA57 bit in `cr4`).
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The A20 gate is enabled.
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2020-06-01 05:47:55 +03:00
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PIC/APIC IRQs are all masked.
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`rsp` is set to the requested stack as per stivale header.
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`rdi` will point to the stivale structure (described below).
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2020-07-09 04:24:54 +03:00
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All other general purpose registers are set to 0.
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2020-04-30 22:19:12 +03:00
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### 32-bit kernel
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`eip` will be the entry point as defined in the ELF file, unless the `entry_point`
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field in the stivale header is set to a non-0 value, in which case, it is set to
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the value of `entry_point`.
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At entry all segment registers are loaded as 32 bit code/data segments.
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All segment bases are `0x00000000` and all limits are `0xffffffff`.
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DO NOT reload segment registers or rely on the provided GDT. The kernel MUST load
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its own GDT as soon as possible and not rely on the bootloader's.
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The IDT is in an undefined state. Kernel must load its own.
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IF flag, VM flag, and direction flag are cleared on entry. Other flags undefined.
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PE is enabled (`cr0`).
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The A20 gate is enabled.
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2020-06-01 05:47:55 +03:00
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PIC/APIC IRQs are all masked.
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2020-04-30 22:19:12 +03:00
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`esp` is set to the requested stack as per stivale header.
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A pointer to the stivale structure (described below) is pushed onto this stack
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before the entry point is called.
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2020-07-09 04:24:54 +03:00
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All other general purpose registers are set to 0.
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2020-04-24 00:36:01 +03:00
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## stivale header (.stivalehdr)
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The kernel executable shall have a section `.stivalehdr` which will contain
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the header that the bootloader will parse.
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Said header looks like this:
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```c
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struct stivale_header {
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uint64_t stack; // This is the stack address which will be in RSP
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// when the kernel is loaded.
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uint16_t flags; // Flags
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// bit 0 0 = text mode, 1 = graphics framebuffer mode
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// bit 1 0 = 4-level paging, 1 = use 5-level paging (if
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available)
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Ignored if booting a 32-bit kernel.
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// bit 2 0 = Disable KASLR, 1 = enable KASLR (up to 1GB slide)
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Ignored if booting a 32-bit or non-relocatable kernel
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// All other bits undefined.
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uint16_t framebuffer_width; // These 3 values are parsed if a graphics mode
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uint16_t framebuffer_height; // is requested. If all values are set to 0
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uint16_t framebuffer_bpp; // then the bootloader will pick the best possible
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// video mode automatically (recommended).
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uint64_t entry_point; // If not 0, this field will be jumped to at entry
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// instead of the ELF entry point.
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} __attribute__((packed));
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```
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## stivale structure
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The stivale structure returned by the bootloader looks like this:
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```c
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struct stivale_struct {
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uint64_t cmdline; // Pointer to a null-terminated cmdline
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uint64_t memory_map_addr; // Pointer to the memory map (entries described below)
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uint64_t memory_map_entries; // Count of memory map entries
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uint64_t framebuffer_addr; // Address of the framebuffer and related info
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uint16_t framebuffer_pitch;
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uint16_t framebuffer_width;
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uint16_t framebuffer_height;
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uint16_t framebuffer_bpp;
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uint64_t rsdp; // Pointer to the ACPI RSDP structure
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uint64_t module_count; // Count of modules that stivale loaded according to config
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uint64_t modules; // Pointer to the first entry in the linked list of modules (described below)
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uint64_t epoch; // UNIX epoch at boot, read from system RTC
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uint64_t flags; // Flags
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// bit 0: 1 if booted with BIOS, 0 if booted with UEFI
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// All other bits undefined.
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} __attribute__((packed));
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```
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2020-08-11 18:53:37 +03:00
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## Memory map entry
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```c
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struct mmap_entry {
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uint64_t base; // Base of the memory section
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uint64_t length; // Length of the section
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uint32_t type; // Type (described below)
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uint32_t unused;
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} __attribute__((packed));
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```
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`type` is an enumeration that can have the following values:
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2020-06-06 19:47:21 +03:00
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```
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1 - Usable RAM
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2 - Reserved
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3 - ACPI reclaimable
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4 - ACPI NVS
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5 - Bad memory
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10 - Kernel/Modules
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```
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All other values are undefined.
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2020-06-06 18:09:52 +03:00
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The kernel and modules loaded **are not** marked as usable memory. They are marked
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as Kernel/Modules (type 10).
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Usable RAM chunks are guaranteed to be 4096 byte aligned for both base and length.
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The entries are guaranteed to be sorted by base address, lowest to highest.
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Usable RAM chunks are guaranteed not to overlap with any other entry.
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To the contrary, all non-usable RAM chunks are not guaranteed any alignment, nor
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is it guaranteed that they do not overlap each other (except usable RAM).
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## Modules
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The `modules` variable points to the first entry of the linked list of module
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structures.
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A module structure looks like this:
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```c
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struct stivale_module {
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uint64_t begin; // Address where the module is loaded
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uint64_t end; // End address of the module
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char string[128]; // String passed to the module (by config file)
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uint64_t next; // Pointer to the next module (if any), check module_count
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// in the stivale_struct
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} __attribute__((packed));
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```
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