2020-09-18 15:39:29 +03:00
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#include <stddef.h>
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#include <stdint.h>
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#include <stdbool.h>
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2021-03-04 07:15:20 +03:00
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#include <lib/libc.h>
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2020-09-18 15:39:29 +03:00
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#include <lib/acpi.h>
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2020-09-21 13:15:55 +03:00
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#include <sys/cpu.h>
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2022-08-27 00:44:47 +03:00
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#include <lib/misc.h>
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2020-09-18 20:02:47 +03:00
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#include <lib/print.h>
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2020-09-18 21:02:10 +03:00
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#include <sys/smp.h>
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#include <sys/lapic.h>
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2021-03-07 02:52:25 +03:00
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#include <sys/gdt.h>
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2020-09-21 13:15:55 +03:00
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#include <mm/vmm.h>
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2020-09-20 13:03:44 +03:00
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#include <mm/pmm.h>
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2022-09-14 15:54:55 +03:00
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#define LIMINE_NO_POINTERS
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#include <limine.h>
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2023-06-04 02:36:06 +03:00
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#if defined (__riscv64)
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#include <sys/sbi.h>
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#endif
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2020-09-18 15:39:29 +03:00
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struct madt {
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2021-05-28 17:05:42 +03:00
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struct sdt header;
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2020-09-18 15:39:29 +03:00
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uint32_t local_controller_addr;
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uint32_t flags;
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char madt_entries_begin[];
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} __attribute__((packed));
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struct madt_header {
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uint8_t type;
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uint8_t length;
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} __attribute__((packed));
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struct madt_lapic {
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2021-05-28 17:05:42 +03:00
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struct madt_header header;
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2020-09-18 20:26:17 +03:00
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uint8_t acpi_processor_uid;
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2020-09-18 15:39:29 +03:00
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uint8_t lapic_id;
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uint32_t flags;
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} __attribute__((packed));
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2020-09-27 02:32:47 +03:00
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struct madt_x2apic {
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2021-05-28 17:05:42 +03:00
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struct madt_header header;
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2020-09-27 02:32:47 +03:00
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uint8_t reserved[2];
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uint32_t x2apic_id;
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uint32_t flags;
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uint32_t acpi_processor_uid;
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} __attribute__((packed));
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2022-07-28 23:23:12 +03:00
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extern symbol smp_trampoline_start;
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2022-07-28 23:30:26 +03:00
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extern size_t smp_trampoline_size;
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2021-03-04 07:15:20 +03:00
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2022-08-18 18:32:54 +03:00
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struct madt_gicc {
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struct madt_header header;
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uint8_t reserved1[2];
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uint32_t iface_no;
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uint32_t acpi_uid;
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uint32_t flags;
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uint32_t parking_ver;
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uint32_t perf_gsiv;
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uint64_t parking_addr;
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uint64_t gicc_base_addr;
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uint64_t gicv_base_addr;
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uint64_t gich_base_addr;
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uint32_t vgic_maint_gsiv;
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uint64_t gicr_base_addr;
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uint64_t mpidr;
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uint8_t power_eff_class;
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uint8_t reserved2;
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uint16_t spe_overflow_gsiv;
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} __attribute__((packed));
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2023-06-04 02:36:06 +03:00
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// Reference: https://github.com/riscv-non-isa/riscv-acpi/issues/15
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struct madt_riscv_intc {
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struct madt_header header;
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uint8_t version;
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uint8_t reserved;
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uint32_t flags;
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uint64_t hartid;
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uint32_t acpi_processor_uid;
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} __attribute__((packed));
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2022-08-18 18:32:54 +03:00
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#if defined (__x86_64__) || defined (__i386__)
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2021-03-04 07:15:20 +03:00
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struct trampoline_passed_info {
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uint8_t smp_tpl_booted_flag;
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uint8_t smp_tpl_target_mode;
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uint32_t smp_tpl_pagemap;
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2021-03-07 08:50:04 +03:00
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uint32_t smp_tpl_info_struct;
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2021-03-04 07:15:20 +03:00
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struct gdtr smp_tpl_gdt;
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2022-03-18 03:47:04 +03:00
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uint64_t smp_tpl_hhdm;
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2021-03-04 07:15:20 +03:00
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} __attribute__((packed));
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2020-09-18 15:39:29 +03:00
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2020-09-27 02:32:47 +03:00
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static bool smp_start_ap(uint32_t lapic_id, struct gdtr *gdtr,
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2022-09-14 15:54:55 +03:00
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struct limine_smp_info *info_struct,
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2023-06-04 02:36:06 +03:00
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bool longmode, int paging_mode, uint32_t pagemap,
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2022-03-31 14:33:18 +03:00
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bool x2apic, bool nx, uint64_t hhdm, bool wp) {
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2022-11-02 17:28:07 +03:00
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// Prepare the trampoline
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static void *trampoline = NULL;
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if (trampoline == NULL) {
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trampoline = conv_mem_alloc(smp_trampoline_size);
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memcpy(trampoline, smp_trampoline_start, smp_trampoline_size);
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}
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2021-03-04 07:15:20 +03:00
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static struct trampoline_passed_info *passed_info = NULL;
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if (passed_info == NULL) {
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2022-07-28 23:30:26 +03:00
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passed_info = (void *)(((uintptr_t)trampoline + smp_trampoline_size)
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2021-03-04 07:15:20 +03:00
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- sizeof(struct trampoline_passed_info));
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}
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2021-03-07 08:50:04 +03:00
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passed_info->smp_tpl_info_struct = (uint32_t)(uintptr_t)info_struct;
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2021-03-04 07:15:20 +03:00
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passed_info->smp_tpl_booted_flag = 0;
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passed_info->smp_tpl_pagemap = pagemap;
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passed_info->smp_tpl_target_mode = ((uint32_t)x2apic << 2)
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2023-06-04 02:36:06 +03:00
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| ((uint32_t)paging_mode << 1)
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2022-09-18 12:30:21 +03:00
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| ((uint32_t)nx << 3)
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| ((uint32_t)wp << 4)
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| ((uint32_t)longmode << 0);
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passed_info->smp_tpl_gdt = *gdtr;
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2022-03-18 03:47:04 +03:00
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passed_info->smp_tpl_hhdm = hhdm;
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2021-03-04 07:15:20 +03:00
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asm volatile ("" ::: "memory");
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2020-09-18 15:39:29 +03:00
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// Send the INIT IPI
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2020-09-27 02:32:47 +03:00
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if (x2apic) {
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2020-12-28 15:44:52 +03:00
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x2apic_write(LAPIC_REG_ICR0, ((uint64_t)lapic_id << 32) | 0x4500);
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2020-09-27 02:32:47 +03:00
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} else {
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lapic_write(LAPIC_REG_ICR1, lapic_id << 24);
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2020-12-28 15:44:52 +03:00
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lapic_write(LAPIC_REG_ICR0, 0x4500);
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2020-09-27 02:32:47 +03:00
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}
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2021-09-13 06:13:02 +03:00
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delay(10000000);
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2020-09-18 15:39:29 +03:00
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// Send the Startup IPI
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2020-09-27 02:32:47 +03:00
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if (x2apic) {
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x2apic_write(LAPIC_REG_ICR0, ((uint64_t)lapic_id << 32) |
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2021-03-04 07:15:20 +03:00
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((size_t)trampoline / 4096) | 0x4600);
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2020-09-27 02:32:47 +03:00
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} else {
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lapic_write(LAPIC_REG_ICR1, lapic_id << 24);
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2021-03-04 07:15:20 +03:00
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lapic_write(LAPIC_REG_ICR0, ((size_t)trampoline / 4096) | 0x4600);
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2020-09-27 02:32:47 +03:00
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}
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2020-09-18 15:39:29 +03:00
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2020-09-18 20:02:47 +03:00
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for (int i = 0; i < 100; i++) {
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2021-03-04 07:15:20 +03:00
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if (locked_read(&passed_info->smp_tpl_booted_flag) == 1) {
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2020-09-18 15:39:29 +03:00
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return true;
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}
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2021-09-13 06:13:02 +03:00
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delay(10000000);
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2020-09-18 15:39:29 +03:00
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}
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return false;
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}
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2022-09-14 15:54:55 +03:00
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struct limine_smp_info *init_smp(size_t *cpu_count,
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2020-10-25 06:58:53 +03:00
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uint32_t *_bsp_lapic_id,
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2020-09-18 15:39:29 +03:00
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bool longmode,
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2023-06-04 02:36:06 +03:00
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int paging_mode,
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2020-09-18 15:39:29 +03:00
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pagemap_t pagemap,
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2021-07-15 17:20:29 +03:00
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bool x2apic,
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2022-03-18 03:47:04 +03:00
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bool nx,
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2022-03-31 14:33:18 +03:00
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uint64_t hhdm,
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bool wp) {
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2020-10-22 16:25:10 +03:00
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if (!lapic_check())
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return NULL;
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2020-09-18 15:39:29 +03:00
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// Search for MADT table
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struct madt *madt = acpi_get_table("APIC", 0);
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if (madt == NULL)
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return NULL;
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2021-03-07 08:50:04 +03:00
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struct gdtr gdtr = gdt;
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2020-09-18 15:39:29 +03:00
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2020-10-22 16:25:10 +03:00
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uint32_t eax, ebx, ecx, edx;
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if (!cpuid(1, 0, &eax, &ebx, &ecx, &edx))
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return NULL;
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uint8_t bsp_lapic_id = ebx >> 24;
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2020-09-18 15:39:29 +03:00
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2020-09-27 02:32:47 +03:00
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x2apic = x2apic && x2apic_enable();
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2020-11-16 23:23:11 +03:00
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uint32_t bsp_x2apic_id = 0;
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2020-10-22 16:25:10 +03:00
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if (x2apic) {
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// The Intel manual recommends checking if leaf 0x1f exists first, and
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// using that in place of 0xb if that's the case
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if (!cpuid(0x1f, 0, &eax, &ebx, &ecx, &edx))
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if (!cpuid(0xb, 0, &eax, &ebx, &ecx, &edx))
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return NULL;
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bsp_x2apic_id = edx;
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2020-10-25 06:58:53 +03:00
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*_bsp_lapic_id = bsp_x2apic_id;
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} else {
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*_bsp_lapic_id = bsp_lapic_id;
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2020-10-22 16:25:10 +03:00
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}
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*cpu_count = 0;
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2020-10-20 03:38:01 +03:00
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// Count the MAX of startable APs and allocate accordingly
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size_t max_cpus = 0;
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for (uint8_t *madt_ptr = (uint8_t *)madt->madt_entries_begin;
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2021-05-28 17:05:42 +03:00
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(uintptr_t)madt_ptr < (uintptr_t)madt + madt->header.length;
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2020-10-20 03:38:01 +03:00
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madt_ptr += *(madt_ptr + 1)) {
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switch (*madt_ptr) {
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case 0: {
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// Processor local xAPIC
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struct madt_lapic *lapic = (void *)madt_ptr;
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// Check if we can actually try to start the AP
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if ((lapic->flags & 1) ^ ((lapic->flags >> 1) & 1))
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max_cpus++;
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continue;
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}
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case 9: {
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// Processor local x2APIC
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if (!x2apic)
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continue;
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2021-07-06 06:17:18 +03:00
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struct madt_x2apic *x2lapic = (void *)madt_ptr;
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2020-10-20 03:38:01 +03:00
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// Check if we can actually try to start the AP
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2021-07-06 06:17:18 +03:00
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if ((x2lapic->flags & 1) ^ ((x2lapic->flags >> 1) & 1))
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2020-10-20 03:38:01 +03:00
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max_cpus++;
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continue;
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}
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}
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}
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2022-09-14 15:54:55 +03:00
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struct limine_smp_info *ret = ext_mem_alloc(max_cpus * sizeof(struct limine_smp_info));
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2020-10-20 03:38:01 +03:00
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*cpu_count = 0;
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// Try to start all APs
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2020-09-18 15:39:29 +03:00
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for (uint8_t *madt_ptr = (uint8_t *)madt->madt_entries_begin;
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2021-05-28 17:05:42 +03:00
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(uintptr_t)madt_ptr < (uintptr_t)madt + madt->header.length;
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2020-09-18 15:39:29 +03:00
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madt_ptr += *(madt_ptr + 1)) {
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switch (*madt_ptr) {
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case 0: {
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// Processor local xAPIC
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struct madt_lapic *lapic = (void *)madt_ptr;
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2020-09-26 18:12:52 +03:00
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// Check if we can actually try to start the AP
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if (!((lapic->flags & 1) ^ ((lapic->flags >> 1) & 1)))
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continue;
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2022-09-14 15:54:55 +03:00
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struct limine_smp_info *info_struct = &ret[*cpu_count];
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2020-09-20 11:28:39 +03:00
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2022-09-14 15:54:55 +03:00
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info_struct->processor_id = lapic->acpi_processor_uid;
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info_struct->lapic_id = lapic->lapic_id;
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2020-09-20 11:28:39 +03:00
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2020-09-18 15:39:29 +03:00
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// Do not try to restart the BSP
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2020-10-22 16:25:10 +03:00
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if (lapic->lapic_id == bsp_lapic_id) {
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2020-09-20 11:28:39 +03:00
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(*cpu_count)++;
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2020-09-18 15:39:29 +03:00
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continue;
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2020-09-20 11:28:39 +03:00
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}
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2020-09-18 15:39:29 +03:00
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2021-05-11 07:46:42 +03:00
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printv("smp: [xAPIC] Found candidate AP for bring-up. LAPIC ID: %u\n", lapic->lapic_id);
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2020-09-18 15:39:29 +03:00
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// Try to start the AP
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if (!smp_start_ap(lapic->lapic_id, &gdtr, info_struct,
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2023-06-04 02:36:06 +03:00
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longmode, paging_mode, (uintptr_t)pagemap.top_level,
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2022-03-31 14:33:18 +03:00
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x2apic, nx, hhdm, wp)) {
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2020-09-27 02:32:47 +03:00
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print("smp: FAILED to bring-up AP\n");
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continue;
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}
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2021-05-11 07:46:42 +03:00
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printv("smp: Successfully brought up AP\n");
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2020-09-27 02:32:47 +03:00
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(*cpu_count)++;
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continue;
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}
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case 9: {
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// Processor local x2APIC
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if (!x2apic)
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continue;
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2021-07-06 06:17:18 +03:00
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struct madt_x2apic *x2lapic = (void *)madt_ptr;
|
2020-09-27 02:32:47 +03:00
|
|
|
|
|
|
|
// Check if we can actually try to start the AP
|
2021-07-06 06:17:18 +03:00
|
|
|
if (!((x2lapic->flags & 1) ^ ((x2lapic->flags >> 1) & 1)))
|
2020-09-27 02:32:47 +03:00
|
|
|
continue;
|
|
|
|
|
2022-09-14 15:54:55 +03:00
|
|
|
struct limine_smp_info *info_struct = &ret[*cpu_count];
|
2020-09-27 02:32:47 +03:00
|
|
|
|
2022-09-14 15:54:55 +03:00
|
|
|
info_struct->processor_id = x2lapic->acpi_processor_uid;
|
|
|
|
info_struct->lapic_id = x2lapic->x2apic_id;
|
2020-09-27 02:32:47 +03:00
|
|
|
|
|
|
|
// Do not try to restart the BSP
|
2021-07-06 06:17:18 +03:00
|
|
|
if (x2lapic->x2apic_id == bsp_x2apic_id) {
|
2020-09-27 02:32:47 +03:00
|
|
|
(*cpu_count)++;
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
2021-07-06 06:17:18 +03:00
|
|
|
printv("smp: [x2APIC] Found candidate AP for bring-up. LAPIC ID: %u\n", x2lapic->x2apic_id);
|
2020-09-27 02:32:47 +03:00
|
|
|
|
|
|
|
// Try to start the AP
|
2021-07-06 06:17:18 +03:00
|
|
|
if (!smp_start_ap(x2lapic->x2apic_id, &gdtr, info_struct,
|
2023-06-04 02:36:06 +03:00
|
|
|
longmode, paging_mode, (uintptr_t)pagemap.top_level,
|
2022-03-31 14:33:18 +03:00
|
|
|
true, nx, hhdm, wp)) {
|
2020-09-18 15:39:29 +03:00
|
|
|
print("smp: FAILED to bring-up AP\n");
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
2021-05-11 07:46:42 +03:00
|
|
|
printv("smp: Successfully brought up AP\n");
|
2020-09-18 21:21:16 +03:00
|
|
|
|
2020-09-18 15:39:29 +03:00
|
|
|
(*cpu_count)++;
|
2020-09-20 11:28:39 +03:00
|
|
|
continue;
|
2020-09-18 15:39:29 +03:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
2022-08-18 18:32:54 +03:00
|
|
|
|
|
|
|
#elif defined (__aarch64__)
|
|
|
|
|
|
|
|
struct trampoline_passed_info {
|
|
|
|
uint64_t smp_tpl_booted_flag;
|
|
|
|
|
|
|
|
uint64_t smp_tpl_ttbr0;
|
|
|
|
uint64_t smp_tpl_ttbr1;
|
|
|
|
|
|
|
|
uint64_t smp_tpl_mair;
|
|
|
|
uint64_t smp_tpl_tcr;
|
|
|
|
uint64_t smp_tpl_sctlr;
|
|
|
|
|
|
|
|
uint64_t smp_tpl_info_struct;
|
|
|
|
};
|
|
|
|
|
|
|
|
enum {
|
|
|
|
BOOT_WITH_SPIN_TBL,
|
|
|
|
BOOT_WITH_PSCI_SMC,
|
|
|
|
BOOT_WITH_PSCI_HVC,
|
|
|
|
BOOT_WITH_ACPI_PARK
|
|
|
|
};
|
|
|
|
|
|
|
|
static uint32_t psci_cpu_on = 0xC4000003;
|
|
|
|
|
|
|
|
static bool try_start_ap(int boot_method, uint64_t method_ptr,
|
2022-09-14 15:54:55 +03:00
|
|
|
struct limine_smp_info *info_struct,
|
2022-08-18 18:32:54 +03:00
|
|
|
uint64_t ttbr0, uint64_t ttbr1, uint64_t mair,
|
|
|
|
uint64_t tcr, uint64_t sctlr) {
|
2022-11-02 17:28:07 +03:00
|
|
|
// Prepare the trampoline
|
|
|
|
static void *trampoline = NULL;
|
|
|
|
if (trampoline == NULL) {
|
|
|
|
trampoline = ext_mem_alloc(0x1000);
|
|
|
|
|
|
|
|
memcpy(trampoline, smp_trampoline_start, smp_trampoline_size);
|
|
|
|
}
|
|
|
|
|
2022-08-18 18:32:54 +03:00
|
|
|
static struct trampoline_passed_info *passed_info = NULL;
|
|
|
|
if (passed_info == NULL) {
|
|
|
|
passed_info = (void *)(((uintptr_t)trampoline + 0x1000)
|
|
|
|
- sizeof(struct trampoline_passed_info));
|
|
|
|
}
|
|
|
|
|
|
|
|
passed_info->smp_tpl_info_struct = (uint64_t)(uintptr_t)info_struct;
|
|
|
|
passed_info->smp_tpl_booted_flag = 0;
|
|
|
|
passed_info->smp_tpl_ttbr0 = ttbr0;
|
|
|
|
passed_info->smp_tpl_ttbr1 = ttbr1;
|
|
|
|
passed_info->smp_tpl_mair = mair;
|
|
|
|
passed_info->smp_tpl_tcr = tcr;
|
|
|
|
passed_info->smp_tpl_sctlr = sctlr;
|
|
|
|
|
2022-09-14 15:54:55 +03:00
|
|
|
// Cache coherency between the I-Cache and D-Cache is not guaranteed by the
|
2022-08-18 18:32:54 +03:00
|
|
|
// architecture and as such we must perform I-Cache invalidation.
|
|
|
|
// Additionally, the newly-booted AP may have caches disabled which implies
|
|
|
|
// it possibly does not see our cache contents either.
|
|
|
|
|
|
|
|
clean_inval_dcache_poc((uintptr_t)trampoline, (uintptr_t)trampoline + 0x1000);
|
|
|
|
inval_icache_pou((uintptr_t)trampoline, (uintptr_t)trampoline + 0x1000);
|
|
|
|
|
|
|
|
asm volatile ("" ::: "memory");
|
|
|
|
|
|
|
|
switch (boot_method) {
|
|
|
|
case BOOT_WITH_SPIN_TBL:
|
|
|
|
*(volatile uint64_t *)method_ptr = (uint64_t)(uintptr_t)trampoline;
|
|
|
|
clean_inval_dcache_poc(method_ptr, method_ptr + 8);
|
|
|
|
asm ("sev");
|
|
|
|
break;
|
|
|
|
|
|
|
|
case BOOT_WITH_PSCI_SMC:
|
|
|
|
case BOOT_WITH_PSCI_HVC: {
|
|
|
|
register int32_t result asm("w0");
|
|
|
|
register uint32_t cmd asm("w0") = psci_cpu_on;
|
|
|
|
register uint64_t cpu asm("x1") = info_struct->mpidr;
|
|
|
|
register uint64_t addr asm("x2") = (uint64_t)(uintptr_t)trampoline;
|
|
|
|
register uint64_t ctx asm("x3") = 0;
|
|
|
|
|
|
|
|
if (boot_method == BOOT_WITH_PSCI_SMC)
|
|
|
|
asm volatile ("smc #0" : "=r"(result) : "r"(cmd), "r"(cpu), "r"(addr), "r"(ctx));
|
|
|
|
else
|
|
|
|
asm volatile ("hvc #0" : "=r"(result) : "r"(cmd), "r"(cpu), "r"(addr), "r"(ctx));
|
|
|
|
|
|
|
|
switch (result) {
|
|
|
|
case 0: // Success
|
|
|
|
break;
|
|
|
|
case -2:
|
|
|
|
printv("smp: PSCI says CPU_ON was given invalid arguments\n");
|
|
|
|
return false;
|
|
|
|
case -4:
|
|
|
|
printv("smp: PSCI says AP is already on\n");
|
|
|
|
return false;
|
|
|
|
case -5:
|
|
|
|
printv("smp: PSCI says CPU_ON is already pending for this AP\n");
|
|
|
|
return false;
|
|
|
|
case -6:
|
|
|
|
printv("smp: PSCI reports internal failure\n");
|
|
|
|
return false;
|
|
|
|
case -9:
|
|
|
|
printv("smp: PSCI says CPU_ON was given an invalid address\n");
|
|
|
|
return false;
|
|
|
|
default:
|
|
|
|
printv("smp: PSCI reports an unexpected error (%d)\n", result);
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
case BOOT_WITH_ACPI_PARK:
|
|
|
|
panic(false, "ACPI parking protocol is unsupported, please report this!");
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
panic(false, "Invalid boot method specified");
|
|
|
|
}
|
|
|
|
|
|
|
|
for (int i = 0; i < 1000000; i++) {
|
|
|
|
// We do not need cache invalidation here as by the time the AP gets to
|
|
|
|
// set this flag, it has enabled it's caches
|
|
|
|
|
|
|
|
if (locked_read(&passed_info->smp_tpl_booted_flag) == 1) {
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
//delay(10000000);
|
|
|
|
}
|
|
|
|
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2022-09-14 15:54:55 +03:00
|
|
|
static struct limine_smp_info *try_acpi_smp(size_t *cpu_count,
|
2022-08-18 18:32:54 +03:00
|
|
|
uint64_t *_bsp_mpidr,
|
|
|
|
pagemap_t pagemap,
|
|
|
|
uint64_t mair,
|
|
|
|
uint64_t tcr,
|
|
|
|
uint64_t sctlr) {
|
|
|
|
int boot_method = BOOT_WITH_ACPI_PARK;
|
|
|
|
|
|
|
|
// Search for FADT table
|
|
|
|
uint8_t *fadt = acpi_get_table("FACP", 0);
|
|
|
|
|
|
|
|
if (fadt == NULL)
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
// Read the single field from the FADT without defining a struct for the whole table
|
|
|
|
uint16_t arm_boot_args;
|
|
|
|
memcpy(&arm_boot_args, fadt + 129, 2);
|
|
|
|
|
|
|
|
if (arm_boot_args & 1) // PSCI compliant?
|
|
|
|
boot_method = arm_boot_args & 2 ? BOOT_WITH_PSCI_HVC : BOOT_WITH_PSCI_SMC;
|
|
|
|
|
|
|
|
// Search for MADT table
|
|
|
|
struct madt *madt = acpi_get_table("APIC", 0);
|
|
|
|
|
|
|
|
if (madt == NULL)
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
uint64_t bsp_mpidr;
|
|
|
|
asm volatile ("mrs %0, mpidr_el1" : "=r"(bsp_mpidr));
|
|
|
|
|
2022-09-14 15:54:55 +03:00
|
|
|
// This bit is Res1 in the system reg, but not included in the MPIDR from MADT
|
2022-08-18 18:32:54 +03:00
|
|
|
bsp_mpidr &= ~((uint64_t)1 << 31);
|
|
|
|
|
|
|
|
*_bsp_mpidr = bsp_mpidr;
|
|
|
|
|
|
|
|
printv("smp: BSP MPIDR is %X\n", bsp_mpidr);
|
|
|
|
|
|
|
|
*cpu_count = 0;
|
|
|
|
|
|
|
|
// Count the MAX of startable APs and allocate accordingly
|
|
|
|
size_t max_cpus = 0;
|
|
|
|
|
|
|
|
for (uint8_t *madt_ptr = (uint8_t *)madt->madt_entries_begin;
|
|
|
|
(uintptr_t)madt_ptr < (uintptr_t)madt + madt->header.length;
|
|
|
|
madt_ptr += *(madt_ptr + 1)) {
|
|
|
|
switch (*madt_ptr) {
|
|
|
|
case 11: {
|
|
|
|
// GIC CPU Interface
|
|
|
|
struct madt_gicc *gicc = (void *)madt_ptr;
|
|
|
|
|
|
|
|
// Check if we can actually try to start the AP
|
|
|
|
if (gicc->flags & 1)
|
|
|
|
max_cpus++;
|
|
|
|
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2022-09-14 15:54:55 +03:00
|
|
|
struct limine_smp_info *ret = ext_mem_alloc(max_cpus * sizeof(struct limine_smp_info));
|
2022-08-18 18:32:54 +03:00
|
|
|
*cpu_count = 0;
|
|
|
|
|
|
|
|
// Try to start all APs
|
|
|
|
for (uint8_t *madt_ptr = (uint8_t *)madt->madt_entries_begin;
|
|
|
|
(uintptr_t)madt_ptr < (uintptr_t)madt + madt->header.length;
|
|
|
|
madt_ptr += *(madt_ptr + 1)) {
|
|
|
|
switch (*madt_ptr) {
|
|
|
|
case 11: {
|
|
|
|
// GIC CPU Interface
|
|
|
|
struct madt_gicc *gicc = (void *)madt_ptr;
|
|
|
|
|
|
|
|
// Check if we can actually try to start the AP
|
|
|
|
if (!(gicc->flags & 1))
|
|
|
|
continue;
|
|
|
|
|
2022-09-14 15:54:55 +03:00
|
|
|
struct limine_smp_info *info_struct = &ret[*cpu_count];
|
2022-08-18 18:32:54 +03:00
|
|
|
|
2022-09-14 16:39:52 +03:00
|
|
|
info_struct->processor_id = gicc->acpi_uid;
|
|
|
|
info_struct->gic_iface_no = gicc->iface_no;
|
|
|
|
info_struct->mpidr = gicc->mpidr;
|
2022-08-18 18:32:54 +03:00
|
|
|
|
|
|
|
// Do not try to restart the BSP
|
|
|
|
if (gicc->mpidr == bsp_mpidr) {
|
|
|
|
(*cpu_count)++;
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
|
|
|
printv("smp: Found candidate AP for bring-up. Interface no.: %x, MPIDR: %X\n", gicc->iface_no, gicc->mpidr);
|
|
|
|
|
|
|
|
// Try to start the AP
|
|
|
|
if (!try_start_ap(boot_method, gicc->parking_addr, info_struct,
|
|
|
|
(uint64_t)(uintptr_t)pagemap.top_level[0],
|
|
|
|
(uint64_t)(uintptr_t)pagemap.top_level[1],
|
|
|
|
mair, tcr, sctlr)) {
|
|
|
|
print("smp: FAILED to bring-up AP\n");
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
|
|
|
printv("smp: Successfully brought up AP\n");
|
|
|
|
|
|
|
|
(*cpu_count)++;
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2022-09-14 15:54:55 +03:00
|
|
|
struct limine_smp_info *init_smp(size_t *cpu_count,
|
2022-08-18 18:32:54 +03:00
|
|
|
uint64_t *bsp_mpidr,
|
|
|
|
pagemap_t pagemap,
|
|
|
|
uint64_t mair,
|
|
|
|
uint64_t tcr,
|
|
|
|
uint64_t sctlr) {
|
2022-09-14 15:54:55 +03:00
|
|
|
struct limine_smp_info *info = NULL;
|
2022-08-18 18:32:54 +03:00
|
|
|
|
2022-09-14 15:54:55 +03:00
|
|
|
//if (dtb_is_present() && (info = try_dtb_smp(cpu_count,
|
2022-08-18 18:32:54 +03:00
|
|
|
// _bsp_iface_no, pagemap, mair, tcr, sctlr)))
|
|
|
|
// return info;
|
|
|
|
|
|
|
|
// No RSDP means no ACPI
|
2022-09-14 15:54:55 +03:00
|
|
|
if (acpi_get_rsdp() && (info = try_acpi_smp(cpu_count,
|
2022-08-18 18:32:54 +03:00
|
|
|
bsp_mpidr, pagemap, mair, tcr, sctlr)))
|
|
|
|
return info;
|
|
|
|
|
|
|
|
printv("Failed to figure out how to start APs.");
|
|
|
|
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
2023-06-04 02:36:06 +03:00
|
|
|
#elif defined (__riscv64)
|
|
|
|
|
|
|
|
struct trampoline_passed_info {
|
|
|
|
uint64_t smp_tpl_booted_flag;
|
|
|
|
uint64_t smp_tpl_satp;
|
|
|
|
uint64_t smp_tpl_info_struct;
|
|
|
|
};
|
|
|
|
|
|
|
|
static bool smp_start_ap(size_t hartid, size_t satp, struct limine_smp_info *info_struct) {
|
|
|
|
static struct trampoline_passed_info passed_info;
|
|
|
|
|
|
|
|
passed_info.smp_tpl_booted_flag = 0;
|
|
|
|
passed_info.smp_tpl_satp = satp;
|
|
|
|
passed_info.smp_tpl_info_struct = (uint64_t)info_struct;
|
|
|
|
|
|
|
|
asm volatile ("" ::: "memory");
|
|
|
|
|
|
|
|
struct sbiret ret = sbi_hart_start(hartid, (size_t)smp_trampoline_start, (size_t)&passed_info);
|
|
|
|
if (ret.error != SBI_SUCCESS)
|
|
|
|
return false;
|
|
|
|
|
|
|
|
for (int i = 0; i < 1000000; i++) {
|
|
|
|
if (locked_read(&passed_info.smp_tpl_booted_flag) == 1)
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
struct limine_smp_info *init_smp(size_t *cpu_count,
|
|
|
|
size_t bsp_hartid,
|
|
|
|
pagemap_t pagemap) {
|
|
|
|
// No RSDP means no ACPI.
|
|
|
|
// Parsing the Device Tree is the only other method for detecting APs.
|
|
|
|
if (acpi_get_rsdp() == NULL) {
|
|
|
|
printv("smp: ACPI is required to detect APs.\n");
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
struct madt *madt = acpi_get_table("APIC", 0);
|
|
|
|
if (madt == NULL)
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
size_t max_cpus = 0;
|
|
|
|
for (uint8_t *madt_ptr = (uint8_t *)madt->madt_entries_begin;
|
|
|
|
(uintptr_t)madt_ptr < (uintptr_t)madt + madt->header.length;
|
|
|
|
madt_ptr += *(madt_ptr + 1)) {
|
|
|
|
switch (*madt_ptr) {
|
|
|
|
case 0x18: {
|
|
|
|
struct madt_riscv_intc *intc = (void *)madt_ptr;
|
|
|
|
|
|
|
|
// Check if we can actually try to start the AP
|
|
|
|
if ((intc->flags & 1) ^ ((intc->flags >> 1) & 1))
|
|
|
|
max_cpus++;
|
|
|
|
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
struct limine_smp_info *ret = ext_mem_alloc(max_cpus * sizeof(struct limine_smp_info));
|
|
|
|
*cpu_count = 0;
|
|
|
|
|
|
|
|
// Try to start all APs
|
|
|
|
for (uint8_t *madt_ptr = (uint8_t *)madt->madt_entries_begin;
|
|
|
|
(uintptr_t)madt_ptr < (uintptr_t)madt + madt->header.length;
|
|
|
|
madt_ptr += *(madt_ptr + 1)) {
|
|
|
|
switch (*madt_ptr) {
|
|
|
|
case 0x18: {
|
|
|
|
struct madt_riscv_intc *intc = (void *)madt_ptr;
|
|
|
|
|
|
|
|
// Check if we can actually try to start the AP
|
|
|
|
if (!((intc->flags & 1) ^ ((intc->flags >> 1) & 1)))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
struct limine_smp_info *info_struct = &ret[*cpu_count];
|
|
|
|
|
|
|
|
info_struct->processor_id = intc->acpi_processor_uid;
|
|
|
|
info_struct->hartid = intc->hartid;
|
|
|
|
|
|
|
|
// Do not try to restart the BSP
|
|
|
|
if (intc->hartid == bsp_hartid) {
|
|
|
|
(*cpu_count)++;
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
|
|
|
printv("smp: Found candidate AP for bring-up. Hart ID: %u\n", intc->hartid);
|
|
|
|
|
|
|
|
// Try to start the AP.
|
|
|
|
size_t satp = make_satp(pagemap.paging_mode, pagemap.top_level);
|
|
|
|
if (!smp_start_ap(intc->hartid, satp, info_struct)) {
|
|
|
|
print("smp: FAILED to bring-up AP\n");
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
|
|
|
(*cpu_count)++;
|
|
|
|
continue;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2022-08-18 18:32:54 +03:00
|
|
|
#else
|
|
|
|
#error Unknown architecture
|
|
|
|
#endif
|