2009-10-11 00:04:03 +04:00
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/* Copyright (c) 2005-2006 Russ Cox, MIT; see COPYRIGHT */
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#if defined(__FreeBSD__) && defined(__i386__) && __FreeBSD__ < 5
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#define NEEDX86CONTEXT 1
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#define SET setmcontext
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#define GET getmcontext
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#endif
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#if defined(__OpenBSD__) && defined(__i386__)
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#define NEEDX86CONTEXT 1
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#define SET setmcontext
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#define GET getmcontext
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#endif
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2011-01-03 23:08:59 +03:00
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#if defined(__APPLE__)
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#if defined(__i386__)
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2009-10-11 00:04:03 +04:00
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#define NEEDX86CONTEXT 1
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#define SET _setmcontext
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#define GET _getmcontext
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2011-01-03 23:08:59 +03:00
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#elif defined(__x86_64__)
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#define NEEDAMD64CONTEXT 1
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#define SET _setmcontext
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#define GET _getmcontext
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#else
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2009-10-11 00:04:03 +04:00
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#define NEEDPOWERCONTEXT 1
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#define SET __setmcontext
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#define GET __getmcontext
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#endif
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2011-01-03 23:08:59 +03:00
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#endif
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2009-10-11 00:04:03 +04:00
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#if defined(__linux__) && defined(__arm__)
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#define NEEDARMCONTEXT 1
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#define SET setmcontext
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#define GET getmcontext
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#endif
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2011-01-03 23:08:59 +03:00
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#if defined(__linux__) && defined(__mips__)
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#define NEEDMIPSCONTEXT 1
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#define SET setmcontext
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#define GET getmcontext
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#endif
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2009-10-11 00:04:03 +04:00
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#ifdef NEEDX86CONTEXT
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.globl SET
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SET:
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movl 4(%esp), %eax
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movl 8(%eax), %fs
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movl 12(%eax), %es
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movl 16(%eax), %ds
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movl 76(%eax), %ss
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movl 20(%eax), %edi
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movl 24(%eax), %esi
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movl 28(%eax), %ebp
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movl 36(%eax), %ebx
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movl 40(%eax), %edx
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movl 44(%eax), %ecx
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movl 72(%eax), %esp
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pushl 60(%eax) /* new %eip */
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movl 48(%eax), %eax
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ret
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.globl GET
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GET:
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movl 4(%esp), %eax
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movl %fs, 8(%eax)
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movl %es, 12(%eax)
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movl %ds, 16(%eax)
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movl %ss, 76(%eax)
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movl %edi, 20(%eax)
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movl %esi, 24(%eax)
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movl %ebp, 28(%eax)
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movl %ebx, 36(%eax)
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movl %edx, 40(%eax)
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movl %ecx, 44(%eax)
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movl $1, 48(%eax) /* %eax */
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movl (%esp), %ecx /* %eip */
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movl %ecx, 60(%eax)
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leal 4(%esp), %ecx /* %esp */
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movl %ecx, 72(%eax)
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movl 44(%eax), %ecx /* restore %ecx */
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movl $0, %eax
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ret
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#endif
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2011-01-03 23:08:59 +03:00
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#ifdef NEEDAMD64CONTEXT
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.globl SET
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SET:
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movq 16(%rdi), %rsi
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movq 24(%rdi), %rdx
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movq 32(%rdi), %rcx
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movq 40(%rdi), %r8
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movq 48(%rdi), %r9
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movq 56(%rdi), %rax
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movq 64(%rdi), %rbx
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movq 72(%rdi), %rbp
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movq 80(%rdi), %r10
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movq 88(%rdi), %r11
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movq 96(%rdi), %r12
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movq 104(%rdi), %r13
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movq 112(%rdi), %r14
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movq 120(%rdi), %r15
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movq 184(%rdi), %rsp
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pushq 160(%rdi) /* new %eip */
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movq 8(%rdi), %rdi
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ret
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.globl GET
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GET:
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movq %rdi, 8(%rdi)
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movq %rsi, 16(%rdi)
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movq %rdx, 24(%rdi)
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movq %rcx, 32(%rdi)
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movq %r8, 40(%rdi)
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movq %r9, 48(%rdi)
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movq $1, 56(%rdi) /* %rax */
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movq %rbx, 64(%rdi)
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movq %rbp, 72(%rdi)
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movq %r10, 80(%rdi)
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movq %r11, 88(%rdi)
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movq %r12, 96(%rdi)
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movq %r13, 104(%rdi)
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movq %r14, 112(%rdi)
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movq %r15, 120(%rdi)
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movq (%rsp), %rcx /* %rip */
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movq %rcx, 160(%rdi)
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leaq 8(%rsp), %rcx /* %rsp */
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movq %rcx, 184(%rdi)
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2014-08-03 20:28:37 +04:00
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2011-01-03 23:08:59 +03:00
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movq 32(%rdi), %rcx /* restore %rcx */
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movq $0, %rax
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ret
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#endif
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2009-10-11 00:04:03 +04:00
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#ifdef NEEDPOWERCONTEXT
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/* get FPR and VR use flags with sc 0x7FF3 */
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/* get vsave with mfspr reg, 256 */
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.text
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.align 2
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.globl GET
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GET: /* xxx: instruction scheduling */
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mflr r0
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mfcr r5
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mfctr r6
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mfxer r7
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stw r0, 0*4(r3)
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stw r5, 1*4(r3)
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stw r6, 2*4(r3)
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stw r7, 3*4(r3)
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stw r1, 4*4(r3)
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stw r2, 5*4(r3)
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li r5, 1 /* return value for setmcontext */
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stw r5, 6*4(r3)
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stw r13, (0+7)*4(r3) /* callee-save GPRs */
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stw r14, (1+7)*4(r3) /* xxx: block move */
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stw r15, (2+7)*4(r3)
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stw r16, (3+7)*4(r3)
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stw r17, (4+7)*4(r3)
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stw r18, (5+7)*4(r3)
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stw r19, (6+7)*4(r3)
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stw r20, (7+7)*4(r3)
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stw r21, (8+7)*4(r3)
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stw r22, (9+7)*4(r3)
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stw r23, (10+7)*4(r3)
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stw r24, (11+7)*4(r3)
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stw r25, (12+7)*4(r3)
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stw r26, (13+7)*4(r3)
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stw r27, (14+7)*4(r3)
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stw r28, (15+7)*4(r3)
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stw r29, (16+7)*4(r3)
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stw r30, (17+7)*4(r3)
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stw r31, (18+7)*4(r3)
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li r3, 0 /* return */
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blr
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.globl SET
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SET:
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lwz r13, (0+7)*4(r3) /* callee-save GPRs */
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lwz r14, (1+7)*4(r3) /* xxx: block move */
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lwz r15, (2+7)*4(r3)
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lwz r16, (3+7)*4(r3)
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lwz r17, (4+7)*4(r3)
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lwz r18, (5+7)*4(r3)
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lwz r19, (6+7)*4(r3)
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lwz r20, (7+7)*4(r3)
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lwz r21, (8+7)*4(r3)
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lwz r22, (9+7)*4(r3)
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lwz r23, (10+7)*4(r3)
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lwz r24, (11+7)*4(r3)
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lwz r25, (12+7)*4(r3)
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lwz r26, (13+7)*4(r3)
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lwz r27, (14+7)*4(r3)
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lwz r28, (15+7)*4(r3)
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lwz r29, (16+7)*4(r3)
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lwz r30, (17+7)*4(r3)
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lwz r31, (18+7)*4(r3)
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lwz r1, 4*4(r3)
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lwz r2, 5*4(r3)
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lwz r0, 0*4(r3)
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mtlr r0
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lwz r0, 1*4(r3)
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mtcr r0 /* mtcrf 0xFF, r0 */
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lwz r0, 2*4(r3)
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mtctr r0
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lwz r0, 3*4(r3)
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mtxer r0
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lwz r3, 6*4(r3)
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blr
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#endif
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#ifdef NEEDARMCONTEXT
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.globl GET
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GET:
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str r1, [r0,#4]
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str r2, [r0,#8]
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str r3, [r0,#12]
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str r4, [r0,#16]
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str r5, [r0,#20]
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str r6, [r0,#24]
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str r7, [r0,#28]
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str r8, [r0,#32]
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str r9, [r0,#36]
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str r10, [r0,#40]
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str r11, [r0,#44]
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str r12, [r0,#48]
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str r13, [r0,#52]
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str r14, [r0,#56]
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/* store 1 as r0-to-restore */
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mov r1, #1
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str r1, [r0]
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/* return 0 */
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mov r0, #0
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mov pc, lr
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.globl SET
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SET:
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ldr r1, [r0,#4]
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ldr r2, [r0,#8]
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ldr r3, [r0,#12]
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ldr r4, [r0,#16]
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ldr r5, [r0,#20]
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ldr r6, [r0,#24]
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ldr r7, [r0,#28]
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ldr r8, [r0,#32]
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ldr r9, [r0,#36]
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ldr r10, [r0,#40]
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ldr r11, [r0,#44]
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ldr r12, [r0,#48]
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ldr r13, [r0,#52]
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ldr r14, [r0,#56]
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ldr r0, [r0]
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mov pc, lr
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#endif
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2011-01-03 23:08:59 +03:00
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#ifdef NEEDMIPSCONTEXT
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.globl GET
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GET:
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sw $4, 24($4)
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sw $5, 28($4)
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sw $6, 32($4)
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sw $7, 36($4)
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sw $16, 72($4)
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sw $17, 76($4)
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sw $18, 80($4)
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sw $19, 84($4)
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sw $20, 88($4)
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sw $21, 92($4)
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sw $22, 96($4)
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sw $23, 100($4)
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sw $28, 120($4) /* gp */
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sw $29, 124($4) /* sp */
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sw $30, 128($4) /* fp */
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sw $31, 132($4) /* ra */
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xor $2, $2, $2
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j $31
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nop
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.globl SET
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SET:
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lw $16, 72($4)
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lw $17, 76($4)
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lw $18, 80($4)
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lw $19, 84($4)
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lw $20, 88($4)
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lw $21, 92($4)
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lw $22, 96($4)
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lw $23, 100($4)
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lw $28, 120($4) /* gp */
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lw $29, 124($4) /* sp */
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lw $30, 128($4) /* fp */
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2014-08-03 20:28:37 +04:00
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2011-01-03 23:08:59 +03:00
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/*
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* If we set $31 directly and j $31,
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* we would loose the outer return address.
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* Use a temporary register, then.
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*/
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lw $8, 132($4) /* ra */
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2014-08-03 20:28:37 +04:00
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2011-01-03 23:08:59 +03:00
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/* bug: not setting the pc causes a bus error */
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lw $25, 132($4) /* pc */
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lw $5, 28($4)
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lw $6, 32($4)
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lw $7, 36($4)
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lw $4, 24($4)
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j $8
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nop
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#endif
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