make: Make "make clean" use @ and rm -v everywhere

This makes our "make clean" commands show what they've /removed/, rather
than what the shell code that will be run is.

Signed-off-by: Richard Hughes <richard@hughsie.com>
Signed-off-by: Peter Jones <pjones@redhat.com>

Makefile

@@ -82,7 +82,7 @@ $(SUBDIRS):
 	$(MAKE) -C $(OBJDIR)/$@ -f $(SRCDIR)/$@/Makefile SRCDIR=$(SRCDIR)/$@ ARCH=$(ARCH)
 
 clean:
-	rm -f *~
+	@rm -vrf *~
 	@set -e ; for d in $(SUBDIRS); do \
 		if [ -d $(OBJDIR)/$$d ]; then \
 			$(MAKE) -C $(OBJDIR)/$$d -f $(SRCDIR)/$$d/Makefile SRCDIR=$(SRCDIR)/$$d clean; \

apps/Makefile

@@ -92,7 +92,7 @@ all:	$(TARGETS)
 ctors_test.so : ctors_fns.o ctors_test.o
 
 clean:
-	rm -f $(TARGETS) *~ *.o *.so
+	@rm -vf $(TARGETS) *~ *.o *.so
 
 install:
 	mkdir -p $(INSTALLROOT)$(APPSDIR)

gnuefi/Makefile

@@ -69,7 +69,7 @@ gnu-efi.pc:
 
 
 clean:
-	rm -f $(TARGETS) *~ *.o $(OBJS)
+	@rm -vf $(TARGETS) *~ *.o $(OBJS)
 
 install:
 	mkdir -p $(INSTALLROOT)$(LIBDIR)

lib/Makefile

@@ -80,7 +80,7 @@ libefi.a: $(OBJS)
 	$(AR) $(ARFLAGS) $@ $^
 
 clean:
-	rm -f libefi.a *~ $(OBJS) */*.o
+	@rm -vf libefi.a *~ $(OBJS) */*.o
 
 $(LIBDIRINSTALL):
 	mkdir -p $@