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Makefile: Use standard make variables and recipes

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Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
This commit is contained in:
Andrew Jeffery 2017-10-22 09:52:50 +10:30
parent 8b35090f06
commit e4e40304e0
1 changed files with 3 additions and 10 deletions
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13
Makefile
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@ -1,29 +1,22 @@
CCFLAGS = -Wall -Wshadow -O2 -g
LFLAGS = -lm
LDLIBS = -lm
all: test example1 example2 example3 example4
test: test.o genann.o
$(CC) $(CCFLAGS) -o $@ $^ $(LFLAGS)
./$@
check: test
./$^
example1: example1.o genann.o
$(CC) $(CCFLAGS) -o $@ $^ $(LFLAGS)
example2: example2.o genann.o
$(CC) $(CCFLAGS) -o $@ $^ $(LFLAGS)
example3: example3.o genann.o
$(CC) $(CCFLAGS) -o $@ $^ $(LFLAGS)
example4: example4.o genann.o
$(CC) $(CCFLAGS) -o $@ $^ $(LFLAGS)
.c.o:
$(CC) -c $(CCFLAGS) $< -o $@
clean: