mirror of https://github.com/xiph/flac
Correctly detect riscv_vector.h using "-march=rv64gcv"
When detecting "riscv_vector.h" using autotools and cmake, invoke the toolchain with -march=rv64gcv.
This commit is contained in:
parent
3f70de0cb7
commit
b9e0a83863
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@ -113,7 +113,13 @@ check_include_file("inttypes.h" HAVE_INTTYPES_H)
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check_include_file("stdint.h" HAVE_STDINT_H)
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check_include_file("stdint.h" HAVE_STDINT_H)
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check_include_file("stdbool.h" HAVE_STDBOOL_H)
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check_include_file("stdbool.h" HAVE_STDBOOL_H)
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check_include_file("arm_neon.h" FLAC__HAS_NEONINTRIN)
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check_include_file("arm_neon.h" FLAC__HAS_NEONINTRIN)
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check_include_file("riscv_vector.h" FLAC__HAS_RISCVINTRIN)
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# Toolchains won't allow riscv_vector.h to be included unless the
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# vector extensions are enabled.
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set(SAVED_CMAKE_REQUIRED_FLAGS "${CMAKE_REQUIRED_FLAGS}")
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set(CMAKE_REQUIRED_FLAGS "-march=rv64gcv")
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check_include_file("riscv_vector.h" HAVE_RISCV_VECTOR_H)
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set(CMAKE_REQUIRED_FLAGS "${SAVED_CMAKE_REQUIRED_FLAGS}")
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if(NOT HAVE_STDINT_H OR NOT HAVE_STDBOOL_H)
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if(NOT HAVE_STDINT_H OR NOT HAVE_STDBOOL_H)
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message(SEND_ERROR "Header stdint.h and/or stdbool.h not found")
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message(SEND_ERROR "Header stdint.h and/or stdbool.h not found")
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@ -3,7 +3,7 @@ macro(CHECK_RV64VECTOR VARIABLE)
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message(STATUS "Check whether RV64 Vector can be used")
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message(STATUS "Check whether RV64 Vector can be used")
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configure_file(${PROJECT_SOURCE_DIR}/cmake/CheckRV64Vector.c.in ${PROJECT_BINARY_DIR}/CMakeFiles/CMakeTmp/CheckRV64Vector.c @ONLY)
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configure_file(${PROJECT_SOURCE_DIR}/cmake/CheckRV64Vector.c.in ${PROJECT_BINARY_DIR}/CMakeFiles/CMakeTmp/CheckRV64Vector.c @ONLY)
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try_compile(HAVE_${VARIABLE} "${PROJECT_BINARY_DIR}"
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try_compile(HAVE_${VARIABLE} "${PROJECT_BINARY_DIR}"
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"${PROJECT_BINARY_DIR}/CMakeFiles/CMakeTmp/CheckRV64Vector.c")
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"${PROJECT_BINARY_DIR}/CMakeFiles/CMakeTmp/CheckRV64Vector.c" COMPILE_DEFINITIONS "-march=rv64gcv")
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if(HAVE_${VARIABLE})
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if(HAVE_${VARIABLE})
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message(STATUS "Check whether RV64 Vector can be used - yes")
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message(STATUS "Check whether RV64 Vector can be used - yes")
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set(${VARIABLE} 1 CACHE INTERNAL "Result of CHECK_RV64VECTOR" FORCE)
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set(${VARIABLE} 1 CACHE INTERNAL "Result of CHECK_RV64VECTOR" FORCE)
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@ -121,6 +121,9 @@
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/* Define to 1 if you have the <termios.h> header file. */
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/* Define to 1 if you have the <termios.h> header file. */
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#cmakedefine HAVE_TERMIOS_H
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#cmakedefine HAVE_TERMIOS_H
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/* Define to 1 if you have the <riscv_vector.h> header file. */
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#cmakedefine HAVE_RISCV_VECTOR_H
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/* Define to 1 if typeof works with your compiler. */
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/* Define to 1 if typeof works with your compiler. */
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#cmakedefine HAVE_TYPEOF
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#cmakedefine HAVE_TYPEOF
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@ -53,7 +53,7 @@ AM_PROG_CC_C_O
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AC_C_INLINE
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AC_C_INLINE
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AC_C_TYPEOF
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AC_C_TYPEOF
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AC_CHECK_HEADERS([stdint.h stdbool.h inttypes.h byteswap.h sys/auxv.h sys/param.h sys/ioctl.h termios.h x86intrin.h cpuid.h arm_neon.h riscv_vector.h])
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AC_CHECK_HEADERS([stdint.h stdbool.h inttypes.h byteswap.h sys/auxv.h sys/param.h sys/ioctl.h termios.h x86intrin.h cpuid.h arm_neon.h])
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if test "x$ac_cv_header_stdint_h" != xyes -o "x$ac_cv_header_stdbool_h" != xyes; then
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if test "x$ac_cv_header_stdint_h" != xyes -o "x$ac_cv_header_stdbool_h" != xyes; then
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AC_MSG_ERROR("Header stdint.h and/or stdbool.h not found")
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AC_MSG_ERROR("Header stdint.h and/or stdbool.h not found")
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@ -89,6 +89,8 @@ fi
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AC_ARG_ENABLE(riscv-vector-optimizations, AS_HELP_STRING([--enable-riscv-vector-optimizations],[Enable RiscV Vector Optimization Routines]), riscv_vector_opt=yes, riscv_vector_opt=no)
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AC_ARG_ENABLE(riscv-vector-optimizations, AS_HELP_STRING([--enable-riscv-vector-optimizations],[Enable RiscV Vector Optimization Routines]), riscv_vector_opt=yes, riscv_vector_opt=no)
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AM_CONDITIONAL(FLAC__RISCV_VECTOR, test "x$riscv_vector_opt" = xyes)
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AM_CONDITIONAL(FLAC__RISCV_VECTOR, test "x$riscv_vector_opt" = xyes)
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if test "x$riscv_vector_opt" = xyes ; then
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if test "x$riscv_vector_opt" = xyes ; then
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CFLAGS="-march=rv64gcv $CFLAGS"
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AC_CHECK_HEADERS([riscv_vector.h])
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AC_DEFINE(FLAC__RISCV_VECTOR)
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AC_DEFINE(FLAC__RISCV_VECTOR)
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AH_TEMPLATE(FLAC__RISCV_VECTOR, [define to enable use riscv vector extensions])
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AH_TEMPLATE(FLAC__RISCV_VECTOR, [define to enable use riscv vector extensions])
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fi
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fi
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@ -33,6 +33,9 @@ else()
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check_cpu_arch_riscv64(FLAC__CPU_RISCV64)
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check_cpu_arch_riscv64(FLAC__CPU_RISCV64)
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if(FLAC__CPU_RISCV64)
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if(FLAC__CPU_RISCV64)
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check_rv64vector(FLAC__HAS_RISCVINTRIN)
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check_rv64vector(FLAC__HAS_RISCVINTRIN)
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if (RISCV_VECTOR AND FLAC__HAS_RISCVINTRIN)
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set_property(SOURCE lpc_intrin_riscv.c cpu.c APPEND_STRING PROPERTY COMPILE_FLAGS " -march=rv64gcv ")
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endif()
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endif()
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endif()
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endif()
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endif()
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@ -57,7 +57,7 @@
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#include <sys/auxv.h>
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#include <sys/auxv.h>
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#endif
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#endif
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#if defined(FLAC__RISCV_VECTOR) && defined(FLAC__HAS_RISCVINTRIN)
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#if defined(HAVE_RISCV_VECTOR_H) && defined(FLAC__RISCV_VECTOR) && defined(FLAC__HAS_RISCVINTRIN)
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#include <riscv_vector.h>
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#include <riscv_vector.h>
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#endif
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#endif
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@ -238,7 +238,7 @@ x86_cpu_info (FLAC__CPUInfo *info)
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static void
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static void
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rv64_cpu_info(FLAC__CPUInfo *info)
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rv64_cpu_info(FLAC__CPUInfo *info)
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{
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{
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#if defined(FLAC__CPU_RISCV64) && defined(FLAC__HAS_RISCVINTRIN) && defined(FLAC__HAS_RISCVINTRIN) && !defined(FLAC__NO_ASM) && defined(HAVE_SYS_AUXV_H) && defined(FLAC__RISCV_VECTOR)
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#if defined(FLAC__CPU_RISCV64) && defined(FLAC__HAS_RISCVINTRIN) && !defined(FLAC__NO_ASM) && defined(HAVE_SYS_AUXV_H) && defined(FLAC__RISCV_VECTOR) && defined(HAVE_RISCV_VECTOR_H)
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#define ISA_V_HWCAP (1 << ('v' - 'a'))
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#define ISA_V_HWCAP (1 << ('v' - 'a'))
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// Check that the kernel and the hardware support RiscV Vector.
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// Check that the kernel and the hardware support RiscV Vector.
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unsigned long hw_cap = getauxval(AT_HWCAP);
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unsigned long hw_cap = getauxval(AT_HWCAP);
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@ -35,6 +35,7 @@
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#ifndef FLAC__INTEGER_ONLY_LIBRARY
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#ifndef FLAC__INTEGER_ONLY_LIBRARY
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#ifndef FLAC__NO_ASM
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#ifndef FLAC__NO_ASM
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#ifdef FLAC__RISCV_VECTOR
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#ifdef FLAC__RISCV_VECTOR
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#ifdef HAVE_RISCV_VECTOR_H
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#if defined FLAC__CPU_RISCV64 && FLAC__HAS_RISCVINTRIN
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#if defined FLAC__CPU_RISCV64 && FLAC__HAS_RISCVINTRIN
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#include "private/lpc.h"
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#include "private/lpc.h"
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#include "FLAC/assert.h"
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#include "FLAC/assert.h"
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@ -627,6 +628,7 @@ void FLAC__lpc_compute_residual_from_qlp_coefficients_intrin_riscv(const FLAC__i
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}
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}
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#endif /* FLAC__CPU_ARM64 && FLAC__HAS_ARCH64INTRIN */
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#endif /* FLAC__CPU_ARM64 && FLAC__HAS_ARCH64INTRIN */
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#endif /* HAVE_RISCV_VECTOR_H */
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#endif /* FLAC__RISCV_VECTOR */
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#endif /* FLAC__RISCV_VECTOR */
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#endif /* FLAC__NO_ASM */
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#endif /* FLAC__NO_ASM */
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#endif /* FLAC__INTEGER_ONLY_LIBRARY */
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#endif /* FLAC__INTEGER_ONLY_LIBRARY */
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@ -959,7 +959,7 @@ static FLAC__StreamEncoderInitStatus init_stream_internal_(
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encoder->private_->local_lpc_compute_residual_from_qlp_coefficients_64bit = FLAC__lpc_compute_residual_from_qlp_coefficients_wide_intrin_neon;
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encoder->private_->local_lpc_compute_residual_from_qlp_coefficients_64bit = FLAC__lpc_compute_residual_from_qlp_coefficients_wide_intrin_neon;
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#endif /* defined FLAC__CPU_ARM64 && FLAC__HAS_NEONINTRIN */
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#endif /* defined FLAC__CPU_ARM64 && FLAC__HAS_NEONINTRIN */
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#if defined FLAC__CPU_RISCV64 && FLAC__HAS_RISCVINTRIN
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#if defined FLAC__CPU_RISCV64 && defined FLAC__HAS_RISCVINTRIN && defined HAVE_RISCV_VECTOR_H
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#ifdef FLAC__RISCV_VECTOR
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#ifdef FLAC__RISCV_VECTOR
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if(encoder->private_->cpuinfo.rv64.has_vector) {
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if(encoder->private_->cpuinfo.rv64.has_vector) {
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if(encoder->protected_->max_lpc_order <= encoder->private_->cpuinfo.rv64.vlenb) {
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if(encoder->protected_->max_lpc_order <= encoder->private_->cpuinfo.rv64.vlenb) {
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@ -968,7 +968,7 @@ static FLAC__StreamEncoderInitStatus init_stream_internal_(
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encoder->private_->local_lpc_compute_residual_from_qlp_coefficients = FLAC__lpc_compute_residual_from_qlp_coefficients_intrin_riscv;
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encoder->private_->local_lpc_compute_residual_from_qlp_coefficients = FLAC__lpc_compute_residual_from_qlp_coefficients_intrin_riscv;
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}
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}
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#endif /* FLAC__RISCV_VECTOR */
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#endif /* FLAC__RISCV_VECTOR */
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#endif /* defined FLAC__CPU_RISCV64 && FLAC__HAS_RISCVINTRIN */
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#endif /* defined FLAC__CPU_RISCV64 && FLAC__HAS_RISCVINTRIN && HAVE_RISCV_VECTOR_H */
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if(encoder->private_->cpuinfo.use_asm) {
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if(encoder->private_->cpuinfo.use_asm) {
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# ifdef FLAC__CPU_IA32
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# ifdef FLAC__CPU_IA32
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