Updated spirv-headers.

This commit is contained in:
Бранимир Караџић 2023-07-30 16:28:34 -07:00
parent b471939ffb
commit d15c26db2a
4 changed files with 52 additions and 31 deletions

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@ -12800,6 +12800,15 @@
"capabilities" : [ "VectorComputeINTEL" ],
"version" : "None"
},
{
"enumerant" : "FPMaxErrorDecorationINTEL",
"value" : 6170,
"parameters" : [
{ "kind" : "LiteralFloat", "name" : "'Max Error'" }
],
"capabilities" : [ "FPMaxErrorINTEL" ],
"version" : "None"
},
{
"enumerant" : "LatencyControlLabelINTEL",
"value" : 6172,
@ -15271,6 +15280,12 @@
"extensions" : [ "SPV_INTEL_kernel_attributes" ],
"version" : "None"
},
{
"enumerant" : "FPMaxErrorINTEL",
"value" : 6169,
"extensions" : [ "SPV_INTEL_fp_max_error" ],
"version" : "None"
},
{
"enumerant" : "FPGALatencyControlINTEL",
"value" : 6171,
@ -15373,37 +15388,37 @@
"kind" : "CooperativeMatrixOperands",
"enumerants" : [
{
"enumerant" : "None",
"enumerant" : "NoneKHR",
"value" : "0x0000",
"capabilities" : [ "CooperativeMatrixKHR" ],
"version" : "None"
},
{
"enumerant" : "MatrixASignedComponents",
"enumerant" : "MatrixASignedComponentsKHR",
"value" : "0x0001",
"capabilities" : [ "CooperativeMatrixKHR" ],
"version" : "None"
},
{
"enumerant" : "MatrixBSignedComponents",
"enumerant" : "MatrixBSignedComponentsKHR",
"value" : "0x0002",
"capabilities" : [ "CooperativeMatrixKHR" ],
"version" : "None"
},
{
"enumerant" : "MatrixCSignedComponents",
"enumerant" : "MatrixCSignedComponentsKHR",
"value" : "0x0004",
"capabilities" : [ "CooperativeMatrixKHR" ],
"version" : "None"
},
{
"enumerant" : "MatrixResultSignedComponents",
"enumerant" : "MatrixResultSignedComponentsKHR",
"value" : "0x0008",
"capabilities" : [ "CooperativeMatrixKHR" ],
"version" : "None"
},
{
"enumerant" : "SaturatingAccumulation",
"enumerant" : "SaturatingAccumulationKHR",
"value" : "0x0010",
"capabilities" : [ "CooperativeMatrixKHR" ],
"version" : "None"

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@ -593,6 +593,7 @@ typedef enum SpvDecoration_ {
SpvDecorationSingleElementVectorINTEL = 6085,
SpvDecorationVectorComputeCallableFunctionINTEL = 6087,
SpvDecorationMediaBlockIOINTEL = 6140,
SpvDecorationFPMaxErrorDecorationINTEL = 6170,
SpvDecorationLatencyControlLabelINTEL = 6172,
SpvDecorationLatencyControlConstraintINTEL = 6173,
SpvDecorationConduitKernelArgumentINTEL = 6175,
@ -1173,6 +1174,7 @@ typedef enum SpvCapability_ {
SpvCapabilityBFloat16ConversionINTEL = 6115,
SpvCapabilitySplitBarrierINTEL = 6141,
SpvCapabilityFPGAKernelAttributesv2INTEL = 6161,
SpvCapabilityFPMaxErrorINTEL = 6169,
SpvCapabilityFPGALatencyControlINTEL = 6171,
SpvCapabilityFPGAArgumentInterfacesINTEL = 6174,
SpvCapabilityGroupUniformArithmeticKHR = 6400,
@ -1283,21 +1285,21 @@ typedef enum SpvPackedVectorFormat_ {
} SpvPackedVectorFormat;
typedef enum SpvCooperativeMatrixOperandsShift_ {
SpvCooperativeMatrixOperandsMatrixASignedComponentsShift = 0,
SpvCooperativeMatrixOperandsMatrixBSignedComponentsShift = 1,
SpvCooperativeMatrixOperandsMatrixCSignedComponentsShift = 2,
SpvCooperativeMatrixOperandsMatrixResultSignedComponentsShift = 3,
SpvCooperativeMatrixOperandsSaturatingAccumulationShift = 4,
SpvCooperativeMatrixOperandsMatrixASignedComponentsKHRShift = 0,
SpvCooperativeMatrixOperandsMatrixBSignedComponentsKHRShift = 1,
SpvCooperativeMatrixOperandsMatrixCSignedComponentsKHRShift = 2,
SpvCooperativeMatrixOperandsMatrixResultSignedComponentsKHRShift = 3,
SpvCooperativeMatrixOperandsSaturatingAccumulationKHRShift = 4,
SpvCooperativeMatrixOperandsMax = 0x7fffffff,
} SpvCooperativeMatrixOperandsShift;
typedef enum SpvCooperativeMatrixOperandsMask_ {
SpvCooperativeMatrixOperandsMaskNone = 0,
SpvCooperativeMatrixOperandsMatrixASignedComponentsMask = 0x00000001,
SpvCooperativeMatrixOperandsMatrixBSignedComponentsMask = 0x00000002,
SpvCooperativeMatrixOperandsMatrixCSignedComponentsMask = 0x00000004,
SpvCooperativeMatrixOperandsMatrixResultSignedComponentsMask = 0x00000008,
SpvCooperativeMatrixOperandsSaturatingAccumulationMask = 0x00000010,
SpvCooperativeMatrixOperandsMatrixASignedComponentsKHRMask = 0x00000001,
SpvCooperativeMatrixOperandsMatrixBSignedComponentsKHRMask = 0x00000002,
SpvCooperativeMatrixOperandsMatrixCSignedComponentsKHRMask = 0x00000004,
SpvCooperativeMatrixOperandsMatrixResultSignedComponentsKHRMask = 0x00000008,
SpvCooperativeMatrixOperandsSaturatingAccumulationKHRMask = 0x00000010,
} SpvCooperativeMatrixOperandsMask;
typedef enum SpvCooperativeMatrixLayout_ {

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@ -589,6 +589,7 @@ enum class Decoration : unsigned {
SingleElementVectorINTEL = 6085,
VectorComputeCallableFunctionINTEL = 6087,
MediaBlockIOINTEL = 6140,
FPMaxErrorDecorationINTEL = 6170,
LatencyControlLabelINTEL = 6172,
LatencyControlConstraintINTEL = 6173,
ConduitKernelArgumentINTEL = 6175,
@ -1169,6 +1170,7 @@ enum class Capability : unsigned {
BFloat16ConversionINTEL = 6115,
SplitBarrierINTEL = 6141,
FPGAKernelAttributesv2INTEL = 6161,
FPMaxErrorINTEL = 6169,
FPGALatencyControlINTEL = 6171,
FPGAArgumentInterfacesINTEL = 6174,
GroupUniformArithmeticKHR = 6400,
@ -1279,21 +1281,21 @@ enum class PackedVectorFormat : unsigned {
};
enum class CooperativeMatrixOperandsShift : unsigned {
MatrixASignedComponents = 0,
MatrixBSignedComponents = 1,
MatrixCSignedComponents = 2,
MatrixResultSignedComponents = 3,
SaturatingAccumulation = 4,
MatrixASignedComponentsKHR = 0,
MatrixBSignedComponentsKHR = 1,
MatrixCSignedComponentsKHR = 2,
MatrixResultSignedComponentsKHR = 3,
SaturatingAccumulationKHR = 4,
Max = 0x7fffffff,
};
enum class CooperativeMatrixOperandsMask : unsigned {
MaskNone = 0,
MatrixASignedComponents = 0x00000001,
MatrixBSignedComponents = 0x00000002,
MatrixCSignedComponents = 0x00000004,
MatrixResultSignedComponents = 0x00000008,
SaturatingAccumulation = 0x00000010,
MatrixASignedComponentsKHR = 0x00000001,
MatrixBSignedComponentsKHR = 0x00000002,
MatrixCSignedComponentsKHR = 0x00000004,
MatrixResultSignedComponentsKHR = 0x00000008,
SaturatingAccumulationKHR = 0x00000010,
};
enum class CooperativeMatrixLayout : unsigned {

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@ -615,6 +615,7 @@
"SingleElementVectorINTEL": 6085,
"VectorComputeCallableFunctionINTEL": 6087,
"MediaBlockIOINTEL": 6140,
"FPMaxErrorDecorationINTEL": 6170,
"LatencyControlLabelINTEL": 6172,
"LatencyControlConstraintINTEL": 6173,
"ConduitKernelArgumentINTEL": 6175,
@ -1149,6 +1150,7 @@
"BFloat16ConversionINTEL": 6115,
"SplitBarrierINTEL": 6141,
"FPGAKernelAttributesv2INTEL": 6161,
"FPMaxErrorINTEL": 6169,
"FPGALatencyControlINTEL": 6171,
"FPGAArgumentInterfacesINTEL": 6174,
"GroupUniformArithmeticKHR": 6400
@ -1269,11 +1271,11 @@
"Type": "Bit",
"Values":
{
"MatrixASignedComponents": 0,
"MatrixBSignedComponents": 1,
"MatrixCSignedComponents": 2,
"MatrixResultSignedComponents": 3,
"SaturatingAccumulation": 4
"MatrixASignedComponentsKHR": 0,
"MatrixBSignedComponentsKHR": 1,
"MatrixCSignedComponentsKHR": 2,
"MatrixResultSignedComponentsKHR": 3,
"SaturatingAccumulationKHR": 4
}
},
{