diff --git a/3rdparty/spirv-headers/include/spirv/unified1/spirv.core.grammar.json b/3rdparty/spirv-headers/include/spirv/unified1/spirv.core.grammar.json
index d0d9a363f..cd4cb5073 100644
--- a/3rdparty/spirv-headers/include/spirv/unified1/spirv.core.grammar.json
+++ b/3rdparty/spirv-headers/include/spirv/unified1/spirv.core.grammar.json
@@ -8573,6 +8573,118 @@
       ],
       "capabilities" : [ "SplitBarrierINTEL" ],
       "version" : "None"
+    },
+    {
+      "opname" : "OpGroupIMulKHR",
+      "class"  : "Group",
+      "opcode" : 6401,
+      "operands" : [
+        { "kind" : "IdResultType" },
+        { "kind" : "IdResult" },
+        { "kind" : "IdScope",        "name" : "'Execution'" },
+        { "kind" : "GroupOperation", "name" : "'Operation'" },
+        { "kind" : "IdRef",          "name" : "'X'" }
+      ],
+      "capabilities" : [ "GroupUniformArithmeticKHR" ],
+      "version" : "None"
+    },
+    {
+      "opname" : "OpGroupFMulKHR",
+      "class"  : "Group",
+      "opcode" : 6402,
+      "operands" : [
+        { "kind" : "IdResultType" },
+        { "kind" : "IdResult" },
+        { "kind" : "IdScope",        "name" : "'Execution'" },
+        { "kind" : "GroupOperation", "name" : "'Operation'" },
+        { "kind" : "IdRef",          "name" : "'X'" }
+      ],
+      "capabilities" : [ "GroupUniformArithmeticKHR" ],
+      "version" : "None"
+    },
+    {
+      "opname" : "OpGroupBitwiseAndKHR",
+      "class"  : "Group",
+      "opcode" : 6403,
+      "operands" : [
+        { "kind" : "IdResultType" },
+        { "kind" : "IdResult" },
+        { "kind" : "IdScope",        "name" : "'Execution'" },
+        { "kind" : "GroupOperation", "name" : "'Operation'" },
+        { "kind" : "IdRef",          "name" : "'X'" }
+      ],
+      "capabilities" : [ "GroupUniformArithmeticKHR" ],
+      "version" : "None"
+    },
+    {
+      "opname" : "OpGroupBitwiseOrKHR",
+      "class"  : "Group",
+      "opcode" : 6404,
+      "operands" : [
+        { "kind" : "IdResultType" },
+        { "kind" : "IdResult" },
+        { "kind" : "IdScope",        "name" : "'Execution'" },
+        { "kind" : "GroupOperation", "name" : "'Operation'" },
+        { "kind" : "IdRef",          "name" : "'X'" }
+      ],
+      "capabilities" : [ "GroupUniformArithmeticKHR" ],
+      "version" : "None"
+    },
+    {
+      "opname" : "OpGroupBitwiseXorKHR",
+      "class"  : "Group",
+      "opcode" : 6405,
+      "operands" : [
+        { "kind" : "IdResultType" },
+        { "kind" : "IdResult" },
+        { "kind" : "IdScope",        "name" : "'Execution'" },
+        { "kind" : "GroupOperation", "name" : "'Operation'" },
+        { "kind" : "IdRef",          "name" : "'X'" }
+      ],
+      "capabilities" : [ "GroupUniformArithmeticKHR" ],
+      "version" : "None"
+    },
+    {
+      "opname" : "OpGroupLogicalAndKHR",
+      "class"  : "Group",
+      "opcode" : 6406,
+      "operands" : [
+        { "kind" : "IdResultType" },
+        { "kind" : "IdResult" },
+        { "kind" : "IdScope",        "name" : "'Execution'" },
+        { "kind" : "GroupOperation", "name" : "'Operation'" },
+        { "kind" : "IdRef",          "name" : "'X'" }
+      ],
+      "capabilities" : [ "GroupUniformArithmeticKHR" ],
+      "version" : "None"
+    },
+    {
+      "opname" : "OpGroupLogicalOrKHR",
+      "class"  : "Group",
+      "opcode" : 6407,
+      "operands" : [
+        { "kind" : "IdResultType" },
+        { "kind" : "IdResult" },
+        { "kind" : "IdScope",        "name" : "'Execution'" },
+        { "kind" : "GroupOperation", "name" : "'Operation'" },
+        { "kind" : "IdRef",          "name" : "'X'" }
+      ],
+      "capabilities" : [ "GroupUniformArithmeticKHR" ],
+      "version" : "None"
+    },
+    {
+      "opname" : "OpGroupLogicalXorKHR",
+      "class"  : "Group",
+      "opcode" : 6408,
+      "operands" : [
+        { "kind" : "IdResultType" },
+        { "kind" : "IdResult" },
+        { "kind" : "IdScope",        "name" : "'Execution'" },
+        { "kind" : "GroupOperation", "name" : "'Operation'" },
+        { "kind" : "IdRef",          "name" : "'X'" }
+      ],
+      "capabilities" : [ "GroupUniformArithmeticKHR" ],
+      "version" : "None"
     }
   ],
   "operand_kinds" : [
@@ -13911,6 +14023,12 @@
           "value" : 6141,
           "extensions" : [ "SPV_INTEL_split_barrier" ],
           "version" : "None"
+        },
+        {
+          "enumerant" : "GroupUniformArithmeticKHR",
+          "value" : 6400,
+          "extensions" : [ "SPV_KHR_uniform_group_instructions"],
+          "version" : "None"
         }
       ]
     },
diff --git a/3rdparty/spirv-headers/include/spirv/unified1/spirv.cs b/3rdparty/spirv-headers/include/spirv/unified1/spirv.cs
index 53821a3de..eb379a371 100644
--- a/3rdparty/spirv-headers/include/spirv/unified1/spirv.cs
+++ b/3rdparty/spirv-headers/include/spirv/unified1/spirv.cs
@@ -1088,6 +1088,7 @@ namespace Spv
             AtomicFloat16AddEXT = 6095,
             DebugInfoModuleINTEL = 6114,
             SplitBarrierINTEL = 6141,
+            GroupUniformArithmeticKHR = 6400,
         }
 
         public enum RayFlagsShift
@@ -1854,6 +1855,14 @@ namespace Spv
             OpSpecConstantCompositeContinuedINTEL = 6092,
             OpControlBarrierArriveINTEL = 6142,
             OpControlBarrierWaitINTEL = 6143,
+            OpGroupIMulKHR = 6401,
+            OpGroupFMulKHR = 6402,
+            OpGroupBitwiseAndKHR = 6403,
+            OpGroupBitwiseOrKHR = 6404,
+            OpGroupBitwiseXorKHR = 6405,
+            OpGroupLogicalAndKHR = 6406,
+            OpGroupLogicalOrKHR = 6407,
+            OpGroupLogicalXorKHR = 6408,
         }
     }
 }
diff --git a/3rdparty/spirv-headers/include/spirv/unified1/spirv.h b/3rdparty/spirv-headers/include/spirv/unified1/spirv.h
index 2b6b35f82..4ff2d530a 100644
--- a/3rdparty/spirv-headers/include/spirv/unified1/spirv.h
+++ b/3rdparty/spirv-headers/include/spirv/unified1/spirv.h
@@ -1088,6 +1088,7 @@ typedef enum SpvCapability_ {
     SpvCapabilityAtomicFloat16AddEXT = 6095,
     SpvCapabilityDebugInfoModuleINTEL = 6114,
     SpvCapabilitySplitBarrierINTEL = 6141,
+    SpvCapabilityGroupUniformArithmeticKHR = 6400,
     SpvCapabilityMax = 0x7fffffff,
 } SpvCapability;
 
@@ -1852,6 +1853,14 @@ typedef enum SpvOp_ {
     SpvOpSpecConstantCompositeContinuedINTEL = 6092,
     SpvOpControlBarrierArriveINTEL = 6142,
     SpvOpControlBarrierWaitINTEL = 6143,
+    SpvOpGroupIMulKHR = 6401,
+    SpvOpGroupFMulKHR = 6402,
+    SpvOpGroupBitwiseAndKHR = 6403,
+    SpvOpGroupBitwiseOrKHR = 6404,
+    SpvOpGroupBitwiseXorKHR = 6405,
+    SpvOpGroupLogicalAndKHR = 6406,
+    SpvOpGroupLogicalOrKHR = 6407,
+    SpvOpGroupLogicalXorKHR = 6408,
     SpvOpMax = 0x7fffffff,
 } SpvOp;
 
@@ -2511,6 +2520,14 @@ inline void SpvHasResultAndType(SpvOp opcode, bool *hasResult, bool *hasResultTy
     case SpvOpSpecConstantCompositeContinuedINTEL: *hasResult = false; *hasResultType = false; break;
     case SpvOpControlBarrierArriveINTEL: *hasResult = false; *hasResultType = false; break;
     case SpvOpControlBarrierWaitINTEL: *hasResult = false; *hasResultType = false; break;
+    case SpvOpGroupIMulKHR: *hasResult = true; *hasResultType = true; break;
+    case SpvOpGroupFMulKHR: *hasResult = true; *hasResultType = true; break;
+    case SpvOpGroupBitwiseAndKHR: *hasResult = true; *hasResultType = true; break;
+    case SpvOpGroupBitwiseOrKHR: *hasResult = true; *hasResultType = true; break;
+    case SpvOpGroupBitwiseXorKHR: *hasResult = true; *hasResultType = true; break;
+    case SpvOpGroupLogicalAndKHR: *hasResult = true; *hasResultType = true; break;
+    case SpvOpGroupLogicalOrKHR: *hasResult = true; *hasResultType = true; break;
+    case SpvOpGroupLogicalXorKHR: *hasResult = true; *hasResultType = true; break;
     }
 }
 #endif /* SPV_ENABLE_UTILITY_CODE */
diff --git a/3rdparty/spirv-headers/include/spirv/unified1/spirv.hpp b/3rdparty/spirv-headers/include/spirv/unified1/spirv.hpp
index 08eae15e2..9777bd352 100644
--- a/3rdparty/spirv-headers/include/spirv/unified1/spirv.hpp
+++ b/3rdparty/spirv-headers/include/spirv/unified1/spirv.hpp
@@ -1084,6 +1084,7 @@ enum Capability {
     CapabilityAtomicFloat16AddEXT = 6095,
     CapabilityDebugInfoModuleINTEL = 6114,
     CapabilitySplitBarrierINTEL = 6141,
+    CapabilityGroupUniformArithmeticKHR = 6400,
     CapabilityMax = 0x7fffffff,
 };
 
@@ -1848,6 +1849,14 @@ enum Op {
     OpSpecConstantCompositeContinuedINTEL = 6092,
     OpControlBarrierArriveINTEL = 6142,
     OpControlBarrierWaitINTEL = 6143,
+    OpGroupIMulKHR = 6401,
+    OpGroupFMulKHR = 6402,
+    OpGroupBitwiseAndKHR = 6403,
+    OpGroupBitwiseOrKHR = 6404,
+    OpGroupBitwiseXorKHR = 6405,
+    OpGroupLogicalAndKHR = 6406,
+    OpGroupLogicalOrKHR = 6407,
+    OpGroupLogicalXorKHR = 6408,
     OpMax = 0x7fffffff,
 };
 
@@ -2507,6 +2516,14 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
     case OpSpecConstantCompositeContinuedINTEL: *hasResult = false; *hasResultType = false; break;
     case OpControlBarrierArriveINTEL: *hasResult = false; *hasResultType = false; break;
     case OpControlBarrierWaitINTEL: *hasResult = false; *hasResultType = false; break;
+    case OpGroupIMulKHR: *hasResult = true; *hasResultType = true; break;
+    case OpGroupFMulKHR: *hasResult = true; *hasResultType = true; break;
+    case OpGroupBitwiseAndKHR: *hasResult = true; *hasResultType = true; break;
+    case OpGroupBitwiseOrKHR: *hasResult = true; *hasResultType = true; break;
+    case OpGroupBitwiseXorKHR: *hasResult = true; *hasResultType = true; break;
+    case OpGroupLogicalAndKHR: *hasResult = true; *hasResultType = true; break;
+    case OpGroupLogicalOrKHR: *hasResult = true; *hasResultType = true; break;
+    case OpGroupLogicalXorKHR: *hasResult = true; *hasResultType = true; break;
     }
 }
 #endif /* SPV_ENABLE_UTILITY_CODE */
diff --git a/3rdparty/spirv-headers/include/spirv/unified1/spirv.hpp11 b/3rdparty/spirv-headers/include/spirv/unified1/spirv.hpp11
index d203289f3..96c53f262 100644
--- a/3rdparty/spirv-headers/include/spirv/unified1/spirv.hpp11
+++ b/3rdparty/spirv-headers/include/spirv/unified1/spirv.hpp11
@@ -1084,6 +1084,7 @@ enum class Capability : unsigned {
     AtomicFloat16AddEXT = 6095,
     DebugInfoModuleINTEL = 6114,
     SplitBarrierINTEL = 6141,
+    GroupUniformArithmeticKHR = 6400,
     Max = 0x7fffffff,
 };
 
@@ -1848,6 +1849,14 @@ enum class Op : unsigned {
     OpSpecConstantCompositeContinuedINTEL = 6092,
     OpControlBarrierArriveINTEL = 6142,
     OpControlBarrierWaitINTEL = 6143,
+    OpGroupIMulKHR = 6401,
+    OpGroupFMulKHR = 6402,
+    OpGroupBitwiseAndKHR = 6403,
+    OpGroupBitwiseOrKHR = 6404,
+    OpGroupBitwiseXorKHR = 6405,
+    OpGroupLogicalAndKHR = 6406,
+    OpGroupLogicalOrKHR = 6407,
+    OpGroupLogicalXorKHR = 6408,
     Max = 0x7fffffff,
 };
 
@@ -2507,6 +2516,14 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
     case Op::OpSpecConstantCompositeContinuedINTEL: *hasResult = false; *hasResultType = false; break;
     case Op::OpControlBarrierArriveINTEL: *hasResult = false; *hasResultType = false; break;
     case Op::OpControlBarrierWaitINTEL: *hasResult = false; *hasResultType = false; break;
+    case Op::OpGroupIMulKHR: *hasResult = true; *hasResultType = true; break;
+    case Op::OpGroupFMulKHR: *hasResult = true; *hasResultType = true; break;
+    case Op::OpGroupBitwiseAndKHR: *hasResult = true; *hasResultType = true; break;
+    case Op::OpGroupBitwiseOrKHR: *hasResult = true; *hasResultType = true; break;
+    case Op::OpGroupBitwiseXorKHR: *hasResult = true; *hasResultType = true; break;
+    case Op::OpGroupLogicalAndKHR: *hasResult = true; *hasResultType = true; break;
+    case Op::OpGroupLogicalOrKHR: *hasResult = true; *hasResultType = true; break;
+    case Op::OpGroupLogicalXorKHR: *hasResult = true; *hasResultType = true; break;
     }
 }
 #endif /* SPV_ENABLE_UTILITY_CODE */
diff --git a/3rdparty/spirv-headers/include/spirv/unified1/spirv.json b/3rdparty/spirv-headers/include/spirv/unified1/spirv.json
index 33ba1f385..aabc32db7 100644
--- a/3rdparty/spirv-headers/include/spirv/unified1/spirv.json
+++ b/3rdparty/spirv-headers/include/spirv/unified1/spirv.json
@@ -1065,7 +1065,8 @@
                     "OptNoneINTEL": 6094,
                     "AtomicFloat16AddEXT": 6095,
                     "DebugInfoModuleINTEL": 6114,
-                    "SplitBarrierINTEL": 6141
+                    "SplitBarrierINTEL": 6141,
+                    "GroupUniformArithmeticKHR": 6400
                 }
             },
             {
@@ -1840,7 +1841,15 @@
                     "OpConstantCompositeContinuedINTEL": 6091,
                     "OpSpecConstantCompositeContinuedINTEL": 6092,
                     "OpControlBarrierArriveINTEL": 6142,
-                    "OpControlBarrierWaitINTEL": 6143
+                    "OpControlBarrierWaitINTEL": 6143,
+                    "OpGroupIMulKHR": 6401,
+                    "OpGroupFMulKHR": 6402,
+                    "OpGroupBitwiseAndKHR": 6403,
+                    "OpGroupBitwiseOrKHR": 6404,
+                    "OpGroupBitwiseXorKHR": 6405,
+                    "OpGroupLogicalAndKHR": 6406,
+                    "OpGroupLogicalOrKHR": 6407,
+                    "OpGroupLogicalXorKHR": 6408
                 }
             }
         ]
diff --git a/3rdparty/spirv-headers/include/spirv/unified1/spirv.lua b/3rdparty/spirv-headers/include/spirv/unified1/spirv.lua
index 4e4dc8466..235f1bf9c 100644
--- a/3rdparty/spirv-headers/include/spirv/unified1/spirv.lua
+++ b/3rdparty/spirv-headers/include/spirv/unified1/spirv.lua
@@ -1046,6 +1046,7 @@ spv = {
         AtomicFloat16AddEXT = 6095,
         DebugInfoModuleINTEL = 6114,
         SplitBarrierINTEL = 6141,
+        GroupUniformArithmeticKHR = 6400,
     },
 
     RayFlagsShift = {
@@ -1799,6 +1800,14 @@ spv = {
         OpSpecConstantCompositeContinuedINTEL = 6092,
         OpControlBarrierArriveINTEL = 6142,
         OpControlBarrierWaitINTEL = 6143,
+        OpGroupIMulKHR = 6401,
+        OpGroupFMulKHR = 6402,
+        OpGroupBitwiseAndKHR = 6403,
+        OpGroupBitwiseOrKHR = 6404,
+        OpGroupBitwiseXorKHR = 6405,
+        OpGroupLogicalAndKHR = 6406,
+        OpGroupLogicalOrKHR = 6407,
+        OpGroupLogicalXorKHR = 6408,
     },
 
 }
diff --git a/3rdparty/spirv-headers/include/spirv/unified1/spirv.py b/3rdparty/spirv-headers/include/spirv/unified1/spirv.py
index 47e7c4c31..1c1577742 100644
--- a/3rdparty/spirv-headers/include/spirv/unified1/spirv.py
+++ b/3rdparty/spirv-headers/include/spirv/unified1/spirv.py
@@ -1046,6 +1046,7 @@ spv = {
         'AtomicFloat16AddEXT' : 6095,
         'DebugInfoModuleINTEL' : 6114,
         'SplitBarrierINTEL' : 6141,
+        'GroupUniformArithmeticKHR' : 6400,
     },
 
     'RayFlagsShift' : {
@@ -1799,6 +1800,14 @@ spv = {
         'OpSpecConstantCompositeContinuedINTEL' : 6092,
         'OpControlBarrierArriveINTEL' : 6142,
         'OpControlBarrierWaitINTEL' : 6143,
+        'OpGroupIMulKHR' : 6401,
+        'OpGroupFMulKHR' : 6402,
+        'OpGroupBitwiseAndKHR' : 6403,
+        'OpGroupBitwiseOrKHR' : 6404,
+        'OpGroupBitwiseXorKHR' : 6405,
+        'OpGroupLogicalAndKHR' : 6406,
+        'OpGroupLogicalOrKHR' : 6407,
+        'OpGroupLogicalXorKHR' : 6408,
     },
 
 }
diff --git a/3rdparty/spirv-headers/include/spirv/unified1/spv.d b/3rdparty/spirv-headers/include/spirv/unified1/spv.d
index 6cd26ce17..5ea5179da 100644
--- a/3rdparty/spirv-headers/include/spirv/unified1/spv.d
+++ b/3rdparty/spirv-headers/include/spirv/unified1/spv.d
@@ -1091,6 +1091,7 @@ enum Capability : uint
     AtomicFloat16AddEXT = 6095,
     DebugInfoModuleINTEL = 6114,
     SplitBarrierINTEL = 6141,
+    GroupUniformArithmeticKHR = 6400,
 }
 
 enum RayFlagsShift : uint
@@ -1857,6 +1858,14 @@ enum Op : uint
     OpSpecConstantCompositeContinuedINTEL = 6092,
     OpControlBarrierArriveINTEL = 6142,
     OpControlBarrierWaitINTEL = 6143,
+    OpGroupIMulKHR = 6401,
+    OpGroupFMulKHR = 6402,
+    OpGroupBitwiseAndKHR = 6403,
+    OpGroupBitwiseOrKHR = 6404,
+    OpGroupBitwiseXorKHR = 6405,
+    OpGroupLogicalAndKHR = 6406,
+    OpGroupLogicalOrKHR = 6407,
+    OpGroupLogicalXorKHR = 6408,
 }