Updated spirv-headers.
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parent
0c8292f2af
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@ -13567,34 +13567,6 @@
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"capabilities" : [ "VectorComputeINTEL" ],
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"capabilities" : [ "VectorComputeINTEL" ],
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"version" : "None"
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"version" : "None"
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},
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},
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{
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"enumerant" : "InitModeINTEL",
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"value" : 6147,
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"parameters": [
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{ "kind" : "InitializationModeQualifier", "name" : "'Trigger'" }
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],
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"capabilities" : [ "GlobalVariableFPGADecorationsINTEL" ],
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"version" : "None"
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},
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{
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"enumerant" : "ImplementInRegisterMapINTEL",
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"value" : 6148,
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"parameters": [
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{ "kind" : "LiteralInteger", "name" : "Value" }
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],
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"capabilities" : [ "GlobalVariableFPGADecorationsINTEL" ],
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"version" : "None"
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},
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{
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"enumerant" : "HostAccessINTEL",
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"value" : 6168,
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"parameters": [
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{ "kind" : "HostAccessQualifier", "name" : "'Access'" },
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{ "kind" : "LiteralString", "name" : "'Name'" }
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],
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"capabilities" : [ "GlobalVariableHostAccessINTEL" ],
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"version" : "None"
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},
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{
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{
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"enumerant" : "FPMaxErrorDecorationINTEL",
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"enumerant" : "FPMaxErrorDecorationINTEL",
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"value" : 6170,
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"value" : 6170,
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@ -13696,6 +13668,34 @@
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"capabilities" : [ "FPGAArgumentInterfacesINTEL" ],
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"capabilities" : [ "FPGAArgumentInterfacesINTEL" ],
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"version" : "None"
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"version" : "None"
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},
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},
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{
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"enumerant" : "HostAccessINTEL",
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"value" : 6188,
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"parameters": [
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{ "kind" : "HostAccessQualifier", "name" : "'Access'" },
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{ "kind" : "LiteralString", "name" : "'Name'" }
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],
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"capabilities" : [ "GlobalVariableHostAccessINTEL" ],
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"version" : "None"
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},
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{
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"enumerant" : "InitModeINTEL",
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"value" : 6190,
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"parameters": [
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{ "kind" : "InitializationModeQualifier", "name" : "'Trigger'" }
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],
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"capabilities" : [ "GlobalVariableFPGADecorationsINTEL" ],
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"version" : "None"
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},
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{
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"enumerant" : "ImplementInRegisterMapINTEL",
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"value" : 6191,
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"parameters": [
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{ "kind" : "LiteralInteger", "name" : "Value" }
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],
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"capabilities" : [ "GlobalVariableFPGADecorationsINTEL" ],
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"version" : "None"
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},
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{
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{
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"enumerant" : "CacheControlLoadINTEL",
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"enumerant" : "CacheControlLoadINTEL",
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"value" : 6442,
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"value" : 6442,
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@ -15213,7 +15213,7 @@
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{
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{
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"enumerant" : "WorkgroupMemoryExplicitLayout16BitAccessKHR",
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"enumerant" : "WorkgroupMemoryExplicitLayout16BitAccessKHR",
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"value" : 4430,
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"value" : 4430,
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"capabilities" : [ "Shader" ],
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"capabilities" : [ "WorkgroupMemoryExplicitLayoutKHR" ],
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"extensions" : [ "SPV_KHR_workgroup_memory_explicit_layout" ],
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"extensions" : [ "SPV_KHR_workgroup_memory_explicit_layout" ],
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"version" : "None"
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"version" : "None"
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},
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},
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@ -16259,12 +16259,6 @@
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"extensions" : [ "SPV_INTEL_split_barrier" ],
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"extensions" : [ "SPV_INTEL_split_barrier" ],
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"version" : "None"
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"version" : "None"
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},
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},
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{
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"enumerant" : "GlobalVariableFPGADecorationsINTEL",
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"value" : 6146,
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"extensions": [ "SPV_INTEL_global_variable_fpga_decorations" ],
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"version" : "None"
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},
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{
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{
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"enumerant" : "FPGAKernelAttributesv2INTEL",
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"enumerant" : "FPGAKernelAttributesv2INTEL",
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"value" : 6161,
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"value" : 6161,
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@ -16272,12 +16266,6 @@
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"extensions" : [ "SPV_INTEL_kernel_attributes" ],
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"extensions" : [ "SPV_INTEL_kernel_attributes" ],
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"version" : "None"
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"version" : "None"
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},
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},
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{
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"enumerant" : "GlobalVariableHostAccessINTEL",
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"value" : 6167,
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"extensions": [ "SPV_INTEL_global_variable_host_access" ],
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"version" : "None"
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},
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{
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{
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"enumerant" : "FPMaxErrorINTEL",
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"enumerant" : "FPMaxErrorINTEL",
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"value" : 6169,
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"value" : 6169,
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@ -16296,6 +16284,18 @@
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"extensions" : [ "SPV_INTEL_fpga_argument_interfaces" ],
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"extensions" : [ "SPV_INTEL_fpga_argument_interfaces" ],
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"version" : "None"
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"version" : "None"
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},
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},
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{
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"enumerant" : "GlobalVariableHostAccessINTEL",
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"value" : 6187,
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"extensions": [ "SPV_INTEL_global_variable_host_access" ],
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"version" : "None"
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},
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{
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"enumerant" : "GlobalVariableFPGADecorationsINTEL",
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"value" : 6189,
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"extensions": [ "SPV_INTEL_global_variable_fpga_decorations" ],
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"version" : "None"
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},
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{
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{
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"enumerant" : "GroupUniformArithmeticKHR",
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"enumerant" : "GroupUniformArithmeticKHR",
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"value" : 6400,
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"value" : 6400,
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@ -608,9 +608,6 @@ typedef enum SpvDecoration_ {
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SpvDecorationSingleElementVectorINTEL = 6085,
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SpvDecorationSingleElementVectorINTEL = 6085,
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SpvDecorationVectorComputeCallableFunctionINTEL = 6087,
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SpvDecorationVectorComputeCallableFunctionINTEL = 6087,
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SpvDecorationMediaBlockIOINTEL = 6140,
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SpvDecorationMediaBlockIOINTEL = 6140,
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SpvDecorationInitModeINTEL = 6147,
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SpvDecorationImplementInRegisterMapINTEL = 6148,
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SpvDecorationHostAccessINTEL = 6168,
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SpvDecorationFPMaxErrorDecorationINTEL = 6170,
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SpvDecorationFPMaxErrorDecorationINTEL = 6170,
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SpvDecorationLatencyControlLabelINTEL = 6172,
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SpvDecorationLatencyControlLabelINTEL = 6172,
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SpvDecorationLatencyControlConstraintINTEL = 6173,
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SpvDecorationLatencyControlConstraintINTEL = 6173,
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@ -623,6 +620,9 @@ typedef enum SpvDecoration_ {
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SpvDecorationMMHostInterfaceMaxBurstINTEL = 6181,
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SpvDecorationMMHostInterfaceMaxBurstINTEL = 6181,
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SpvDecorationMMHostInterfaceWaitRequestINTEL = 6182,
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SpvDecorationMMHostInterfaceWaitRequestINTEL = 6182,
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SpvDecorationStableKernelArgumentINTEL = 6183,
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SpvDecorationStableKernelArgumentINTEL = 6183,
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SpvDecorationHostAccessINTEL = 6188,
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SpvDecorationInitModeINTEL = 6190,
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SpvDecorationImplementInRegisterMapINTEL = 6191,
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SpvDecorationCacheControlLoadINTEL = 6442,
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SpvDecorationCacheControlLoadINTEL = 6442,
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SpvDecorationCacheControlStoreINTEL = 6443,
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SpvDecorationCacheControlStoreINTEL = 6443,
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SpvDecorationMax = 0x7fffffff,
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SpvDecorationMax = 0x7fffffff,
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@ -1202,12 +1202,12 @@ typedef enum SpvCapability_ {
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SpvCapabilityDebugInfoModuleINTEL = 6114,
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SpvCapabilityDebugInfoModuleINTEL = 6114,
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SpvCapabilityBFloat16ConversionINTEL = 6115,
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SpvCapabilityBFloat16ConversionINTEL = 6115,
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SpvCapabilitySplitBarrierINTEL = 6141,
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SpvCapabilitySplitBarrierINTEL = 6141,
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SpvCapabilityGlobalVariableFPGADecorationsINTEL = 6146,
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SpvCapabilityFPGAKernelAttributesv2INTEL = 6161,
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SpvCapabilityFPGAKernelAttributesv2INTEL = 6161,
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SpvCapabilityGlobalVariableHostAccessINTEL = 6167,
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SpvCapabilityFPMaxErrorINTEL = 6169,
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SpvCapabilityFPMaxErrorINTEL = 6169,
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SpvCapabilityFPGALatencyControlINTEL = 6171,
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SpvCapabilityFPGALatencyControlINTEL = 6171,
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SpvCapabilityFPGAArgumentInterfacesINTEL = 6174,
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SpvCapabilityFPGAArgumentInterfacesINTEL = 6174,
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SpvCapabilityGlobalVariableHostAccessINTEL = 6187,
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SpvCapabilityGlobalVariableFPGADecorationsINTEL = 6189,
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SpvCapabilityGroupUniformArithmeticKHR = 6400,
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SpvCapabilityGroupUniformArithmeticKHR = 6400,
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SpvCapabilityCacheControlsINTEL = 6441,
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SpvCapabilityCacheControlsINTEL = 6441,
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SpvCapabilityMax = 0x7fffffff,
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SpvCapabilityMax = 0x7fffffff,
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@ -604,9 +604,6 @@ enum class Decoration : unsigned {
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SingleElementVectorINTEL = 6085,
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SingleElementVectorINTEL = 6085,
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VectorComputeCallableFunctionINTEL = 6087,
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VectorComputeCallableFunctionINTEL = 6087,
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MediaBlockIOINTEL = 6140,
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MediaBlockIOINTEL = 6140,
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InitModeINTEL = 6147,
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ImplementInRegisterMapINTEL = 6148,
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HostAccessINTEL = 6168,
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FPMaxErrorDecorationINTEL = 6170,
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FPMaxErrorDecorationINTEL = 6170,
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LatencyControlLabelINTEL = 6172,
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LatencyControlLabelINTEL = 6172,
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LatencyControlConstraintINTEL = 6173,
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LatencyControlConstraintINTEL = 6173,
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@ -619,6 +616,9 @@ enum class Decoration : unsigned {
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MMHostInterfaceMaxBurstINTEL = 6181,
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MMHostInterfaceMaxBurstINTEL = 6181,
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MMHostInterfaceWaitRequestINTEL = 6182,
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MMHostInterfaceWaitRequestINTEL = 6182,
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StableKernelArgumentINTEL = 6183,
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StableKernelArgumentINTEL = 6183,
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HostAccessINTEL = 6188,
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InitModeINTEL = 6190,
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ImplementInRegisterMapINTEL = 6191,
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CacheControlLoadINTEL = 6442,
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CacheControlLoadINTEL = 6442,
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CacheControlStoreINTEL = 6443,
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CacheControlStoreINTEL = 6443,
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Max = 0x7fffffff,
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Max = 0x7fffffff,
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@ -1198,12 +1198,12 @@ enum class Capability : unsigned {
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DebugInfoModuleINTEL = 6114,
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DebugInfoModuleINTEL = 6114,
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BFloat16ConversionINTEL = 6115,
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BFloat16ConversionINTEL = 6115,
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SplitBarrierINTEL = 6141,
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SplitBarrierINTEL = 6141,
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GlobalVariableFPGADecorationsINTEL = 6146,
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FPGAKernelAttributesv2INTEL = 6161,
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FPGAKernelAttributesv2INTEL = 6161,
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GlobalVariableHostAccessINTEL = 6167,
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FPMaxErrorINTEL = 6169,
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FPMaxErrorINTEL = 6169,
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FPGALatencyControlINTEL = 6171,
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FPGALatencyControlINTEL = 6171,
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FPGAArgumentInterfacesINTEL = 6174,
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FPGAArgumentInterfacesINTEL = 6174,
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GlobalVariableHostAccessINTEL = 6187,
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GlobalVariableFPGADecorationsINTEL = 6189,
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GroupUniformArithmeticKHR = 6400,
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GroupUniformArithmeticKHR = 6400,
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CacheControlsINTEL = 6441,
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CacheControlsINTEL = 6441,
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Max = 0x7fffffff,
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Max = 0x7fffffff,
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@ -630,9 +630,6 @@
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"SingleElementVectorINTEL": 6085,
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"SingleElementVectorINTEL": 6085,
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"VectorComputeCallableFunctionINTEL": 6087,
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"VectorComputeCallableFunctionINTEL": 6087,
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"MediaBlockIOINTEL": 6140,
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"MediaBlockIOINTEL": 6140,
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"InitModeINTEL": 6147,
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"ImplementInRegisterMapINTEL": 6148,
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"HostAccessINTEL": 6168,
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"FPMaxErrorDecorationINTEL": 6170,
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"FPMaxErrorDecorationINTEL": 6170,
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"LatencyControlLabelINTEL": 6172,
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"LatencyControlLabelINTEL": 6172,
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"LatencyControlConstraintINTEL": 6173,
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"LatencyControlConstraintINTEL": 6173,
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@ -645,6 +642,9 @@
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"MMHostInterfaceMaxBurstINTEL": 6181,
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"MMHostInterfaceMaxBurstINTEL": 6181,
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"MMHostInterfaceWaitRequestINTEL": 6182,
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"MMHostInterfaceWaitRequestINTEL": 6182,
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"StableKernelArgumentINTEL": 6183,
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"StableKernelArgumentINTEL": 6183,
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"HostAccessINTEL": 6188,
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"InitModeINTEL": 6190,
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"ImplementInRegisterMapINTEL": 6191,
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"CacheControlLoadINTEL": 6442,
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"CacheControlLoadINTEL": 6442,
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"CacheControlStoreINTEL": 6443
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"CacheControlStoreINTEL": 6443
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}
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}
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@ -1178,12 +1178,12 @@
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"DebugInfoModuleINTEL": 6114,
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"DebugInfoModuleINTEL": 6114,
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"BFloat16ConversionINTEL": 6115,
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"BFloat16ConversionINTEL": 6115,
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"SplitBarrierINTEL": 6141,
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"SplitBarrierINTEL": 6141,
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"GlobalVariableFPGADecorationsINTEL": 6146,
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"FPGAKernelAttributesv2INTEL": 6161,
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"FPGAKernelAttributesv2INTEL": 6161,
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"GlobalVariableHostAccessINTEL": 6167,
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"FPMaxErrorINTEL": 6169,
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"FPMaxErrorINTEL": 6169,
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"FPGALatencyControlINTEL": 6171,
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"FPGALatencyControlINTEL": 6171,
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"FPGAArgumentInterfacesINTEL": 6174,
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"FPGAArgumentInterfacesINTEL": 6174,
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"GlobalVariableHostAccessINTEL": 6187,
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"GlobalVariableFPGADecorationsINTEL": 6189,
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"GroupUniformArithmeticKHR": 6400,
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"GroupUniformArithmeticKHR": 6400,
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"CacheControlsINTEL": 6441
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"CacheControlsINTEL": 6441
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}
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}
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