2019-01-10 06:23:47 +03:00
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/*
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2021-01-16 07:33:57 +03:00
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* Copyright 2016-2021 Arm Limited
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2021-07-27 03:38:51 +03:00
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* SPDX-License-Identifier: Apache-2.0 OR MIT
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2019-01-10 06:23:47 +03:00
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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2020-12-06 06:13:26 +03:00
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/*
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* At your option, you may choose to accept this material under either:
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* 1. The Apache License, Version 2.0, found at <http://www.apache.org/licenses/LICENSE-2.0>, or
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* 2. The MIT License, found at <http://opensource.org/licenses/MIT>.
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*/
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2019-01-10 06:23:47 +03:00
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#include "spirv_cfg.hpp"
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#include "spirv_cross.hpp"
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#include <algorithm>
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#include <assert.h>
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using namespace std;
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2019-03-31 07:03:28 +03:00
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namespace SPIRV_CROSS_NAMESPACE
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2019-01-10 06:23:47 +03:00
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{
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CFG::CFG(Compiler &compiler_, const SPIRFunction &func_)
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: compiler(compiler_)
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, func(func_)
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{
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build_post_order_visit_order();
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build_immediate_dominators();
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}
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uint32_t CFG::find_common_dominator(uint32_t a, uint32_t b) const
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{
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while (a != b)
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{
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2019-01-17 05:50:01 +03:00
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if (get_visit_order(a) < get_visit_order(b))
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a = get_immediate_dominator(a);
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2019-01-10 06:23:47 +03:00
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else
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2019-01-17 05:50:01 +03:00
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b = get_immediate_dominator(b);
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2019-01-10 06:23:47 +03:00
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}
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return a;
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}
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void CFG::build_immediate_dominators()
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{
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// Traverse the post-order in reverse and build up the immediate dominator tree.
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2019-01-17 05:50:01 +03:00
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immediate_dominators.clear();
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2019-01-10 06:23:47 +03:00
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immediate_dominators[func.entry_block] = func.entry_block;
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for (auto i = post_order.size(); i; i--)
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{
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uint32_t block = post_order[i - 1];
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auto &pred = preceding_edges[block];
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if (pred.empty()) // This is for the entry block, but we've already set up the dominators.
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continue;
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for (auto &edge : pred)
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{
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if (immediate_dominators[block])
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{
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assert(immediate_dominators[edge]);
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2019-10-26 18:03:21 +03:00
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immediate_dominators[block] = find_common_dominator(immediate_dominators[block], edge);
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2019-01-10 06:23:47 +03:00
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}
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else
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immediate_dominators[block] = edge;
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}
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}
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}
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bool CFG::is_back_edge(uint32_t to) const
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{
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// We have a back edge if the visit order is set with the temporary magic value 0.
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// Crossing edges will have already been recorded with a visit order.
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2019-01-17 05:50:01 +03:00
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auto itr = visit_order.find(to);
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2019-07-03 18:10:12 +03:00
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return itr != end(visit_order) && itr->second.get() == 0;
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}
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bool CFG::has_visited_forward_edge(uint32_t to) const
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{
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// If > 0, we have visited the edge already, and this is not a back edge branch.
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auto itr = visit_order.find(to);
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return itr != end(visit_order) && itr->second.get() > 0;
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2019-01-10 06:23:47 +03:00
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}
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bool CFG::post_order_visit(uint32_t block_id)
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{
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// If we have already branched to this block (back edge), stop recursion.
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// If our branches are back-edges, we do not record them.
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// We have to record crossing edges however.
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2019-07-03 18:10:12 +03:00
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if (has_visited_forward_edge(block_id))
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return true;
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else if (is_back_edge(block_id))
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return false;
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2019-01-10 06:23:47 +03:00
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// Block back-edges from recursively revisiting ourselves.
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2019-01-17 05:50:01 +03:00
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visit_order[block_id].get() = 0;
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2019-01-10 06:23:47 +03:00
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auto &block = compiler.get<SPIRBlock>(block_id);
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2019-09-02 08:06:03 +03:00
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// If this is a loop header, add an implied branch to the merge target.
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// This is needed to avoid annoying cases with do { ... } while(false) loops often generated by inliners.
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// To the CFG, this is linear control flow, but we risk picking the do/while scope as our dominating block.
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// This makes sure that if we are accessing a variable outside the do/while, we choose the loop header as dominator.
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// We could use has_visited_forward_edge, but this break code-gen where the merge block is unreachable in the CFG.
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// Make a point out of visiting merge target first. This is to make sure that post visit order outside the loop
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// is lower than inside the loop, which is going to be key for some traversal algorithms like post-dominance analysis.
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// For selection constructs true/false blocks will end up visiting the merge block directly and it works out fine,
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// but for loops, only the header might end up actually branching to merge block.
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if (block.merge == SPIRBlock::MergeLoop && post_order_visit(block.merge_block))
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add_branch(block_id, block.merge_block);
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// First visit our branch targets.
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2019-01-10 06:23:47 +03:00
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switch (block.terminator)
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{
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case SPIRBlock::Direct:
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if (post_order_visit(block.next_block))
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add_branch(block_id, block.next_block);
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break;
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case SPIRBlock::Select:
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if (post_order_visit(block.true_block))
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add_branch(block_id, block.true_block);
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if (post_order_visit(block.false_block))
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add_branch(block_id, block.false_block);
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break;
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case SPIRBlock::MultiSelect:
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2021-11-29 07:22:18 +03:00
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{
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const auto &cases = compiler.get_case_list(block);
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for (const auto &target : cases)
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2019-01-10 06:23:47 +03:00
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{
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if (post_order_visit(target.block))
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add_branch(block_id, target.block);
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}
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if (block.default_block && post_order_visit(block.default_block))
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add_branch(block_id, block.default_block);
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break;
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2021-11-29 07:22:18 +03:00
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}
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2019-01-10 06:23:47 +03:00
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default:
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break;
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}
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2019-07-03 18:10:12 +03:00
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// If this is a selection merge, add an implied branch to the merge target.
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// This is needed to avoid cases where an inner branch dominates the outer branch.
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// This can happen if one of the branches exit early, e.g.:
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// if (cond) { ...; break; } else { var = 100 } use_var(var);
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// We can use the variable without a Phi since there is only one possible parent here.
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// However, in this case, we need to hoist out the inner variable to outside the branch.
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// Use same strategy as loops.
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if (block.merge == SPIRBlock::MergeSelection && post_order_visit(block.next_block))
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{
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// If there is only one preceding edge to the merge block and it's not ourselves, we need a fixup.
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// Add a fake branch so any dominator in either the if (), or else () block, or a lone case statement
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// will be hoisted out to outside the selection merge.
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// If size > 1, the variable will be automatically hoisted, so we should not mess with it.
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2019-09-02 08:06:03 +03:00
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// The exception here is switch blocks, where we can have multiple edges to merge block,
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// all coming from same scope, so be more conservative in this case.
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2019-07-03 18:10:12 +03:00
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// Adding fake branches unconditionally breaks parameter preservation analysis,
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// which looks at how variables are accessed through the CFG.
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auto pred_itr = preceding_edges.find(block.next_block);
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if (pred_itr != end(preceding_edges))
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{
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auto &pred = pred_itr->second;
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2019-09-02 08:06:03 +03:00
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auto succ_itr = succeeding_edges.find(block_id);
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2019-09-22 15:25:53 +03:00
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size_t num_succeeding_edges = 0;
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2019-09-02 08:06:03 +03:00
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if (succ_itr != end(succeeding_edges))
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num_succeeding_edges = succ_itr->second.size();
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if (block.terminator == SPIRBlock::MultiSelect && num_succeeding_edges == 1)
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{
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// Multiple branches can come from the same scope due to "break;", so we need to assume that all branches
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// come from same case scope in worst case, even if there are multiple preceding edges.
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// If we have more than one succeeding edge from the block header, it should be impossible
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// to have a dominator be inside the block.
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// Only case this can go wrong is if we have 2 or more edges from block header and
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// 2 or more edges to merge block, and still have dominator be inside a case label.
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if (!pred.empty())
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add_branch(block_id, block.next_block);
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}
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else
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{
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if (pred.size() == 1 && *pred.begin() != block_id)
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add_branch(block_id, block.next_block);
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}
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2019-07-03 18:10:12 +03:00
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}
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else
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{
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// If the merge block does not have any preceding edges, i.e. unreachable, hallucinate it.
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// We're going to do code-gen for it, and domination analysis requires that we have at least one preceding edge.
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add_branch(block_id, block.next_block);
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}
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}
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2019-01-10 06:23:47 +03:00
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// Then visit ourselves. Start counting at one, to let 0 be a magic value for testing back vs. crossing edges.
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2019-01-17 05:50:01 +03:00
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visit_order[block_id].get() = ++visit_count;
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2019-01-10 06:23:47 +03:00
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post_order.push_back(block_id);
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return true;
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}
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void CFG::build_post_order_visit_order()
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{
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uint32_t block = func.entry_block;
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visit_count = 0;
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2019-01-17 05:50:01 +03:00
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visit_order.clear();
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2019-01-10 06:23:47 +03:00
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post_order.clear();
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post_order_visit(block);
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}
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void CFG::add_branch(uint32_t from, uint32_t to)
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{
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2019-04-15 07:53:50 +03:00
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const auto add_unique = [](SmallVector<uint32_t> &l, uint32_t value) {
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2019-01-10 06:23:47 +03:00
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auto itr = find(begin(l), end(l), value);
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if (itr == end(l))
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l.push_back(value);
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};
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add_unique(preceding_edges[to], from);
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add_unique(succeeding_edges[from], to);
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}
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2019-06-07 08:04:16 +03:00
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uint32_t CFG::find_loop_dominator(uint32_t block_id) const
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{
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while (block_id != SPIRBlock::NoDominator)
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{
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auto itr = preceding_edges.find(block_id);
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if (itr == end(preceding_edges))
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return SPIRBlock::NoDominator;
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if (itr->second.empty())
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return SPIRBlock::NoDominator;
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uint32_t pred_block_id = SPIRBlock::NoDominator;
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bool ignore_loop_header = false;
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// If we are a merge block, go directly to the header block.
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// Only consider a loop dominator if we are branching from inside a block to a loop header.
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// NOTE: In the CFG we forced an edge from header to merge block always to support variable scopes properly.
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for (auto &pred : itr->second)
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{
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auto &pred_block = compiler.get<SPIRBlock>(pred);
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2019-09-07 18:07:48 +03:00
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if (pred_block.merge == SPIRBlock::MergeLoop && pred_block.merge_block == ID(block_id))
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2019-06-07 08:04:16 +03:00
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{
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pred_block_id = pred;
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ignore_loop_header = true;
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break;
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}
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2019-09-07 18:07:48 +03:00
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else if (pred_block.merge == SPIRBlock::MergeSelection && pred_block.next_block == ID(block_id))
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2019-06-07 08:04:16 +03:00
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{
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pred_block_id = pred;
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break;
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}
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}
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// No merge block means we can just pick any edge. Loop headers dominate the inner loop, so any path we
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// take will lead there.
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if (pred_block_id == SPIRBlock::NoDominator)
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pred_block_id = itr->second.front();
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block_id = pred_block_id;
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if (!ignore_loop_header && block_id)
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{
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auto &block = compiler.get<SPIRBlock>(block_id);
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if (block.merge == SPIRBlock::MergeLoop)
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return block_id;
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}
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}
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return block_id;
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}
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2019-09-07 18:07:48 +03:00
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bool CFG::node_terminates_control_flow_in_sub_graph(BlockID from, BlockID to) const
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2019-09-02 08:06:03 +03:00
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{
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// Walk backwards, starting from "to" block.
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// Only follow pred edges if they have a 1:1 relationship, or a merge relationship.
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// If we cannot find a path to "from", we must assume that to is inside control flow in some way.
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auto &from_block = compiler.get<SPIRBlock>(from);
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2019-09-07 18:07:48 +03:00
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BlockID ignore_block_id = 0;
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2019-09-02 08:06:03 +03:00
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if (from_block.merge == SPIRBlock::MergeLoop)
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ignore_block_id = from_block.merge_block;
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while (to != from)
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{
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auto pred_itr = preceding_edges.find(to);
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if (pred_itr == end(preceding_edges))
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return false;
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DominatorBuilder builder(*this);
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for (auto &edge : pred_itr->second)
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builder.add_block(edge);
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uint32_t dominator = builder.get_dominator();
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if (dominator == 0)
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return false;
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auto &dom = compiler.get<SPIRBlock>(dominator);
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bool true_path_ignore = false;
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bool false_path_ignore = false;
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2022-07-10 20:49:20 +03:00
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bool merges_to_nothing = dom.merge == SPIRBlock::MergeNone ||
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(dom.merge == SPIRBlock::MergeSelection && dom.next_block &&
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compiler.get<SPIRBlock>(dom.next_block).terminator == SPIRBlock::Unreachable) ||
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(dom.merge == SPIRBlock::MergeLoop && dom.merge_block &&
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compiler.get<SPIRBlock>(dom.merge_block).terminator == SPIRBlock::Unreachable);
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|
|
|
|
|
if (dom.self == from || merges_to_nothing)
|
2019-09-02 08:06:03 +03:00
|
|
|
{
|
2022-07-10 20:49:20 +03:00
|
|
|
// We can only ignore inner branchy paths if there is no merge,
|
|
|
|
// i.e. no code is generated afterwards. E.g. this allows us to elide continue:
|
|
|
|
// for (;;) { if (cond) { continue; } else { break; } }.
|
|
|
|
// Codegen here in SPIR-V will be something like either no merge if one path directly breaks, or
|
|
|
|
// we merge to Unreachable.
|
|
|
|
if (ignore_block_id && dom.terminator == SPIRBlock::Select)
|
|
|
|
{
|
|
|
|
auto &true_block = compiler.get<SPIRBlock>(dom.true_block);
|
|
|
|
auto &false_block = compiler.get<SPIRBlock>(dom.false_block);
|
|
|
|
auto &ignore_block = compiler.get<SPIRBlock>(ignore_block_id);
|
|
|
|
true_path_ignore = compiler.execution_is_branchless(true_block, ignore_block);
|
|
|
|
false_path_ignore = compiler.execution_is_branchless(false_block, ignore_block);
|
|
|
|
}
|
2019-09-02 08:06:03 +03:00
|
|
|
}
|
|
|
|
|
2022-07-10 20:49:20 +03:00
|
|
|
// Cases where we allow traversal. This serves as a proxy for post-dominance in a loop body.
|
|
|
|
// TODO: Might want to do full post-dominance analysis, but it's a lot of churn for something like this ...
|
|
|
|
// - We're the merge block of a selection construct. Jump to header.
|
|
|
|
// - We're the merge block of a loop. Jump to header.
|
|
|
|
// - Direct branch. Trivial.
|
|
|
|
// - Allow cases inside a branch if the header cannot merge execution before loop exit.
|
2019-09-02 08:06:03 +03:00
|
|
|
if ((dom.merge == SPIRBlock::MergeSelection && dom.next_block == to) ||
|
|
|
|
(dom.merge == SPIRBlock::MergeLoop && dom.merge_block == to) ||
|
|
|
|
(dom.terminator == SPIRBlock::Direct && dom.next_block == to) ||
|
|
|
|
(dom.terminator == SPIRBlock::Select && dom.true_block == to && false_path_ignore) ||
|
|
|
|
(dom.terminator == SPIRBlock::Select && dom.false_block == to && true_path_ignore))
|
|
|
|
{
|
|
|
|
// Allow walking selection constructs if the other branch reaches out of a loop construct.
|
|
|
|
// It cannot be in-scope anymore.
|
|
|
|
to = dominator;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2019-01-10 06:23:47 +03:00
|
|
|
DominatorBuilder::DominatorBuilder(const CFG &cfg_)
|
|
|
|
: cfg(cfg_)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
|
|
|
|
void DominatorBuilder::add_block(uint32_t block)
|
|
|
|
{
|
|
|
|
if (!cfg.get_immediate_dominator(block))
|
|
|
|
{
|
|
|
|
// Unreachable block via the CFG, we will never emit this code anyways.
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!dominator)
|
|
|
|
{
|
|
|
|
dominator = block;
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (block != dominator)
|
|
|
|
dominator = cfg.find_common_dominator(block, dominator);
|
|
|
|
}
|
|
|
|
|
|
|
|
void DominatorBuilder::lift_continue_block_dominator()
|
|
|
|
{
|
|
|
|
// It is possible for a continue block to be the dominator of a variable is only accessed inside the while block of a do-while loop.
|
|
|
|
// We cannot safely declare variables inside a continue block, so move any variable declared
|
|
|
|
// in a continue block to the entry block to simplify.
|
|
|
|
// It makes very little sense for a continue block to ever be a dominator, so fall back to the simplest
|
|
|
|
// solution.
|
|
|
|
|
|
|
|
if (!dominator)
|
|
|
|
return;
|
|
|
|
|
|
|
|
auto &block = cfg.get_compiler().get<SPIRBlock>(dominator);
|
|
|
|
auto post_order = cfg.get_visit_order(dominator);
|
|
|
|
|
|
|
|
// If we are branching to a block with a higher post-order traversal index (continue blocks), we have a problem
|
|
|
|
// since we cannot create sensible GLSL code for this, fallback to entry block.
|
|
|
|
bool back_edge_dominator = false;
|
|
|
|
switch (block.terminator)
|
|
|
|
{
|
|
|
|
case SPIRBlock::Direct:
|
|
|
|
if (cfg.get_visit_order(block.next_block) > post_order)
|
|
|
|
back_edge_dominator = true;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case SPIRBlock::Select:
|
|
|
|
if (cfg.get_visit_order(block.true_block) > post_order)
|
|
|
|
back_edge_dominator = true;
|
|
|
|
if (cfg.get_visit_order(block.false_block) > post_order)
|
|
|
|
back_edge_dominator = true;
|
|
|
|
break;
|
|
|
|
|
|
|
|
case SPIRBlock::MultiSelect:
|
2021-11-29 07:22:18 +03:00
|
|
|
{
|
|
|
|
auto &cases = cfg.get_compiler().get_case_list(block);
|
|
|
|
for (auto &target : cases)
|
2019-01-10 06:23:47 +03:00
|
|
|
{
|
|
|
|
if (cfg.get_visit_order(target.block) > post_order)
|
|
|
|
back_edge_dominator = true;
|
|
|
|
}
|
|
|
|
if (block.default_block && cfg.get_visit_order(block.default_block) > post_order)
|
|
|
|
back_edge_dominator = true;
|
|
|
|
break;
|
2021-11-29 07:22:18 +03:00
|
|
|
}
|
2019-01-10 06:23:47 +03:00
|
|
|
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (back_edge_dominator)
|
|
|
|
dominator = cfg.get_function().entry_block;
|
|
|
|
}
|
2019-04-15 07:53:50 +03:00
|
|
|
} // namespace SPIRV_CROSS_NAMESPACE
|