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04f5c7fa4d
date 2000.06.12.16.58.00; author rmoore1; state Exp;
388 lines
12 KiB
C
388 lines
12 KiB
C
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/******************************************************************************
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*
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* Name: hardware.h -- hardware specific interfaces
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*
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*****************************************************************************/
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/******************************************************************************
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*
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* 1. Copyright Notice
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*
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* Some or all of this work - Copyright (c) 1999, Intel Corp. All rights
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* reserved.
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*
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* 2. License
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*
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* 2.1. This is your license from Intel Corp. under its intellectual property
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* rights. You may have additional license terms from the party that provided
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* you this software, covering your right to use that party's intellectual
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* property rights.
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*
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* 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a
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* copy of the source code appearing in this file ("Covered Code") an
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* irrevocable, perpetual, worldwide license under Intel's copyrights in the
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* base code distributed originally by Intel ("Original Intel Code") to copy,
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* make derivatives, distribute, use and display any portion of the Covered
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* Code in any form, with the right to sublicense such rights; and
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*
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* 2.3. Intel grants Licensee a non-exclusive and non-transferable patent
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* license (with the right to sublicense), under only those claims of Intel
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* patents that are infringed by the Original Intel Code, to make, use, sell,
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* offer to sell, and import the Covered Code and derivative works thereof
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* solely to the minimum extent necessary to exercise the above copyright
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* license, and in no event shall the patent license extend to any additions
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* to or modifications of the Original Intel Code. No other license or right
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* is granted directly or by implication, estoppel or otherwise;
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*
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* The above copyright and patent license is granted only if the following
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* conditions are met:
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*
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* 3. Conditions
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*
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* 3.1. Redistribution of Source with Rights to Further Distribute Source.
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* Redistribution of source code of any substantial portion of the Covered
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* Code or modification with rights to further distribute source must include
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* the above Copyright Notice, the above License, this list of Conditions,
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* and the following Disclaimer and Export Compliance provision. In addition,
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* Licensee must cause all Covered Code to which Licensee contributes to
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* contain a file documenting the changes Licensee made to create that Covered
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* Code and the date of any change. Licensee must include in that file the
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* documentation of any changes made by any predecessor Licensee. Licensee
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* must include a prominent statement that the modification is derived,
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* directly or indirectly, from Original Intel Code.
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*
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* 3.2. Redistribution of Source with no Rights to Further Distribute Source.
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* Redistribution of source code of any substantial portion of the Covered
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* Code or modification without rights to further distribute source must
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* include the following Disclaimer and Export Compliance provision in the
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* documentation and/or other materials provided with distribution. In
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* addition, Licensee may not authorize further sublicense of source of any
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* portion of the Covered Code, and must include terms to the effect that the
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* license from Licensee to its licensee is limited to the intellectual
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* property embodied in the software Licensee provides to its licensee, and
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* not to intellectual property embodied in modifications its licensee may
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* make.
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*
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* 3.3. Redistribution of Executable. Redistribution in executable form of any
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* substantial portion of the Covered Code or modification must reproduce the
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* above Copyright Notice, and the following Disclaimer and Export Compliance
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* provision in the documentation and/or other materials provided with the
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* distribution.
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*
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* 3.4. Intel retains all right, title, and interest in and to the Original
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* Intel Code.
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*
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* 3.5. Neither the name Intel nor any other trademark owned or controlled by
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* Intel shall be used in advertising or otherwise to promote the sale, use or
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* other dealings in products derived from or relating to the Covered Code
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* without prior written authorization from Intel.
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*
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* 4. Disclaimer and Export Compliance
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*
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* 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED
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* HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE
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* IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE,
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* INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY
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* UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY
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* IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A
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* PARTICULAR PURPOSE.
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*
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* 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES
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* OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR
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* COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT,
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* SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY
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* CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL
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* HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS
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* SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY
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* LIMITED REMEDY.
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*
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* 4.3. Licensee shall not export, either directly or indirectly, any of this
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* software or system incorporating such software without first obtaining any
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* required license or other approval from the U. S. Department of Commerce or
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* any other agency or department of the United States Government. In the
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* event Licensee exports any such software from the United States or
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* re-exports any such software from a foreign destination, Licensee shall
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* ensure that the distribution and export/re-export of the software is in
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* compliance with all laws, regulations, orders, or other restrictions of the
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* U.S. Export Administration Regulations. Licensee agrees that neither it nor
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* any of its subsidiaries will export/re-export any technical data, process,
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* software, or service, directly or indirectly, to any country for which the
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* United States government or any agency thereof requires an export license,
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* other governmental approval, or letter of assurance, without first obtaining
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* such license, approval or letter.
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*
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*****************************************************************************/
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#ifndef __HARDWARE_H__
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#define __HARDWARE_H__
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/* Sleep states */
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#define SLWA_DEBUG_LEVEL 4
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#define GTS_CALL 0
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#define GTS_WAKE 1
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/* Cx States */
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#define MAX_CX_STATE_LATENCY 0xFFFFFFFF
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#define MAX_CX_STATES 4
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/*
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* The #define's and enum below establish an abstract way of identifying what
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* register block and register is to be accessed. Do not change any of the
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* values as they are used in switch statements and offset calculations.
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*/
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#define REGISTER_BLOCK_MASK 0xFF00
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#define BIT_IN_REGISTER_MASK 0x00FF
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#define PM1_EVT 0x0100
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#define PM1_CONTROL 0x0200
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#define PM2_CONTROL 0x0300
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#define PM_TIMER 0x0400
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#define PROCESSOR_BLOCK 0x0500
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#define GPE0_STS_BLOCK 0x0600
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#define GPE0_EN_BLOCK 0x0700
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#define GPE1_STS_BLOCK 0x0800
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#define GPE1_EN_BLOCK 0x0900
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enum
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{
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/* PM1 status register ids */
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TMR_STS = (PM1_EVT | 0x01),
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BM_STS,
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GBL_STS,
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PWRBTN_STS,
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SLPBTN_STS,
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RTC_STS,
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WAK_STS,
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/* PM1 enable register ids */
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TMR_EN,
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/* need to skip 1 enable number since there's no bus master enable register */
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GBL_EN = (PM1_EVT | 0x0A),
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PWRBTN_EN,
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SLPBTN_EN,
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RTC_EN,
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/* PM1 control register ids */
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SCI_EN = (PM1_CONTROL | 0x01),
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BM_RLD,
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GBL_RLS,
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SLP_TYPa,
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SLP_TYPb,
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SLP_EN,
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/* PM2 control register ids */
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ARB_DIS = (PM2_CONTROL | 0x01),
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/* PM Timer register ids */
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TMR_VAL = (PM_TIMER | 0x01),
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GPE0_STS = (GPE0_STS_BLOCK | 0x01),
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GPE0_EN = (GPE0_EN_BLOCK | 0x01),
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GPE1_STS = (GPE1_STS_BLOCK | 0x01),
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GPE1_EN = (GPE0_EN_BLOCK | 0x01),
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/* Last register value is one less than LAST_REG */
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LAST_REG
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};
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#define TMR_STS_MASK 0x0001
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#define BM_STS_MASK 0x0010
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#define GBL_STS_MASK 0x0020
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#define PWRBTN_STS_MASK 0x0100
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#define SLPBTN_STS_MASK 0x0200
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#define RTC_STS_MASK 0x0400
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#define WAK_STS_MASK 0x8000
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#define ALL_FIXED_STS_BITS (TMR_STS_MASK | \
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BM_STS_MASK | \
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GBL_STS_MASK | \
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PWRBTN_STS_MASK | \
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SLPBTN_STS_MASK | \
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RTC_STS_MASK | \
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WAK_STS_MASK)
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#define TMR_EN_MASK 0x0001
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#define GBL_EN_MASK 0x0020
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#define PWRBTN_EN_MASK 0x0100
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#define SLPBTN_EN_MASK 0x0200
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#define RTC_EN_MASK 0x0400
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#define SCI_EN_MASK 0x0001
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#define BM_RLD_MASK 0x0002
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#define GBL_RLS_MASK 0x0004
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#define SLP_TYPx_MASK 0x1C00
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#define SLP_EN_MASK 0x2000
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#define ARB_DIS_MASK 0x0001
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#define GPE0_STS_MASK
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#define GPE0_EN_MASK
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#define GPE1_STS_MASK
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#define GPE1_EN_MASK
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#define ACPI_READ 1
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#define ACPI_WRITE 2
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#define LOW_BYTE 0x00FF
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#define ONE_BYTE 0x08
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#ifndef SET
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#define SET 1
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#endif
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#ifndef CLEAR
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#define CLEAR 0
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#endif
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/* Prototypes */
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ACPI_STATUS
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HwInitialize();
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ACPI_STATUS
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HwShutdown();
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ACPI_STATUS
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HwInitializeSystemInfo();
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ACPI_STATUS
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HwSetMode (
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UINT32 Mode);
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UINT32
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HwGetMode (
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void);
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UINT32
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HwGetModeCapabilities (
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void);
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/* Register I/O Prototypes */
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UINT32
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HwRegisterIO (
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NATIVE_UINT ReadWrite,
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BOOLEAN UseLock,
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UINT32 RegisterId, ... /* DWORD Value */);
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void
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HwClearAcpiStatus (
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void);
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/* GPE support */
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void
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HwEnableGpe (
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UINT32 GpeIndex);
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void
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HwDisableGpe (
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UINT32 GpeIndex);
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void
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HwClearGpe (
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UINT32 GpeIndex);
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void
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HwGetGpeStatus (
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UINT32 GpeNumber,
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ACPI_EVENT_STATUS *EventStatus);
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/* Sleep Prototypes */
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ACPI_STATUS
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HwObtainSleepTypeRegisterData (
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UINT8 SleepState,
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UINT8 *Slp_TypA,
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UINT8 *Slp_TypB);
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/* Cx State Prototypes */
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ACPI_STATUS
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HwIa32EnterC1(
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ACPI_IO_ADDRESS PBlkAddress,
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UINT32 *PmTimerTicks);
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ACPI_STATUS
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HwIa32EnterC2(
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ACPI_IO_ADDRESS PBlkAddress,
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UINT32 *PmTimerTicks);
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ACPI_STATUS
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HwIa32EnterC3(
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ACPI_IO_ADDRESS PBlkAddress,
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UINT32 *PmTimerTicks);
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ACPI_STATUS
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HwIa32EnterCx (
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ACPI_IO_ADDRESS PBlkAddress,
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UINT32 *PmTimerTicks);
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ACPI_STATUS
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HwIa32SetCx (
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UINT32 CxState);
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ACPI_STATUS
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HwIa32GetCxInfo (
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UINT32 CxStates[MAX_CX_STATES]);
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/* Throttling Prototypes */
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void
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HwEnableThrottling (
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ACPI_IO_ADDRESS PBlkAddress);
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void
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HwDisableThrottling (
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ACPI_IO_ADDRESS PBlkAddress);
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UINT32
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HwGetDutyCycle (
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UINT8 DutyOffset,
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ACPI_IO_ADDRESS PBlkAddress,
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UINT32 NumThrottleStates);
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void
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HwProgramDutyCycle (
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UINT8 DutyOffset,
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UINT32 DutyCycle,
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ACPI_IO_ADDRESS PBlkAddress,
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UINT32 NumThrottleStates);
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NATIVE_UINT
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HwLocalPow (
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NATIVE_UINT x,
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NATIVE_UINT y);
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/* ACPI Timer prototypes */
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UINT32
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HwPmtTicks (
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void);
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UINT32
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HwPmtResolution (
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void);
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#endif /* __HARDWARE_H__ */
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