This patch splits install target into install_n32/n64/s32/s64 targets
so that they can be invoked from "Do" script separately. Lv Zheng.
Signed-off-by: Lv Zheng <lv.zheng@intel.com>
This patch adds support in Do to allow test cases/modes to be specified
in "Do 0" mode - build aslts aml test cases. Lv Zheng.
Signed-off-by: Lv Zheng <lv.zheng@intel.com>
The ACPI spec's definition of implicit conversion does not allow
'0x' within strings that are converted to integers. Without '0x'
the number being converted could be mistaken as a decimal number.
Instead we are allowing with 0x or no 0x and both versions are
implicitly converted to hex.
Signed-off-by: Erik Schmauss <erik.schmauss@intel.com>
These tests compare a resource descriptor and an equivalent buffer to ensure
proper resource descriptor compilation. The buffer does not account for the
shared bit for V2 resource descriptors (see section 6.4.3.8.2.x in the ACPI
6.2 spec). This commit changes this test buffer to include the shared bit
(the 3rd bit of the 6th byte of V2 resource descriptors). The specification
is expected to reflect these changes (sections 6.4.3.8.2.1, 6.4.3.8.2.2, and
6.4.3.8.2.3).
Updated buffers include buffers equivalent to I2cSearialBusv2, SpiSerialBusv2,
and UartSerialBusv2
Signed-off-by: Erik Schmauss <erik.schmauss@intel.com>
Reversing the order of defintion block declarations exposed an
issue in the compiler namespace loading. This issue has been fixed
and this change exercises the code involved in the bug fix.
Signed-off-by: Erik Schmauss <erik.schmauss@intel.com>
When tests are meant to return exceptions, proceeding causes unexpected
number of exceptions left. This patch fixes such issues by interrupting the
tests when exception is expected. Lv Zheng.
Signed-off-by: Lv Zheng <lv.zheng@intel.com>
The p6a0 store matrix is used to indicate "Stroe" allowable types while
b67a contains indexes to this matrix.
1. Row[3] is used for Package target,
Row[4] is used for Method target,
Row[5] is used for Non-computational data (Device/Event/...) target.
2. Col[2] is used for FIXED fields result,
Col[3] is used for Computational data (Integer/String/Buffer) result,
Col[4] is used for Package result.
As it is not possible to:
1. Store(Package/Method/Noncomputation, Field/Computationl/Package)
2. Store(Method/Noncomputation, Field/Computational)
We must change the matrix to reflect the validated Windows behavior. By
doing so, several m689 failures are fixed. Lv Zheng.
Signed-off-by: Lv Zheng <lv.zheng@intel.com>
In m702 tests, there are 2 lines trying to exclude 2 test cases, while
the test cases should be valid. OTOH, GeneralPurposeIo test is not
correct, it shouldn't validate the region access result as we don't
implement fully functioning region handlers in acpiexec. This patch fixes
these breakage. Lv Zheng.
Signed-off-by: Lv Zheng <lv.zheng@intel.com>
Store(Integer/String/Buffer, Package) results in AE_AML_TARGET_TYPE. This
patch fixes ASLTS failures by removing these invalid test cases.
Note that m34d is not a kind of coverage test that also validates if
invalid Store test cases can trigger exceptions, it only contains valid
Store test cases where the results' ObjectType can be compared, so we
should just remove the invalid test cases instead of adding exception
check. Lv Zheng.
Signed-off-by: Lv Zheng <lv.zheng@intel.com>
This patch fixes the Identity2MS collection's directory name of its
sub-test-cases in order to fix unexpected error occurred to the following
command:
aslts.sh -u -m n32 -c extra_aslts
The Identity2MS test cases are located at Identity2MS/abbu, rather than
Identity2MS/extra or Identity2MS/extra_aslts. Lv Zheng.
Signed-off-by: Lv Zheng <lv.zheng@intel.com>
PinGroupConfig() is analogous to PinGroupFunction() but instead of mode
(muxing), it is used to apply specific fine-grained configuration to a
set of referenced pins.
The format of this new resource is:
PinGroupConfig (Shared/Exclusive, PinConfigType, PinConfigValue,
ResourceSource, ResourceSourceIndex, ResourceSourceLabel,
ResourceUsage, DescriptorName, VendorData)
The PinConfigType/PinConfigValue are the same used by PinConfig()
resource.
Here also the combination of ResourceSource and ResourceSourceLabel is
used to specify the PinGroup() this resource refers to.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Lv Zheng <lv.zheng@intel.com>
PinGroupFunction() is a new resource introduced with ACPI 6.2. It is
used with PinGroup() to configure specific mode for a set of pins
exposed by a GPIO controller.
The format of the resource is:
PinGroupFunction (Shared/Exclusive, FunctionNumber, ResourceSource,
ResourceSourceIndex, ResourceSourceLabel,
ResourceUsage, DescriptorName, VendorData)
The ResourceSource and ResourceSourceLabel fields are used to specify
the PinGroup() resource referenced by PinGroupFunction().
Device (GPIO)
{
Name (_CRS, ResourceTemplate () {
PinGroup ("group1") {2, 3}
PinGroup ("group2") {4, 5}
...
})
}
Device (I2C)
{
Name (_CRS, ResourceTemplate () {
PinGroupFunction (Exclusive, 6, "^GPIO", 0, "mygroup2")
})
}
In the above example the PinGroupFunction() references the second
PinGroup() resource (using label "mygroup2" and configures pins 4 and 5
into mode 6.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Lv Zheng <lv.zheng@intel.com>
ACPI 6.2 introduced a new resource that is used to declare set of pins
belonging to a GPIO controller. This resource is referenced by new
PinGroupFunction() and PinGroupConfig() resources using ResourceSource
and ResourceLabel fields.
The PinGroup() resource looks like this:
PinGroup (ResourceLabel, ResourceUsage, DescriptorName,
VendorData) {Pin List}
This resource should be listed in _CRS under the GPIO/pincontroller
device providing these pins.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Lv Zheng <lv.zheng@intel.com>
ACPI 6.2 introduced a new resource that is used to specify fine-grained
configuration of a pin or set of pins used by a device. The ASL syntax of
this new resource looks like:
PinConfig (Shared/Exclusive, PinConfigType, PinConfigValue,
ResourceSource, ResourceSourceIndex, ResourceUsage,
DescriptorName, VendorData) {Pin List}
PinConfigType is an integer with following accepted values:
0x00 (Default) - No configuration is applied to the pin
0x01 (Bias Pull-up) - Pin is pulled up using certain size resistor
0x02 (Bias Pull-down) - Pin is pulled down using certain size resistor
0x03 (Bias Default) - Set to default biasing
0x04 (Bias Disable) - All bias settings will be disabled
0x05 (Bias High Impedance) - Configure the pin as HiZ
0x06 (Bias Bus Hold) - Configure the pin in a weak latch state where
it drives the last value on a tristate bus
0x07 (Drive Open Drain) - Configure the pin into open drain state
0x08 (Drive Open Source) - Configure the pin into open source state
0x09 (Drive Push Pull) - Configure the pin into push-pull state
0x0a (Drive Strength) - How much the pin can supply current
0x0b (Slew Rate) - Configure slew rate of the pin
0x0c (Input Debounce) - Enable input debouncer for the pin
0x0d (Input Schmitt Trigger) - Enable schmitt trigger for the pin
0x0e - 0x7f - Reserved
0x80 - 0xff - Vendor defined types
The PinConfigValue depends on the type and is expressed as units
suitable for that type (for example bias uses Ohms).
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Lv Zheng <lv.zheng@intel.com>
ACPI 6.2 introduced a new resource that is used to describe how certain
pins are muxed for a device. The ASL syntax of this new resource looks
like below:
PinFunction(Shared, PinConfig, FunctionNumber, ResourceSource,
ResourceSourceIndex, ResourceUsage, DescriptorName,
VendorData) {Pin List}
Which is pretty similar to GpioIo()/GpioInt() resources.
Teach ACPICA about this new resource.
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Lv Zheng <lv.zheng@intel.com>
The .c files contain snippets of ASL code. This has been extracted and placed as a
comment within DECL.asl. Note the style of this comment does not adhere to our
normal style so that it is easy to copy/paste, if needed.
Signed-off-by: Erik Schmauss <erik.schmauss@intel.com>
When performing the binary comparison test sequence, the compilation
will use the -oE flag to compile the externals in place (rather than
emitting external aml bytecode at the top of the definition block.
The disassembly will use the -oe flag to disassemble externals in place.
The final re-compilation will use the same flags as the normal test case
compilation.
The -oe and -oE flags ensures that the externals within ASL will remain
in the same location throughout the compilation and disassembly. This is
needed for binary comparisons to match for several test cases such as bdemo
and table.
Signed-off-by: Erik Schmauss <erik.schmauss@intel.com>
this option disables test execution and terminates after test suite
compilation and binary comparison.
Signed-off-by: Erik Schmauss <erik.schmauss@intel.com>
This gets rid of slack mode and normal mode within the test suite and replaces
this with opt (optimized) and nopt (non-optimized) modes.
Signed-off-by: Erik Schmauss <erik.schmauss@intel.com>
This adds the capability for ASLTS to exercise the aml disassembler during the
compilation of ASLTS. This is done by comparing aml generated by compiling and
disassembling/recompiling each test case and performing a binary comparison
between the two aml files.
Signed-off-by: Erik Schmauss <erik.schmauss@intel.com>
The -e option was changed in commit d90488f43579 ("acpiexec: add option
to disable memory tracking mechanism."), released as version 20100528.
Signed-off-by: Peter Wu <peter@lekensteyn.nl>
