mirror of
https://github.com/acpica/acpica/
synced 2025-01-17 14:59:56 +03:00
Update comment.
No functional change.
This commit is contained in:
parent
66a7952f1b
commit
f63d5b83e7
@ -1013,9 +1013,10 @@ typedef struct acpi_bit_register_info
|
|||||||
/*
|
/*
|
||||||
* For PM1 control, the SCI enable bit (bit 0, SCI_EN) is defined by the
|
* For PM1 control, the SCI enable bit (bit 0, SCI_EN) is defined by the
|
||||||
* ACPI specification to be a "preserved" bit - "OSPM always preserves this
|
* ACPI specification to be a "preserved" bit - "OSPM always preserves this
|
||||||
* bit position", section 4.7.3.2.1. However, some machines fail if this
|
* bit position", section 4.7.3.2.1. However, on some machines the OS must
|
||||||
* bit is in fact preserved. No machines fail if the bit is not preserved.
|
* write a one to this bit after resume for the machine to work properly.
|
||||||
* Therefore, we no longer attempt to preserve this bit. (May 2009)
|
* To enable this, we no longer attempt to preserve this bit. No machines
|
||||||
|
* are known to fail if the bit is not preserved. (May 2009)
|
||||||
*/
|
*/
|
||||||
#define ACPI_PM1_CONTROL_IGNORED_BITS 0x0200 /* Bit 9 */
|
#define ACPI_PM1_CONTROL_IGNORED_BITS 0x0200 /* Bit 9 */
|
||||||
#define ACPI_PM1_CONTROL_RESERVED_BITS 0xC1F8 /* Bits 14-15, 3-8 */
|
#define ACPI_PM1_CONTROL_RESERVED_BITS 0xC1F8 /* Bits 14-15, 3-8 */
|
||||||
|
Loading…
Reference in New Issue
Block a user