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Added revision number to header

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date	2000.08.30.20.54.00;	author rmoore1;	state Exp;
This commit is contained in:
aystarik 2005-06-29 20:04:16 +00:00
parent ade2f7c0d6
commit e1b71d248f
6 changed files with 747 additions and 695 deletions
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1
source/include/acresrc.h
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@ -1,6 +1,7 @@
/******************************************************************************
*
* Name: acresrc.h - Resource Manager function prototypes
* $Revision: 1.20 $
*
*****************************************************************************/

73
source/include/actables.h
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@ -1,7 +1,7 @@
/******************************************************************************
*
* Name: actables.h - ACPI table management
* $Revision: 1.30 $
* $Revision: 1.20 $
*
*****************************************************************************/
@ -9,8 +9,8 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999, 2000, 2001, Intel Corp.
* All rights reserved.
* Some or all of this work - Copyright (c) 1999, Intel Corp. All rights
* reserved.
*
* 2. License
*
@ -128,30 +128,19 @@ AcpiTbHandleToObject (
UINT16 TableId,
ACPI_TABLE_DESC **TableDesc);
/*
* tbconvrt - Table conversion routines
* AcpiTbfac - FACP, FACS utilities
*/
ACPI_STATUS
AcpiTbConvertToXsdt (
ACPI_TABLE_DESC *TableInfo,
UINT32 *NumberOfTables);
ACPI_STATUS
AcpiTbConvertTableFadt (
void);
ACPI_STATUS
AcpiTbBuildCommonFacs (
AcpiTbGetTableFacs (
ACPI_TABLE_HEADER *BufferPtr,
ACPI_TABLE_DESC *TableInfo);
UINT32
AcpiTbGetTableCount (
RSDP_DESCRIPTOR *RSDP,
ACPI_TABLE_HEADER *RSDT);
/*
* tbget - Table "get" routines
* AcpiTbget - Table "get" routines
*/
ACPI_STATUS
@ -162,36 +151,13 @@ AcpiTbGetTablePtr (
ACPI_STATUS
AcpiTbGetTable (
ACPI_PHYSICAL_ADDRESS PhysicalAddress,
void *PhysicalAddress,
ACPI_TABLE_HEADER *BufferPtr,
ACPI_TABLE_DESC *TableInfo);
ACPI_STATUS
AcpiTbVerifyRsdp (
ACPI_PHYSICAL_ADDRESS RSDP_PhysicalAddress);
ACPI_STATUS
AcpiTbGetTableFacs (
ACPI_TABLE_HEADER *BufferPtr,
ACPI_TABLE_DESC *TableInfo);
ACPI_PHYSICAL_ADDRESS
AcpiTbGetRsdtAddress (
void);
ACPI_STATUS
AcpiTbValidateRsdt (
ACPI_TABLE_HEADER *TablePtr);
ACPI_STATUS
AcpiTbGetTablePointer (
ACPI_PHYSICAL_ADDRESS PhysicalAddress,
UINT32 Flags,
UINT32 *Size,
ACPI_TABLE_HEADER **TablePtr);
/*
* tbgetall - Get all firmware ACPI tables
* AcpiTbgetall - Get all firmware ACPI tables
*/
ACPI_STATUS
@ -201,7 +167,7 @@ AcpiTbGetAllTables (
/*
* tbinstall - Table installation
* AcpiTbinstall - Table installation
*/
ACPI_STATUS
@ -221,7 +187,7 @@ AcpiTbInitTableDescriptor (
/*
* tbremove - Table removal and deletion
* AcpiTbremove - Table removal and deletion
*/
void
@ -232,12 +198,8 @@ void
AcpiTbDeleteAcpiTable (
ACPI_TABLE_TYPE Type);
void
AcpiTbDeleteSingleTable (
ACPI_TABLE_DESC *TableDesc);
ACPI_TABLE_DESC *
AcpiTbUninstallTable (
AcpiTbDeleteSingleTable (
ACPI_TABLE_DESC *TableDesc);
void
@ -246,7 +208,7 @@ AcpiTbFreeAcpiTablesOfType (
/*
* tbrsd - RSDP, RSDT utilities
* AcpiTbrsd - RSDP, RSDT utilities
*/
ACPI_STATUS
@ -260,12 +222,11 @@ AcpiTbScanMemoryForRsdp (
ACPI_STATUS
AcpiTbFindRsdp (
ACPI_TABLE_DESC *TableInfo,
UINT32 Flags);
ACPI_TABLE_DESC *TableInfo);
/*
* tbutils - common table utilities
* AcpiTbutils - common table utilities
*/
BOOLEAN
@ -274,7 +235,7 @@ AcpiTbSystemTablePointer (
ACPI_STATUS
AcpiTbMapAcpiTable (
ACPI_PHYSICAL_ADDRESS PhysicalAddress,
void *PhysicalAddress,
UINT32 *Size,
void **LogicalAddress);

181
source/include/actbl.h
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@ -1,7 +1,7 @@
/******************************************************************************
*
* Name: acpitables.h - Table data structures defined in ACPI specification
*
* Name: actbl.h - Table data structures defined in ACPI specification
* $Revision: 1.34 $
*
*****************************************************************************/
@ -38,9 +38,9 @@
* The above copyright and patent license is granted only if the following
* conditions are met:
*
* 3. Conditions
* 3. Conditions
*
* 3.1. Redistribution of Source with Rights to Further Distribute Source.
* 3.1. Redistribution of Source with Rights to Further Distribute Source.
* Redistribution of source code of any substantial portion of the Covered
* Code or modification with rights to further distribute source must include
* the above Copyright Notice, the above License, this list of Conditions,
@ -48,11 +48,11 @@
* Licensee must cause all Covered Code to which Licensee contributes to
* contain a file documenting the changes Licensee made to create that Covered
* Code and the date of any change. Licensee must include in that file the
* documentation of any changes made by any predecessor Licensee. Licensee
* documentation of any changes made by any predecessor Licensee. Licensee
* must include a prominent statement that the modification is derived,
* directly or indirectly, from Original Intel Code.
*
* 3.2. Redistribution of Source with no Rights to Further Distribute Source.
* 3.2. Redistribution of Source with no Rights to Further Distribute Source.
* Redistribution of source code of any substantial portion of the Covered
* Code or modification without rights to further distribute source must
* include the following Disclaimer and Export Compliance provision in the
@ -86,7 +86,7 @@
* INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY
* UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY
* IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A
* PARTICULAR PURPOSE.
* PARTICULAR PURPOSE.
*
* 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES
* OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR
@ -114,10 +114,9 @@
*
*****************************************************************************/
#ifndef __ACPITYPE_H__
#define __ACPITYPE_H__
#ifndef __ACTBL_H__
#define __ACTBL_H__
typedef UINT32 IO_ADDRESS; /* Only for clarity in declarations */
/*
* Values for description table header signatures
@ -132,6 +131,7 @@ typedef UINT32 IO_ADDRESS; /* Only for clarity in decla
#define RSDT_SIG "RSDT" /* Root System Description Table */
#define SSDT_SIG "SSDT" /* Secondary System Description Table */
#define SBST_SIG "SBST" /* Smart Battery Specification Table */
#define BOOT_SIG "BOOT" /* Boot table */
#define GL_OWNED 0x02 /* Ownership of global lock is bit 1 */
@ -147,12 +147,16 @@ typedef UINT32 IO_ADDRESS; /* Only for clarity in decla
#define APIC_IO 1
/*
* Architecture-independent tables
* The architecture dependent tables are in separate files
*/
typedef struct /* Root System Descriptor Pointer */
{
char Signature [8]; /* contains "RSD PTR " */
{
NATIVE_CHAR Signature [8]; /* contains "RSD PTR " */
UINT8 Checksum; /* to make sum of struct == 0 */
char OemId [6]; /* OEM identification */
NATIVE_CHAR OemId [6]; /* OEM identification */
UINT8 Reserved; /* reserved - must be zero */
UINT32 RsdtPhysicalAddress; /* physical address of RSDT */
@ -160,109 +164,27 @@ typedef struct /* Root System Descriptor Pointer */
typedef struct /* ACPI common table header */
{
char Signature [4]; /* identifies type of table */
{
NATIVE_CHAR Signature [4]; /* identifies type of table */
UINT32 Length; /* length of table, in bytes,
* including header */
UINT8 Revision; /* specification minor version # */
UINT8 Checksum; /* to make sum of entire table == 0 */
char OemId [6]; /* OEM identification */
char OemTableId [8]; /* OEM table identification */
NATIVE_CHAR OemId [6]; /* OEM identification */
NATIVE_CHAR OemTableId [8]; /* OEM table identification */
UINT32 OemRevision; /* OEM revision number */
char AslCompilerId [4]; /* ASL compiler vendor ID */
NATIVE_CHAR AslCompilerId [4]; /* ASL compiler vendor ID */
UINT32 AslCompilerRevision; /* ASL compiler revision number */
} ACPI_TABLE_HEADER;
typedef struct /* Root System Description Table */
{
ACPI_TABLE_HEADER header; /* table header */
UINT32 TableOffsetEntry [1]; /* array of pointers to other
* tables' headers */
} ROOT_SYSTEM_DESCRIPTION_TABLE;
typedef struct /* Firmware ACPI Control Structure */
{
char Signature[4]; /* signature "FACS" */
UINT32 Length; /* length of structure, in bytes */
UINT32 HardwareSignature; /* hardware configuration signature */
UINT32 FirmwareWakingVector; /* ACPI OS waking vector */
UINT32 GlobalLock; /* Global Lock */
UINT16_BIT S4Bios_f : 1; /* Indicates if S4BIOS support is present */
UINT16_BIT Reserved1 : 15; /* must be 0 */
UINT16 Reserved2; /* must be 0 */
UINT8 Resverved3 [40]; /* reserved - must be zero */
} FIRMWARE_ACPI_CONTROL_STRUCTURE;
typedef struct /* Fixed ACPI Description Table */
{
ACPI_TABLE_HEADER header; /* table header */
UINT32 FirmwareCtrl; /* Physical addesss of FACS */
UINT32 Dsdt; /* Physical address of DSDT */
UINT8 Model; /* System Interrupt Model */
UINT8 Reserved1; /* reserved */
UINT16 SciInt; /* System vector of SCI interrupt */
IO_ADDRESS SmiCmd; /* Port address of SMI command port */
UINT8 AcpiEnable; /* value to write to smi_cmd to enable ACPI */
UINT8 AcpiDisable; /* value to write to smi_cmd to disable ACPI */
UINT8 S4BiosReq; /* Value to write to SMI CMD to enter S4BIOS state */
UINT8 Reserved2; /* reserved - must be zero */
IO_ADDRESS Pm1aEvtBlk; /* Port address of Power Mgt 1a Event Reg Blk */
IO_ADDRESS Pm1bEvtBlk; /* Port address of Power Mgt 1b Event Reg Blk */
IO_ADDRESS Pm1aCntBlk; /* Port address of Power Mgt 1a Control Reg Blk */
IO_ADDRESS Pm1bCntBlk; /* Port address of Power Mgt 1b Control Reg Blk */
IO_ADDRESS Pm2CntBlk; /* Port address of Power Mgt 2 Control Reg Blk */
IO_ADDRESS PmTmrBlk; /* Port address of Power Mgt Timer Ctrl Reg Blk */
IO_ADDRESS Gpe0Blk; /* Port addr of General Purpose Event 0 Reg Blk */
IO_ADDRESS Gpe1Blk; /* Port addr of General Purpose Event 1 Reg Blk */
UINT8 Pm1EvtLen; /* Byte Length of ports at pm1X_evt_blk */
UINT8 Pm1CntLen; /* Byte Length of ports at pm1X_cnt_blk */
UINT8 Pm2CntLen; /* Byte Length of ports at pm2_cnt_blk */
UINT8 PmTmLen; /* Byte Length of ports at pm_tm_blk */
UINT8 Gpe0BlkLen; /* Byte Length of ports at gpe0_blk */
UINT8 Gpe1BlkLen; /* Byte Length of ports at gpe1_blk */
UINT8 Gpe1Base; /* offset in gpe model where gpe1 events start */
UINT8 Reserved3; /* reserved */
UINT16 PLvl2Lat; /* worst case HW latency to enter/exit C2 state */
UINT16 PLvl3Lat; /* worst case HW latency to enter/exit C3 state */
UINT16 FlushSize; /* Size of area read to flush caches */
UINT16 FlushStride; /* Stride used in flushing caches */
UINT8 DutyOffset; /* bit location of duty cycle field in p_cnt reg */
UINT8 DutyWidth; /* bit width of duty cycle field in p_cnt reg */
UINT8 DayAlrm; /* index to day-of-month alarm in RTC CMOS RAM */
UINT8 MonAlrm; /* index to month-of-year alarm in RTC CMOS RAM */
UINT8 Century; /* index to century in RTC CMOS RAM */
UINT8 Reserved4; /* reserved */
UINT8 Reserved4a; /* reserved */
UINT8 Reserved4b; /* reserved */
UINT16_BIT WBInvd : 1; /* wbinvd instruction works properly */
UINT16_BIT WBInvdFlush : 1; /* wbinvd flushes but does not invalidate */
UINT16_BIT ProcC1 : 1; /* all processors support C1 state */
UINT16_BIT PLvl2Up : 1; /* C2 state works on MP system */
UINT16_BIT PwrButton : 1; /* Power button is handled as a generic feature */
UINT16_BIT SleepButton : 1; /* Sleep button is handled as a generic feature, or not present */
UINT16_BIT FixedRTC : 1; /* RTC wakeup stat not in fixed register space */
UINT16_BIT RTCS4 : 1; /* RTC wakeup stat not possible from S4 */
UINT16_BIT TmrValExt : 1; /* tmr_val is 32 bits */
UINT16_BIT Reserved5 : 7; /* reserved - must be zero */
UINT16 Reserved6; /* reserved - must be zero */
} FIXED_ACPI_DESCRIPTION_TABLE;
typedef struct /* APIC Table */
{
{
ACPI_TABLE_HEADER header; /* table header */
UINT32 LocalApicAddress; /* Physical address for accessing local APICs */
UINT16_BIT PCATCompat : 1; /* a one indicates system also has dual 8259s */
UINT16_BIT Reserved1 : 15;
UINT16 Reserved2;
UINT32_BIT PCATCompat : 1; /* a one indicates system also has dual 8259s */
UINT32_BIT Reserved1 : 31;
} APIC_TABLE;
@ -280,9 +202,8 @@ typedef struct /* Processor APIC */
APIC_HEADER header;
UINT8 ProcessorApicId; /* ACPI processor id */
UINT8 LocalApicId; /* processor's local APIC id */
UINT16_BIT ProcessorEnabled: 1; /* Processor is usable if set */
UINT16_BIT Reserved1 : 15;
UINT16 Reserved2;
UINT32_BIT ProcessorEnabled: 1; /* Processor is usable if set */
UINT32_BIT Reserved1 : 32;
} PROCESSOR_APIC;
@ -298,6 +219,14 @@ typedef struct /* IO APIC */
} IO_APIC;
/*
** IA64 TODO: Add SAPIC Tables
*/
/*
** IA64 TODO: Modify Smart Battery Description to comply with ACPI IA64
** extensions.
*/
typedef struct /* Smart Battery Description Table */
{
ACPI_TABLE_HEADER header;
@ -308,8 +237,6 @@ typedef struct /* Smart Battery Description Table */
} SMART_BATTERY_DESCRIPTION_TABLE;
/*
* ACPI Table information. We save the table address, length,
* and type of memory allocation (mapped or allocated) for each
@ -320,23 +247,35 @@ typedef struct /* Smart Battery Description Table */
#define ACPI_MEM_ALLOCATED 1
#define ACPI_MEM_MAPPED 2
/* Definitions for the Flags bitfield member of ACPI_TABLE_SUPPORT */
#define ACPI_TABLE_SINGLE 0
#define ACPI_TABLE_MULTIPLE 1
/*
* ACPI Table Descriptor. One per ACPI table
*/
typedef struct AcpiTableDesc
/* Data about each known table type */
typedef struct _AcpiTableSupport
{
struct AcpiTableDesc *Prev;
struct AcpiTableDesc *Next;
ACPI_TABLE_HEADER *Pointer;
UINT32 Length;
UINT32 Allocation;
UINT32 Count;
NATIVE_CHAR *Name;
NATIVE_CHAR *Signature;
UINT8 SigLength;
UINT8 Flags;
UINT16 Status;
void **GlobalPtr;
} ACPI_TABLE_DESC;
} ACPI_TABLE_SUPPORT;
#endif /* __ACPITABLES_H__ */
/*
* Get the architecture-specific tables
*/
#ifdef IA64
#include "actbl64.h"
#else
#include "actbl32.h"
#endif
#endif /* __ACTBL_H__ */

26
source/include/actbl1.h
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@ -1,7 +1,7 @@
/******************************************************************************
*
* Name: actbl1.h - ACPI 1.0 tables
* $Revision: 1.13 $
* Name: actbl32.h - ACPI tables specific to IA32
* $Revision: 1.11 $
*
*****************************************************************************/
@ -114,21 +114,21 @@
*
*****************************************************************************/
#ifndef __ACTBL1_H__
#define __ACTBL1_H__
#ifndef __ACTBL32_H__
#define __ACTBL32_H__
/* ACPI V1.0 Root System Description Table */
/* IA32 Root System Description Table */
typedef struct
{
ACPI_TABLE_HEADER header; /* Table header */
UINT32 TableOffsetEntry [1]; /* Array of pointers to other */
/* ACPI tables */
} RSDT_DESCRIPTOR;
void *TableOffsetEntry [1]; /* Array of pointers to other */
/* tables' headers */
} ROOT_SYSTEM_DESCRIPTION_TABLE;
/* ACPI V1.0 Firmware ACPI Control Structure */
/* IA32 Firmware ACPI Control Structure */
typedef struct
{
@ -141,10 +141,10 @@ typedef struct
UINT32_BIT Reserved1 : 31; /* must be 0 */
UINT8 Resverved3 [40]; /* reserved - must be zero */
} FACS_DESCRIPTOR;
} FIRMWARE_ACPI_CONTROL_STRUCTURE;
/* ACPI V1.0 Fixed ACPI Description Table */
/* IA32 Fixed ACPI Description Table */
typedef struct
{
@ -198,9 +198,9 @@ typedef struct
UINT32_BIT TmrValExt : 1; /* tmr_val is 32 bits */
UINT32_BIT Reserved5 : 23; /* reserved - must be zero */
} FADT_DESCRIPTOR;
} FIXED_ACPI_DESCRIPTION_TABLE;
#endif /* __ACTBL1_H__ */
#endif /* __ACTBL32_H__ */

231
source/include/actbl2.h
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@ -1,7 +1,7 @@
/******************************************************************************
*
* Name: actbl2.h - ACPI Specification Revision 2.0 Tables
* $Revision: 1.30 $
* Name: actbl64.h - ACPI tables specific to IA64
* $Revision: 1.12 $
*
*****************************************************************************/
@ -9,8 +9,8 @@
*
* 1. Copyright Notice
*
* Some or all of this work - Copyright (c) 1999 - 2002, Intel Corp.
* All rights reserved.
* Some or all of this work - Copyright (c) 1999, Intel Corp. All rights
* reserved.
*
* 2. License
*
@ -114,164 +114,93 @@
*
*****************************************************************************/
#ifndef __ACTBL2_H__
#define __ACTBL2_H__
/*
* Prefered Power Management Profiles
*/
#define PM_UNSPECIFIED 0
#define PM_DESKTOP 1
#define PM_MOBILE 2
#define PM_WORKSTATION 3
#define PM_ENTERPRISE_SERVER 4
#define PM_SOHO_SERVER 5
#define PM_APPLIANCE_PC 6
/*
* ACPI Boot Arch Flags
*/
#define BAF_LEGACY_DEVICES 0x0001
#define BAF_8042_KEYBOARD_CONTROLLER 0x0002
#define FADT2_REVISION_ID 3
#ifndef __ACTBL64_H__
#define __ACTBL64_H__
#pragma pack(1)
typedef UINT64 IO_ADDRESS; /* Only for clarity in declarations */
/*
* ACPI 2.0 Root System Description Table (RSDT)
*/
typedef struct rsdt_descriptor_rev2
/* IA64 Root System Description Table */
typedef struct
{
ACPI_TABLE_HEADER Header; /* ACPI table header */
UINT32 TableOffsetEntry [1]; /* Array of pointers to */
/* ACPI table headers */
} RSDT_DESCRIPTOR_REV2;
ACPI_TABLE_HEADER header; /* Table header */
UINT32 ReservedPad; /* IA64 alignment, must be 0 */
void *TableOffsetEntry [1]; /* Array of pointers to other */
/* tables' headers */
} ROOT_SYSTEM_DESCRIPTION_TABLE;
/*
* ACPI 2.0 Extended System Description Table (XSDT)
*/
typedef struct xsdt_descriptor_rev2
/* IA64 Firmware ACPI Control Structure */
typedef struct
{
ACPI_TABLE_HEADER Header; /* ACPI table header */
UINT64 TableOffsetEntry [1]; /* Array of pointers to */
/* ACPI table headers */
} XSDT_DESCRIPTOR_REV2;
NATIVE_CHAR Signature[4]; /* signature "FACS" */
UINT32 Length; /* length of structure, in bytes */
UINT32 HardwareSignature; /* hardware configuration signature */
UINT32 Reserved4; /* must be 0 */
UINT64 FirmwareWakingVector; /* ACPI OS waking vector */
UINT64 GlobalLock; /* Global Lock */
UINT32_BIT S4Bios_f : 1; /* Indicates if S4BIOS support is present */
UINT32_BIT Reserved1 : 31; /* must be 0 */
UINT8 Resverved3 [28]; /* reserved - must be zero */
} FIRMWARE_ACPI_CONTROL_STRUCTURE;
/*
* ACPI 2.0 Firmware ACPI Control Structure (FACS)
*/
typedef struct facs_descriptor_rev2
/* IA64 Fixed ACPI Description Table */
typedef struct
{
char Signature[4]; /* ACPI signature */
UINT32 Length; /* Length of structure, in bytes */
UINT32 HardwareSignature; /* Hardware configuration signature */
UINT32 FirmwareWakingVector; /* 32bit physical address of the Firmware Waking Vector. */
UINT32 GlobalLock; /* Global Lock used to synchronize access to shared hardware resources */
UINT32 S4Bios_f : 1; /* S4Bios_f - Indicates if S4BIOS support is present */
UINT32_BIT Reserved1 : 31; /* Must be 0 */
UINT64 XFirmwareWakingVector; /* 64bit physical address of the Firmware Waking Vector. */
UINT8 Version; /* Version of this table */
UINT8 Reserved3 [31]; /* Reserved - must be zero */
ACPI_TABLE_HEADER header; /* table header */
UINT32 ReservedPad; /* IA64 alignment, must be 0 */
ACPI_TBLPTR FirmwareCtrl; /* Physical address of FACS */
ACPI_TBLPTR Dsdt; /* Physical address of DSDT */
UINT8 Model; /* System Interrupt Model */
UINT8 AddressSpace; /* Address Space Bitmask */
UINT16 SciInt; /* System vector of SCI interrupt */
UINT8 AcpiEnable; /* value to write to smi_cmd to enable ACPI */
UINT8 AcpiDisable; /* value to write to smi_cmd to disable ACPI */
UINT8 S4BiosReq; /* Value to write to SMI CMD to enter S4BIOS state */
UINT8 Reserved2; /* reserved - must be zero */
UINT64 SmiCmd; /* Port address of SMI command port */
UINT64 Pm1aEvtBlk; /* Port address of Power Mgt 1a AcpiEvent Reg Blk */
UINT64 Pm1bEvtBlk; /* Port address of Power Mgt 1b AcpiEvent Reg Blk */
UINT64 Pm1aCntBlk; /* Port address of Power Mgt 1a Control Reg Blk */
UINT64 Pm1bCntBlk; /* Port address of Power Mgt 1b Control Reg Blk */
UINT64 Pm2CntBlk; /* Port address of Power Mgt 2 Control Reg Blk */
UINT64 PmTmrBlk; /* Port address of Power Mgt Timer Ctrl Reg Blk */
UINT64 Gpe0Blk; /* Port addr of General Purpose AcpiEvent 0 Reg Blk */
UINT64 Gpe1Blk; /* Port addr of General Purpose AcpiEvent 1 Reg Blk */
UINT8 Pm1EvtLen; /* Byte Length of ports at pm1X_evt_blk */
UINT8 Pm1CntLen; /* Byte Length of ports at pm1X_cnt_blk */
UINT8 Pm2CntLen; /* Byte Length of ports at pm2_cnt_blk */
UINT8 PmTmLen; /* Byte Length of ports at pm_tm_blk */
UINT8 Gpe0BlkLen; /* Byte Length of ports at gpe0_blk */
UINT8 Gpe1BlkLen; /* Byte Length of ports at gpe1_blk */
UINT8 Gpe1Base; /* offset in gpe model where gpe1 events start */
UINT8 Reserved3; /* reserved */
UINT16 Plvl2Lat; /* worst case HW latency to enter/exit C2 state */
UINT16 Plvl3Lat; /* worst case HW latency to enter/exit C3 state */
UINT8 DayAlrm; /* index to day-of-month alarm in RTC CMOS RAM */
UINT8 MonAlrm; /* index to month-of-year alarm in RTC CMOS RAM */
UINT8 Century; /* index to century in RTC CMOS RAM */
UINT8 Reserved4; /* reserved */
UINT32_BIT FlushCash : 1; /* PAL_FLUSH_CACHE is correctly supported */
UINT32_BIT Reserved5 : 1; /* reserved - must be zero */
UINT32_BIT ProcC1 : 1; /* all processors support C1 state */
UINT32_BIT Plvl2Up : 1; /* C2 state works on MP system */
UINT32_BIT PwrButton : 1; /* Power button is handled as a generic feature */
UINT32_BIT SleepButton : 1; /* Sleep button is handled as a generic feature, or not present */
UINT32_BIT FixedRTC : 1; /* RTC wakeup stat not in fixed register space */
UINT32_BIT Rtcs4 : 1; /* RTC wakeup stat not possible from S4 */
UINT32_BIT TmrValExt : 1; /* tmr_val is 32 bits */
UINT32_BIT DockCap : 1; /* Supports Docking */
UINT32_BIT Reserved6 : 22; /* reserved - must be zero */
} FACS_DESCRIPTOR_REV2;
} FIXED_ACPI_DESCRIPTION_TABLE;
/*
* ACPI 2.0 Generic Address Structure (GAS)
*/
typedef struct acpi_generic_address
{
UINT8 AddressSpaceId; /* Address space where struct or register exists. */
UINT8 RegisterBitWidth; /* Size in bits of given register */
UINT8 RegisterBitOffset; /* Bit offset within the register */
UINT8 Reserved; /* Must be 0 */
UINT64 Address; /* 64-bit address of struct or register */
} ACPI_GENERIC_ADDRESS;
/*
* ACPI 2.0 Fixed ACPI Description Table (FADT)
*/
typedef struct fadt_descriptor_rev2
{
ACPI_TABLE_HEADER Header; /* ACPI table header */
UINT32 V1_FirmwareCtrl; /* 32-bit physical address of FACS */
UINT32 V1_Dsdt; /* 32-bit physical address of DSDT */
UINT8 Reserved1; /* System Interrupt Model isn't used in ACPI 2.0*/
UINT8 Prefer_PM_Profile; /* Conveys preferred power management profile to OSPM. */
UINT16 SciInt; /* System vector of SCI interrupt */
UINT32 SmiCmd; /* Port address of SMI command port */
UINT8 AcpiEnable; /* Value to write to smi_cmd to enable ACPI */
UINT8 AcpiDisable; /* Value to write to smi_cmd to disable ACPI */
UINT8 S4BiosReq; /* Value to write to SMI CMD to enter S4BIOS state */
UINT8 PstateCnt; /* Processor performance state control*/
UINT32 V1_Pm1aEvtBlk; /* Port address of Power Mgt 1a AcpiEvent Reg Blk */
UINT32 V1_Pm1bEvtBlk; /* Port address of Power Mgt 1b AcpiEvent Reg Blk */
UINT32 V1_Pm1aCntBlk; /* Port address of Power Mgt 1a Control Reg Blk */
UINT32 V1_Pm1bCntBlk; /* Port address of Power Mgt 1b Control Reg Blk */
UINT32 V1_Pm2CntBlk; /* Port address of Power Mgt 2 Control Reg Blk */
UINT32 V1_PmTmrBlk; /* Port address of Power Mgt Timer Ctrl Reg Blk */
UINT32 V1_Gpe0Blk; /* Port addr of General Purpose AcpiEvent 0 Reg Blk */
UINT32 V1_Gpe1Blk; /* Port addr of General Purpose AcpiEvent 1 Reg Blk */
UINT8 Pm1EvtLen; /* Byte Length of ports at pm1X_evt_blk */
UINT8 Pm1CntLen; /* Byte Length of ports at pm1X_cnt_blk */
UINT8 Pm2CntLen; /* Byte Length of ports at pm2_cnt_blk */
UINT8 PmTmLen; /* Byte Length of ports at pm_tm_blk */
UINT8 Gpe0BlkLen; /* Byte Length of ports at gpe0_blk */
UINT8 Gpe1BlkLen; /* Byte Length of ports at gpe1_blk */
UINT8 Gpe1Base; /* Offset in gpe model where gpe1 events start */
UINT8 CstCnt; /* Support for the _CST object and C States change notification.*/
UINT16 Plvl2Lat; /* Worst case HW latency to enter/exit C2 state */
UINT16 Plvl3Lat; /* Worst case HW latency to enter/exit C3 state */
UINT16 FlushSize; /* Number of flush strides that need to be read */
UINT16 FlushStride; /* Processor's memory cache line width, in bytes */
UINT8 DutyOffset; /* Processor's duty cycle index in processor's P_CNT reg*/
UINT8 DutyWidth; /* Processor's duty cycle value bit width in P_CNT register.*/
UINT8 DayAlrm; /* Index to day-of-month alarm in RTC CMOS RAM */
UINT8 MonAlrm; /* Index to month-of-year alarm in RTC CMOS RAM */
UINT8 Century; /* Index to century in RTC CMOS RAM */
UINT16 IapcBootArch; /* IA-PC Boot Architecture Flags. See Table 5-10 for description*/
UINT8 Reserved2; /* Reserved */
UINT32_BIT WbInvd : 1; /* The wbinvd instruction works properly */
UINT32_BIT WbInvdFlush : 1; /* The wbinvd flushes but does not invalidate */
UINT32_BIT ProcC1 : 1; /* All processors support C1 state */
UINT32_BIT Plvl2Up : 1; /* C2 state works on MP system */
UINT32_BIT PwrButton : 1; /* Power button is handled as a generic feature */
UINT32_BIT SleepButton : 1; /* Sleep button is handled as a generic feature, or not present */
UINT32_BIT FixedRTC : 1; /* RTC wakeup stat not in fixed register space */
UINT32_BIT Rtcs4 : 1; /* RTC wakeup stat not possible from S4 */
UINT32_BIT TmrValExt : 1; /* Indicates tmr_val is 32 bits 0=24-bits*/
UINT32_BIT DockCap : 1; /* Supports Docking */
UINT32_BIT ResetRegSup : 1; /* Indicates system supports system reset via the FADT RESET_REG*/
UINT32_BIT SealedCase : 1; /* Indicates system has no internal expansion capabilities and case is sealed. */
UINT32_BIT Headless : 1; /* Indicates system does not have local video capabilities or local input devices.*/
UINT32_BIT CpuSwSleep : 1; /* Indicates to OSPM that a processor native instruction */
/* Must be executed after writing the SLP_TYPx register. */
UINT32_BIT Reserved6 : 18; /* Reserved - must be zero */
ACPI_GENERIC_ADDRESS ResetRegister; /* Reset register address in GAS format */
UINT8 ResetValue; /* Value to write to the ResetRegister port to reset the system. */
UINT8 Reserved7[3]; /* These three bytes must be zero */
UINT64 XFirmwareCtrl; /* 64-bit physical address of FACS */
UINT64 XDsdt; /* 64-bit physical address of DSDT */
ACPI_GENERIC_ADDRESS XPm1aEvtBlk; /* Extended Power Mgt 1a AcpiEvent Reg Blk address */
ACPI_GENERIC_ADDRESS XPm1bEvtBlk; /* Extended Power Mgt 1b AcpiEvent Reg Blk address */
ACPI_GENERIC_ADDRESS XPm1aCntBlk; /* Extended Power Mgt 1a Control Reg Blk address */
ACPI_GENERIC_ADDRESS XPm1bCntBlk; /* Extended Power Mgt 1b Control Reg Blk address */
ACPI_GENERIC_ADDRESS XPm2CntBlk; /* Extended Power Mgt 2 Control Reg Blk address */
ACPI_GENERIC_ADDRESS XPmTmrBlk; /* Extended Power Mgt Timer Ctrl Reg Blk address */
ACPI_GENERIC_ADDRESS XGpe0Blk; /* Extended General Purpose AcpiEvent 0 Reg Blk address */
ACPI_GENERIC_ADDRESS XGpe1Blk; /* Extended General Purpose AcpiEvent 1 Reg Blk address */
} FADT_DESCRIPTOR_REV2;
#pragma pack()
#endif /* __ACTBL2_H__ */
#endif /* __ACTBL64_H__ */

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source/include/actypes.h
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