mirror of
https://github.com/acpica/acpica/
synced 2025-02-07 09:04:21 +03:00
Removed unnecessary macro (to make the 16-bit version build)
date 2002.02.01.22.45.00; author rmoore1; state Exp;
This commit is contained in:
aystarik
parent
e9d5df00ae
commit
a527db8193
@ -3,7 +3,7 @@
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*
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* Module Name: hwregs - Read/write access functions for the various ACPI
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* control and status registers.
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* $Revision: 1.115 $
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* $Revision: 1.117 $
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*
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******************************************************************************/
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@ -126,35 +126,6 @@
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MODULE_NAME ("hwregs")
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/*******************************************************************************
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*
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* FUNCTION: AcpiHwGetBitShift
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*
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* PARAMETERS: Mask - Input mask to determine bit shift from.
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* Must have at least 1 bit set.
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*
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* RETURN: Bit location of the lsb of the mask
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*
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* DESCRIPTION: Returns the bit number for the low order bit that's set.
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*
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******************************************************************************/
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UINT32
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AcpiHwGetBitShift (
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UINT32 Mask)
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{
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UINT32 Shift;
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FUNCTION_TRACE ("HwGetBitShift");
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for (Shift = 0; ((Mask >> Shift) & 1) == 0; Shift++)
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{ ; }
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return_VALUE (Shift);
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}
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/*******************************************************************************
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*
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@ -171,21 +142,22 @@ AcpiHwGetBitShift (
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void
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AcpiHwClearAcpiStatus (void)
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{
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UINT16 GpeLength;
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UINT16 Index;
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NATIVE_UINT i;
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NATIVE_UINT GpeBlock;
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FUNCTION_TRACE ("HwClearAcpiStatus");
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ACPI_DEBUG_PRINT ((ACPI_DB_IO, "About to write %04X to %04X\n",
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ACPI_ALL_FIXED_STATUS_BITS,
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ACPI_BITMASK_ALL_FIXED_STATUS,
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(UINT16) ACPI_GET_ADDRESS (AcpiGbl_FADT->XPm1aEvtBlk.Address)));
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AcpiUtAcquireMutex (ACPI_MTX_HARDWARE);
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AcpiHwRegisterWrite (ACPI_MTX_DO_NOT_LOCK, ACPI_PM1_STATUS, ACPI_ALL_FIXED_STATUS_BITS);
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AcpiHwRegisterWrite (ACPI_MTX_DO_NOT_LOCK, ACPI_REGISTER_PM1_STATUS,
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ACPI_BITMASK_ALL_FIXED_STATUS);
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/* Clear the fixed events */
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@ -193,31 +165,17 @@ AcpiHwClearAcpiStatus (void)
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{
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AcpiOsWritePort ((ACPI_IO_ADDRESS)
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ACPI_GET_ADDRESS (AcpiGbl_FADT->XPm1bEvtBlk.Address),
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ACPI_ALL_FIXED_STATUS_BITS, 16);
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ACPI_BITMASK_ALL_FIXED_STATUS, 16);
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}
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/* Clear the GPE Bits */
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if (AcpiGbl_FADT->Gpe0BlkLen)
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for (GpeBlock = 0; GpeBlock < ACPI_MAX_GPE_BLOCKS; GpeBlock++)
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{
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GpeLength = (UINT16) DIV_2 (AcpiGbl_FADT->Gpe0BlkLen);
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for (Index = 0; Index < GpeLength; Index++)
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for (i = 0; i < AcpiGbl_GpeBlockInfo[GpeBlock].RegisterCount; i++)
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{
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AcpiOsWritePort ((ACPI_IO_ADDRESS) (
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ACPI_GET_ADDRESS (AcpiGbl_FADT->XGpe0Blk.Address) + Index),
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0xFF, 8);
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}
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}
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if (AcpiGbl_FADT->Gpe1BlkLen)
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{
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GpeLength = (UINT16) DIV_2 (AcpiGbl_FADT->Gpe1BlkLen);
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for (Index = 0; Index < GpeLength; Index++)
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{
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AcpiOsWritePort ((ACPI_IO_ADDRESS) (
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ACPI_GET_ADDRESS (AcpiGbl_FADT->XGpe1Blk.Address) + Index),
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AcpiOsWritePort ((ACPI_IO_ADDRESS)
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(AcpiGbl_GpeBlockInfo[GpeBlock].BlockAddress + i),
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0xFF, 8);
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}
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}
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@ -229,37 +187,37 @@ AcpiHwClearAcpiStatus (void)
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/*******************************************************************************
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*
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* FUNCTION: AcpiHwObtainSleepTypeRegisterData
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* FUNCTION: AcpiHwGetSleepTypeData
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*
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* PARAMETERS: SleepState - Numeric state requested
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* *Slp_TypA - Pointer to byte to receive SLP_TYPa value
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* *Slp_TypB - Pointer to byte to receive SLP_TYPb value
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* PARAMETERS: SleepState - Numeric sleep state
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* *SleepTypeA - Where SLP_TYPa is returned
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* *SleepTypeB - Where SLP_TYPb is returned
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*
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* RETURN: Status - ACPI status
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*
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* DESCRIPTION: AcpiHwObtainSleepTypeRegisterData() obtains the SLP_TYP and
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* SLP_TYPb values for the sleep state requested.
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* DESCRIPTION: Obtain the SLP_TYPa and SLP_TYPb values for the requested sleep
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* state.
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*
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******************************************************************************/
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ACPI_STATUS
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AcpiHwObtainSleepTypeRegisterData (
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AcpiHwGetSleepTypeData (
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UINT8 SleepState,
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UINT8 *Slp_TypA,
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UINT8 *Slp_TypB)
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UINT8 *SleepTypeA,
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UINT8 *SleepTypeB)
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{
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ACPI_STATUS Status = AE_OK;
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ACPI_OPERAND_OBJECT *ObjDesc;
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FUNCTION_TRACE ("HwObtainSleepTypeRegisterData");
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FUNCTION_TRACE ("HwGetSleepTypeData");
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/*
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* Validate parameters
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*/
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if ((SleepState > ACPI_S_STATES_MAX) ||
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!Slp_TypA || !Slp_TypB)
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!SleepTypeA || !SleepTypeB)
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{
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return_ACPI_STATUS (AE_BAD_PARAMETER);
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}
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@ -296,25 +254,23 @@ AcpiHwObtainSleepTypeRegisterData (
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/* Must have at least two elements */
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REPORT_ERROR (("Sleep State package does not have at least two elements\n"));
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Status = AE_ERROR;
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Status = AE_AML_NO_OPERAND;
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}
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else if (((ObjDesc->Package.Elements[0])->Common.Type !=
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ACPI_TYPE_INTEGER) ||
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((ObjDesc->Package.Elements[1])->Common.Type !=
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ACPI_TYPE_INTEGER))
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else if (((ObjDesc->Package.Elements[0])->Common.Type != ACPI_TYPE_INTEGER) ||
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((ObjDesc->Package.Elements[1])->Common.Type != ACPI_TYPE_INTEGER))
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{
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/* Must have two */
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REPORT_ERROR (("Sleep State package elements are not both of type Number\n"));
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Status = AE_ERROR;
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Status = AE_AML_OPERAND_TYPE;
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}
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else
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{
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/*
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* Valid _Sx_ package size, type, and value
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*/
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*Slp_TypA = (UINT8) (ObjDesc->Package.Elements[0])->Integer.Value;
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*Slp_TypB = (UINT8) (ObjDesc->Package.Elements[1])->Integer.Value;
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*SleepTypeA = (UINT8) (ObjDesc->Package.Elements[0])->Integer.Value;
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*SleepTypeB = (UINT8) (ObjDesc->Package.Elements[1])->Integer.Value;
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}
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if (ACPI_FAILURE (Status))
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@ -328,7 +284,6 @@ AcpiHwObtainSleepTypeRegisterData (
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}
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/*******************************************************************************
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*
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* FUNCTION: AcpiHwGetRegisterBitMask
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@ -341,164 +296,123 @@ AcpiHwObtainSleepTypeRegisterData (
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*
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******************************************************************************/
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UINT32
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AcpiHwGetRegisterBitMask (
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ACPI_BIT_REGISTER_INFO *
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AcpiHwGetBitRegisterInfo (
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UINT32 RegisterId)
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{
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PROC_NAME ("HwGetBitRegisterInfo");
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switch (ACPI_GET_REGISTER_BLOCK_ID (RegisterId))
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if (RegisterId > ACPI_BITREG_MAX)
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{
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case ACPI_PM1_STATUS:
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switch (RegisterId)
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{
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case ACPI_TIMER_STATUS:
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return (ACPI_TIMER_STATUS_MASK);
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case ACPI_BM_STATUS:
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return (ACPI_BM_STATUS_MASK);
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case ACPI_GBL_LOCK_STATUS:
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return (ACPI_GBL_LOCK_STATUS_MASK);
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case ACPI_POWER_BTN_STATUS:
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return (ACPI_POWER_BTN_STATUS_MASK);
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case ACPI_SLEEP_BTN_STATUS:
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return (ACPI_SLEEP_BTN_STATUS_MASK);
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case ACPI_RT_CLOCK_STATUS:
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return (ACPI_RT_CLOCK_STATUS_MASK);
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case ACPI_WAKE_STATUS:
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return (ACPI_WAKE_STATUS_MASK);
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default:
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return (0);
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}
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case ACPI_PM1_ENABLE:
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switch (RegisterId)
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{
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case ACPI_TIMER_ENABLE:
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return (ACPI_TIMER_ENABLE_MASK);
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case ACPI_GBL_LOCK_ENABLE:
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return (ACPI_GBL_LOCK_ENABLE_MASK);
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case ACPI_POWER_BTN_ENABLE:
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return (ACPI_POWER_BTN_ENABLE_MASK);
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case ACPI_SLEEP_BTN_ENABLE:
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return (ACPI_SLEEP_BTN_ENABLE_MASK);
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case ACPI_RT_CLOCK_ENABLE:
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return (ACPI_RT_CLOCK_ENABLE_MASK);
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default:
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return (0);
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}
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case ACPI_PM1_CONTROL:
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switch (RegisterId)
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{
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case ACPI_SCI_ENABLE:
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return (ACPI_SCI_ENABLE_MASK);
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case ACPI_BM_RLD:
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return (ACPI_BM_RLD_MASK);
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case ACPI_GBL_LOCK_RELEASE:
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return (ACPI_GBL_LOCK_RELEASE_MASK);
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case ACPI_SLEEP_TYPE_A:
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case ACPI_SLEEP_TYPE_B:
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return (ACPI_SLEEP_TYPE_X_MASK);
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case ACPI_SLEEP_ENABLE:
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return (ACPI_SLEEP_ENABLE_MASK);
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default:
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return (0);
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}
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case ACPI_PM2_CONTROL:
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switch (RegisterId)
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{
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case ACPI_ARB_DIS:
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return (ACPI_ARB_DIS_MASK);
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default:
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return (0);
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}
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case ACPI_PM_TIMER:
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return (ACPI_TIMER_VAL_MASK);
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default:
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return (0);
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ACPI_DEBUG_PRINT ((ACPI_DB_ERROR, "Invalid BitRegister ID: %X\n", RegisterId));
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return (NULL);
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}
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}
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return (&AcpiGbl_BitRegisterInfo[RegisterId]);
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}
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/*******************************************************************************
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*
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* FUNCTION: AcpiHwRegisterBitAccess
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* FUNCTION: AcpiHwBitRegisterRead
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*
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* PARAMETERS: ReadWrite - Either ACPI_READ or ACPI_WRITE.
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* PARAMETERS: RegisterId - index of ACPI Register to access
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* UseLock - Lock the hardware
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* RegisterId - index of ACPI Register to access
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* Value - (only used on write) value to write to the
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* Register. Shifted all the way right.
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*
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* RETURN: Value written to or read from specified Register. This value
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* is shifted all the way right.
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* RETURN: Value is read from specified Register. Value returned is
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* normalized to bit0 (is shifted all the way right)
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*
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* DESCRIPTION: Generic ACPI Register read/write function.
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* DESCRIPTION: ACPI BitRegister read function.
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*
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******************************************************************************/
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UINT32
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AcpiHwRegisterBitAccess (
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NATIVE_UINT ReadWrite,
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BOOLEAN UseLock,
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AcpiHwBitRegisterRead (
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UINT32 RegisterId,
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...) /* Value (only used on write) */
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UINT32 Flags)
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{
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UINT32 RegisterValue = 0;
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UINT32 Mask = 0;
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UINT32 Value = 0;
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va_list marker;
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ACPI_BIT_REGISTER_INFO *BitRegInfo;
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FUNCTION_TRACE ("HwRegisterBitAccess");
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FUNCTION_TRACE ("HwBitRegisterRead");
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if (ReadWrite == ACPI_WRITE)
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{
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va_start (marker, RegisterId);
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Value = va_arg (marker, UINT32);
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va_end (marker);
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}
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if (ACPI_MTX_LOCK == UseLock)
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if (Flags & ACPI_MTX_LOCK)
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{
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AcpiUtAcquireMutex (ACPI_MTX_HARDWARE);
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}
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/* Get the info structure corresponding to the requested ACPI Register */
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BitRegInfo = AcpiHwGetBitRegisterInfo (RegisterId);
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if (!BitRegInfo)
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{
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return_ACPI_STATUS (AE_BAD_PARAMETER);
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}
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RegisterValue = AcpiHwRegisterRead (ACPI_MTX_DO_NOT_LOCK, BitRegInfo->ParentRegister);
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if (Flags & ACPI_MTX_LOCK)
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{
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AcpiUtReleaseMutex (ACPI_MTX_HARDWARE);
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}
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/* Normalize the value that was read */
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RegisterValue = ((RegisterValue & BitRegInfo->AccessBitMask) >> BitRegInfo->BitPosition);
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ACPI_DEBUG_PRINT ((ACPI_DB_IO, "ACPI RegisterRead: got %X\n", RegisterValue));
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return_VALUE (RegisterValue);
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}
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Mask = AcpiHwGetRegisterBitMask (RegisterId);
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/*******************************************************************************
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*
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* FUNCTION: AcpiHwBitRegisterWrite
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*
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* PARAMETERS: RegisterId - ID of ACPI BitRegister to access
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* Value - (only used on write) value to write to the
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* Register, NOT pre-normalized to the bit pos.
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* Flags - Lock the hardware or not
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*
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* RETURN: Value written to from specified Register. This value
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* is shifted all the way right.
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*
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* DESCRIPTION: ACPI Bit Register write function.
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*
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******************************************************************************/
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UINT32
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AcpiHwBitRegisterWrite (
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UINT32 RegisterId,
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UINT32 Value,
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UINT32 Flags)
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{
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UINT32 RegisterValue = 0;
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ACPI_BIT_REGISTER_INFO *BitRegInfo;
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FUNCTION_TRACE_U32 ("HwBitRegisterWrite", RegisterId);
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if (Flags & ACPI_MTX_LOCK)
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{
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AcpiUtAcquireMutex (ACPI_MTX_HARDWARE);
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}
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/* Get the info structure corresponding to the requested ACPI Register */
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BitRegInfo = AcpiHwGetBitRegisterInfo (RegisterId);
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if (!BitRegInfo)
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{
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return_ACPI_STATUS (AE_BAD_PARAMETER);
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}
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/* Always do a register read first so we can insert the new bits */
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RegisterValue = AcpiHwRegisterRead (ACPI_MTX_DO_NOT_LOCK, BitRegInfo->ParentRegister);
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/*
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* Decode the Register ID
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@ -507,201 +421,84 @@ AcpiHwRegisterBitAccess (
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* Check bit id to fine locate Register offset.
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* Check Mask to determine Register offset, and then read-write.
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*/
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switch (ACPI_GET_REGISTER_BLOCK_ID (RegisterId))
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switch (BitRegInfo->ParentRegister)
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{
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case ACPI_PM1_STATUS:
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case ACPI_REGISTER_PM1_STATUS:
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RegisterValue = AcpiHwRegisterRead (ACPI_MTX_DO_NOT_LOCK, ACPI_PM1_STATUS);
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if (ReadWrite == ACPI_WRITE)
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/*
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* Status Registers are different from the rest. Clear by
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* writing 1, writing 0 has no effect. So, the only relevent
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* information is the single bit we're interested in, all others should
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* be written as 0 so they will be left unchanged
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*/
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Value = ACPI_REGISTER_PREPARE_BITS (Value, BitRegInfo->BitPosition, BitRegInfo->AccessBitMask);
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if (Value)
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{
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/*
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* Status Registers are different from the rest. Clear by
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* writing 1, writing 0 has no effect. So, the only relevent
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* information is the single bit we're interested in, all
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* others should be written as 0 so they will be left
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* unchanged
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*/
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Value <<= AcpiHwGetBitShift (Mask);
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Value &= Mask;
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if (Value)
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{
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AcpiHwRegisterWrite (ACPI_MTX_DO_NOT_LOCK, ACPI_PM1_STATUS,
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(UINT16) Value);
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RegisterValue = 0;
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}
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AcpiHwRegisterWrite (ACPI_MTX_DO_NOT_LOCK, ACPI_REGISTER_PM1_STATUS,
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(UINT16) Value);
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RegisterValue = 0;
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}
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break;
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case ACPI_PM1_ENABLE:
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case ACPI_REGISTER_PM1_ENABLE:
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RegisterValue = AcpiHwRegisterRead (ACPI_MTX_DO_NOT_LOCK, ACPI_PM1_ENABLE);
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ACPI_REGISTER_INSERT_VALUE (RegisterValue, BitRegInfo->BitPosition, BitRegInfo->AccessBitMask, Value);
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if (ReadWrite == ACPI_WRITE)
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{
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RegisterValue &= ~Mask;
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Value <<= AcpiHwGetBitShift (Mask);
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Value &= Mask;
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RegisterValue |= Value;
|
||||
|
||||
AcpiHwRegisterWrite (ACPI_MTX_DO_NOT_LOCK, ACPI_PM1_ENABLE, (UINT16) RegisterValue);
|
||||
}
|
||||
AcpiHwRegisterWrite (ACPI_MTX_DO_NOT_LOCK, ACPI_REGISTER_PM1_ENABLE, (UINT16) RegisterValue);
|
||||
break;
|
||||
|
||||
|
||||
case ACPI_PM1_CONTROL:
|
||||
case ACPI_REGISTER_PM1_CONTROL:
|
||||
|
||||
/*
|
||||
* Read the PM1 Control register.
|
||||
* Note that at this level, the fact that there are actually TWO
|
||||
* registers (A and B) and that B may not exist, are abstracted.
|
||||
* registers (A and B - and that B may not exist) is abstracted.
|
||||
*/
|
||||
RegisterValue = AcpiHwRegisterRead (ACPI_MTX_DO_NOT_LOCK, ACPI_PM1_CONTROL);
|
||||
|
||||
ACPI_DEBUG_PRINT ((ACPI_DB_IO, "PM1 control: Read %X\n", RegisterValue));
|
||||
|
||||
if (ReadWrite == ACPI_WRITE)
|
||||
{
|
||||
RegisterValue &= ~Mask;
|
||||
Value <<= AcpiHwGetBitShift (Mask);
|
||||
Value &= Mask;
|
||||
RegisterValue |= Value;
|
||||
|
||||
/*
|
||||
* SLP_TYPE_x Registers are written differently
|
||||
* than any other control Registers with
|
||||
* respect to A and B Registers. The value
|
||||
* for A may be different than the value for B
|
||||
*
|
||||
* Therefore, pass the RegisterId, not just generic PM1_CONTROL,
|
||||
* because we need to do different things. Yuck.
|
||||
*/
|
||||
AcpiHwRegisterWrite (ACPI_MTX_DO_NOT_LOCK, RegisterId,
|
||||
(UINT16) RegisterValue);
|
||||
}
|
||||
ACPI_REGISTER_INSERT_VALUE (RegisterValue, BitRegInfo->BitPosition, BitRegInfo->AccessBitMask, Value);
|
||||
|
||||
AcpiHwRegisterWrite (ACPI_MTX_DO_NOT_LOCK, RegisterId,
|
||||
(UINT16) RegisterValue);
|
||||
break;
|
||||
|
||||
|
||||
case ACPI_PM2_CONTROL:
|
||||
case ACPI_REGISTER_PM2_CONTROL:
|
||||
|
||||
RegisterValue = AcpiHwRegisterRead (ACPI_MTX_DO_NOT_LOCK, ACPI_PM2_CONTROL);
|
||||
RegisterValue = AcpiHwRegisterRead (ACPI_MTX_DO_NOT_LOCK, ACPI_REGISTER_PM2_CONTROL);
|
||||
|
||||
ACPI_DEBUG_PRINT ((ACPI_DB_IO, "PM2 control: Read %X from %8.8X%8.8X\n",
|
||||
RegisterValue, HIDWORD (AcpiGbl_FADT->XPm2CntBlk.Address),
|
||||
LODWORD(AcpiGbl_FADT->XPm2CntBlk.Address)));
|
||||
|
||||
if (ReadWrite == ACPI_WRITE)
|
||||
{
|
||||
RegisterValue &= ~Mask;
|
||||
Value <<= AcpiHwGetBitShift (Mask);
|
||||
Value &= Mask;
|
||||
RegisterValue |= Value;
|
||||
ACPI_REGISTER_INSERT_VALUE (RegisterValue, BitRegInfo->BitPosition, BitRegInfo->AccessBitMask, Value);
|
||||
|
||||
ACPI_DEBUG_PRINT ((ACPI_DB_IO, "About to write %04X to %8.8X%8.8X\n",
|
||||
RegisterValue,
|
||||
HIDWORD (AcpiGbl_FADT->XPm2CntBlk.Address),
|
||||
LODWORD (AcpiGbl_FADT->XPm2CntBlk.Address)));
|
||||
|
||||
AcpiHwRegisterWrite (ACPI_MTX_DO_NOT_LOCK,
|
||||
ACPI_PM2_CONTROL, (UINT8) (RegisterValue));
|
||||
}
|
||||
break;
|
||||
|
||||
|
||||
case ACPI_PM_TIMER:
|
||||
|
||||
RegisterValue = AcpiHwRegisterRead (ACPI_MTX_DO_NOT_LOCK,
|
||||
ACPI_PM_TIMER);
|
||||
ACPI_DEBUG_PRINT ((ACPI_DB_IO, "PM_TIMER: Read %X from %8.8X%8.8X\n",
|
||||
ACPI_DEBUG_PRINT ((ACPI_DB_IO, "About to write %04X to %8.8X%8.8X\n",
|
||||
RegisterValue,
|
||||
HIDWORD (AcpiGbl_FADT->XPmTmrBlk.Address),
|
||||
LODWORD (AcpiGbl_FADT->XPmTmrBlk.Address)));
|
||||
HIDWORD (AcpiGbl_FADT->XPm2CntBlk.Address),
|
||||
LODWORD (AcpiGbl_FADT->XPm2CntBlk.Address)));
|
||||
|
||||
AcpiHwRegisterWrite (ACPI_MTX_DO_NOT_LOCK,
|
||||
ACPI_REGISTER_PM2_CONTROL, (UINT8) (RegisterValue));
|
||||
break;
|
||||
|
||||
|
||||
case ACPI_GPE1_ENABLE_BLOCK:
|
||||
case ACPI_GPE1_STATUS_BLOCK:
|
||||
case ACPI_GPE0_ENABLE_BLOCK:
|
||||
case ACPI_GPE0_STATUS_BLOCK:
|
||||
|
||||
/* Determine the bit to be accessed
|
||||
*
|
||||
* (UINT32) RegisterId:
|
||||
* 31 24 16 8 0
|
||||
* +--------+--------+--------+--------+
|
||||
* | gpe_block_id | gpe_bit_number |
|
||||
* +--------+--------+--------+--------+
|
||||
*
|
||||
* gpe_block_id is one of GPE[01]_ENABLE_BLOCK and GPE[01]_STATUS_BLOCK
|
||||
* gpe_bit_number is relative from the gpe_block (0x00~0xFF)
|
||||
*/
|
||||
Mask = ACPI_GET_REGISTER_BIT_ID (RegisterId); /* gpe_bit_number */
|
||||
RegisterId = ACPI_GET_REGISTER_BLOCK_ID (RegisterId) | (Mask >> 3);
|
||||
Mask = AcpiGbl_DecodeTo8bit [Mask & 0x07];
|
||||
|
||||
/*
|
||||
* The base address of the GPE 0 Register Block
|
||||
* Plus 1/2 the length of the GPE 0 Register Block
|
||||
* The enable Register is the Register following the Status Register
|
||||
* and each Register is defined as 1/2 of the total Register Block
|
||||
*/
|
||||
|
||||
/*
|
||||
* This sets the bit within EnableBit that needs to be written to
|
||||
* the Register indicated in Mask to a 1, all others are 0
|
||||
*/
|
||||
|
||||
/* Now get the current Enable Bits in the selected Reg */
|
||||
|
||||
RegisterValue = AcpiHwRegisterRead (ACPI_MTX_DO_NOT_LOCK, RegisterId);
|
||||
ACPI_DEBUG_PRINT ((ACPI_DB_IO, "GPE Enable bits: Read %X from %X\n",
|
||||
RegisterValue, RegisterId));
|
||||
|
||||
if (ReadWrite == ACPI_WRITE)
|
||||
{
|
||||
RegisterValue &= ~Mask;
|
||||
Value <<= AcpiHwGetBitShift (Mask);
|
||||
Value &= Mask;
|
||||
RegisterValue |= Value;
|
||||
|
||||
/*
|
||||
* This write will put the Action state into the General Purpose
|
||||
* Enable Register indexed by the value in Mask
|
||||
*/
|
||||
ACPI_DEBUG_PRINT ((ACPI_DB_IO, "About to write %04X to %04X\n",
|
||||
RegisterValue, RegisterId));
|
||||
|
||||
AcpiHwRegisterWrite (ACPI_MTX_DO_NOT_LOCK, RegisterId,
|
||||
(UINT8) RegisterValue);
|
||||
RegisterValue = AcpiHwRegisterRead (ACPI_MTX_DO_NOT_LOCK,
|
||||
RegisterId);
|
||||
}
|
||||
break;
|
||||
|
||||
|
||||
case ACPI_SMI_CMD_BLOCK:
|
||||
case ACPI_PROCESSOR_BLOCK:
|
||||
|
||||
/* Not used by any callers at this time - therefore, not implemented */
|
||||
|
||||
default:
|
||||
|
||||
Mask = 0;
|
||||
break;
|
||||
}
|
||||
|
||||
if (ACPI_MTX_LOCK == UseLock)
|
||||
if (Flags & ACPI_MTX_LOCK)
|
||||
{
|
||||
AcpiUtReleaseMutex (ACPI_MTX_HARDWARE);
|
||||
}
|
||||
|
||||
RegisterValue &= Mask;
|
||||
RegisterValue >>= AcpiHwGetBitShift (Mask);
|
||||
/* Normalize the value that was read */
|
||||
|
||||
ACPI_DEBUG_PRINT ((ACPI_DB_IO, "Register I/O: returning %X\n", RegisterValue));
|
||||
RegisterValue = ((RegisterValue & BitRegInfo->AccessBitMask) >> BitRegInfo->BitPosition);
|
||||
|
||||
ACPI_DEBUG_PRINT ((ACPI_DB_IO, "ACPI RegisterWrite actual %X\n", RegisterValue));
|
||||
return_VALUE (RegisterValue);
|
||||
}
|
||||
|
||||
@ -737,16 +534,16 @@ AcpiHwRegisterRead (
|
||||
AcpiUtAcquireMutex (ACPI_MTX_HARDWARE);
|
||||
}
|
||||
|
||||
switch (ACPI_GET_REGISTER_BLOCK_ID (RegisterId))
|
||||
switch (RegisterId)
|
||||
{
|
||||
case ACPI_PM1_STATUS: /* 16-bit access */
|
||||
case ACPI_REGISTER_PM1_STATUS: /* 16-bit access */
|
||||
|
||||
Value = AcpiHwLowLevelRead (16, &AcpiGbl_FADT->XPm1aEvtBlk, 0);
|
||||
Value |= AcpiHwLowLevelRead (16, &AcpiGbl_FADT->XPm1bEvtBlk, 0);
|
||||
break;
|
||||
|
||||
|
||||
case ACPI_PM1_ENABLE: /* 16-bit access*/
|
||||
case ACPI_REGISTER_PM1_ENABLE: /* 16-bit access*/
|
||||
|
||||
BankOffset = DIV_2 (AcpiGbl_FADT->Pm1EvtLen);
|
||||
Value = AcpiHwLowLevelRead (16, &AcpiGbl_FADT->XPm1aEvtBlk, BankOffset);
|
||||
@ -754,56 +551,25 @@ AcpiHwRegisterRead (
|
||||
break;
|
||||
|
||||
|
||||
case ACPI_PM1_CONTROL: /* 16-bit access */
|
||||
case ACPI_REGISTER_PM1_CONTROL: /* 16-bit access */
|
||||
|
||||
Value = AcpiHwLowLevelRead (16, &AcpiGbl_FADT->XPm1aCntBlk, 0);
|
||||
Value |= AcpiHwLowLevelRead (16, &AcpiGbl_FADT->XPm1bCntBlk, 0);
|
||||
break;
|
||||
|
||||
|
||||
case ACPI_PM2_CONTROL: /* 8-bit access */
|
||||
case ACPI_REGISTER_PM2_CONTROL: /* 8-bit access */
|
||||
|
||||
Value = AcpiHwLowLevelRead (8, &AcpiGbl_FADT->XPm2CntBlk, 0);
|
||||
break;
|
||||
|
||||
|
||||
case ACPI_PM_TIMER: /* 32-bit access */
|
||||
case ACPI_REGISTER_PM_TIMER: /* 32-bit access */
|
||||
|
||||
Value = AcpiHwLowLevelRead (32, &AcpiGbl_FADT->XPmTmrBlk, 0);
|
||||
break;
|
||||
|
||||
/*
|
||||
* For the GPE Blocks, the lower word of RegisterId contains the
|
||||
* byte offset for which to read, as each part of each block may be
|
||||
* several bytes long.
|
||||
*/
|
||||
case ACPI_GPE0_STATUS_BLOCK: /* 8-bit access */
|
||||
|
||||
BankOffset = ACPI_GET_REGISTER_BIT_ID (RegisterId);
|
||||
Value = AcpiHwLowLevelRead (8, &AcpiGbl_FADT->XGpe0Blk, BankOffset);
|
||||
break;
|
||||
|
||||
case ACPI_GPE0_ENABLE_BLOCK: /* 8-bit access */
|
||||
|
||||
BankOffset = DIV_2 (AcpiGbl_FADT->Gpe0BlkLen) +
|
||||
ACPI_GET_REGISTER_BIT_ID (RegisterId);
|
||||
Value = AcpiHwLowLevelRead (8, &AcpiGbl_FADT->XGpe0Blk, BankOffset);
|
||||
break;
|
||||
|
||||
case ACPI_GPE1_STATUS_BLOCK: /* 8-bit access */
|
||||
|
||||
BankOffset = ACPI_GET_REGISTER_BIT_ID (RegisterId);
|
||||
Value = AcpiHwLowLevelRead (8, &AcpiGbl_FADT->XGpe1Blk, BankOffset);
|
||||
break;
|
||||
|
||||
case ACPI_GPE1_ENABLE_BLOCK: /* 8-bit access */
|
||||
|
||||
BankOffset = DIV_2 (AcpiGbl_FADT->Gpe1BlkLen) +
|
||||
ACPI_GET_REGISTER_BIT_ID (RegisterId);
|
||||
Value = AcpiHwLowLevelRead (8, &AcpiGbl_FADT->XGpe1Blk, BankOffset);
|
||||
break;
|
||||
|
||||
case ACPI_SMI_CMD_BLOCK: /* 8bit */
|
||||
case ACPI_REGISTER_SMI_COMMAND_BLOCK: /* 8-bit access */
|
||||
|
||||
AcpiOsReadPort (AcpiGbl_FADT->SmiCmd, &Value, 8);
|
||||
break;
|
||||
@ -853,16 +619,16 @@ AcpiHwRegisterWrite (
|
||||
AcpiUtAcquireMutex (ACPI_MTX_HARDWARE);
|
||||
}
|
||||
|
||||
switch (ACPI_GET_REGISTER_BLOCK_ID (RegisterId))
|
||||
switch (RegisterId)
|
||||
{
|
||||
case ACPI_PM1_STATUS: /* 16-bit access */
|
||||
case ACPI_REGISTER_PM1_STATUS: /* 16-bit access */
|
||||
|
||||
AcpiHwLowLevelWrite (16, Value, &AcpiGbl_FADT->XPm1aEvtBlk, 0);
|
||||
AcpiHwLowLevelWrite (16, Value, &AcpiGbl_FADT->XPm1bEvtBlk, 0);
|
||||
break;
|
||||
|
||||
|
||||
case ACPI_PM1_ENABLE: /* 16-bit access*/
|
||||
case ACPI_REGISTER_PM1_ENABLE: /* 16-bit access*/
|
||||
|
||||
BankOffset = DIV_2 (AcpiGbl_FADT->Pm1EvtLen);
|
||||
AcpiHwLowLevelWrite (16, Value, &AcpiGbl_FADT->XPm1aEvtBlk, BankOffset);
|
||||
@ -870,68 +636,38 @@ AcpiHwRegisterWrite (
|
||||
break;
|
||||
|
||||
|
||||
case ACPI_PM1_CONTROL: /* 16-bit access */
|
||||
case ACPI_REGISTER_PM1_CONTROL: /* 16-bit access */
|
||||
|
||||
AcpiHwLowLevelWrite (16, Value, &AcpiGbl_FADT->XPm1aCntBlk, 0);
|
||||
AcpiHwLowLevelWrite (16, Value, &AcpiGbl_FADT->XPm1bCntBlk, 0);
|
||||
break;
|
||||
|
||||
|
||||
case ACPI_PM1A_CONTROL: /* 16-bit access */
|
||||
case ACPI_REGISTER_PM1A_CONTROL: /* 16-bit access */
|
||||
|
||||
AcpiHwLowLevelWrite (16, Value, &AcpiGbl_FADT->XPm1aCntBlk, 0);
|
||||
break;
|
||||
|
||||
|
||||
case ACPI_PM1B_CONTROL: /* 16-bit access */
|
||||
case ACPI_REGISTER_PM1B_CONTROL: /* 16-bit access */
|
||||
|
||||
AcpiHwLowLevelWrite (16, Value, &AcpiGbl_FADT->XPm1bCntBlk, 0);
|
||||
break;
|
||||
|
||||
|
||||
case ACPI_PM2_CONTROL: /* 8-bit access */
|
||||
case ACPI_REGISTER_PM2_CONTROL: /* 8-bit access */
|
||||
|
||||
AcpiHwLowLevelWrite (8, Value, &AcpiGbl_FADT->XPm2CntBlk, 0);
|
||||
break;
|
||||
|
||||
|
||||
case ACPI_PM_TIMER: /* 32-bit access */
|
||||
case ACPI_REGISTER_PM_TIMER: /* 32-bit access */
|
||||
|
||||
AcpiHwLowLevelWrite (32, Value, &AcpiGbl_FADT->XPmTmrBlk, 0);
|
||||
break;
|
||||
|
||||
|
||||
case ACPI_GPE0_STATUS_BLOCK: /* 8-bit access */
|
||||
|
||||
BankOffset = ACPI_GET_REGISTER_BIT_ID (RegisterId);
|
||||
AcpiHwLowLevelWrite (8, Value, &AcpiGbl_FADT->XGpe0Blk, BankOffset);
|
||||
break;
|
||||
|
||||
|
||||
case ACPI_GPE0_ENABLE_BLOCK: /* 8-bit access */
|
||||
|
||||
BankOffset = DIV_2 (AcpiGbl_FADT->Gpe0BlkLen) +
|
||||
ACPI_GET_REGISTER_BIT_ID (RegisterId);
|
||||
AcpiHwLowLevelWrite (8, Value, &AcpiGbl_FADT->XGpe0Blk, BankOffset);
|
||||
break;
|
||||
|
||||
|
||||
case ACPI_GPE1_STATUS_BLOCK: /* 8-bit access */
|
||||
|
||||
BankOffset = ACPI_GET_REGISTER_BIT_ID (RegisterId);
|
||||
AcpiHwLowLevelWrite (8, Value, &AcpiGbl_FADT->XGpe1Blk, BankOffset);
|
||||
break;
|
||||
|
||||
|
||||
case ACPI_GPE1_ENABLE_BLOCK: /* 8-bit access */
|
||||
|
||||
BankOffset = DIV_2 (AcpiGbl_FADT->Gpe1BlkLen) +
|
||||
ACPI_GET_REGISTER_BIT_ID (RegisterId);
|
||||
AcpiHwLowLevelWrite (8, Value, &AcpiGbl_FADT->XGpe1Blk, BankOffset);
|
||||
break;
|
||||
|
||||
|
||||
case ACPI_SMI_CMD_BLOCK: /* 8bit */
|
||||
case ACPI_REGISTER_SMI_COMMAND_BLOCK: /* 8-bit access */
|
||||
|
||||
/* SMI_CMD is currently always in IO space */
|
||||
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user